SiC-MOSFETs

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SiC-MOSFETs
650V Series, 1200V Series
第2世代 SiC-MOSFET
2nd Generation SiC-MOSFETs
Features
Characteristics
●高速スイッチング
ton=70nsec (typ.) toff=98nsec (typ.)
●低オン抵抗(温度変化小)
100
Low ON-resistance (Small temperature dependency)
Loss (W)
Low body diode Qrr and trr
[Si-IGBTと比較, 30kHz 駆動時]
●高温環境で駆動
SCT2080KE
SCH2080KE
SCT2160KE
SCT2280KE
SCT2450KE
SCT2120AF
SCTMU001F
S2307
S2301
S2306
S2308
S2305
S2302
S2206
Turn-OFF
switching
loss
スイッチング時の
損失を
IGBT比73%低減
導通損失
Compared to
IGBTs loss
reduced by 73%
オフ損失
20
Conduction loss
Compared to IGBTs Loss
Reduced by 73%
SiC-MOSFET
Si-IGBT
∗ton=td (on) +tr, toff=td (off) +tf
Circuit Diagram
Lineup
Part No.
IGBT比73%
ロスを削減
60
0
Tj (Max) =175˚C
Supports high temperature operation
オン損失 Turn-ON switching loss
オフ損失 Turn-OFF switching loss
導通損失 Conduction loss
Turn-ON
switching
loss
40
Significantly reduced power loss by 73% (Compared to Si-IGBTs, when operating at 30kHz)
(30kHz駆動時 when operating at 30 kHz)
オン損失
80
●寄生ダイオードの逆回復動作が極めて小さい
●電力損失を大幅削減、
スイッチング損失73%減
Comparison of Loss
120
High-speed switching
VDSS (V)
RDS (on) (mΩ)
1200
1200
1200
1200
1200
650
400
1200
1200
1200
1200
1200
1200
650
80
80
160
280
450
120
120
45
80
160
280
450
1200
120
ID Max. (A)
40
40
22
14
10
29
30
68∗
40∗
22∗
14∗
10∗
3.5∗
29∗
Package
Co-Packed Diode
−
Yes
−
−
−
−
−
−
−
−
−
−
−
−
TO-247
[3pin]
TO-220AB
[3pin]
Bare Chip
SCH2080KE
SCT2080KE
Drain
Drain
世界初SBD
同梱タイプ
SBD
SBD Co-packed
Gate
パッケージ内にSiC-SBDが
内蔵されています。
Gate
SiC-SBD is integrated into
the package
Source
Source
∗Limited by Tj=175˚C
第3世代 SiCトレンチMOSFET
3rd Generation SiC Trench MOSFETs
Features
Structural Diagram
●低オン抵抗によりインバータのパワー密度向上を実現
Low ON resistance improves inverter power density
Metal
SiO2
●高速スイッチングが可能
N+
High-speed switching
P+
●寄生ダイオードの逆回復動作が極めて小さい
P
Source
trench
Minimal reverse recovery behavior of the parasitic diode
Poly-Si
Gate trench
SiC n- Drift layer
●寄生ダイオード通電による素子劣化を解消
SiC sub
Metal
Eliminates degradation caused by parasitic diode conduction
SiC Trench MOSFET
●Qg、寄生容量が小さい
Small Qg and parasitic capacitance
Characteristics
Trade-off curve between Rdson and Ciss
Lineup
5000
4500
RDS (on) (mΩ)
1200
22
1200
30
1200
40
650
17
650
22
650
30
4000
Package
3500
Ciss (pF)
VDSS (V)
TO-247-3L
Bare chip
2G DMOS
SCT2080KE 80mΩ 1200V
3000
2500
at same chip area
Ciss 35%↓ Ron 50%↓
2000
1500
at same Ron, Ciss 70%↓
1000
Trench MOS
1200V 40mΩ
500
Trench MOS
1200V 80mΩ
0
0
20
40
60
80
100
RDS (on) @25˚C (mΩ)
120
140
160