IAL Cost Paper – Prague DRAFT

Interference Assisted Lithography (IAL):
A Way to Contain the Lithography Costs for the
32nm and 22nm Half-Pitch Device Generations
Rudi Hendel; David Markle;
John S. Petersen; Andrew Barada;
Periodic Structures, Inc.
Zhilong Rao
Applied Materials, Inc.
Presentation Overview
Semiconductor Manufacturing Costs:
A quick calibration
Cost Model Overview
Basics and Assumptions
Interference Assisted Lithography
An introduction into the Concept
Process and Lithography-related cost factors
and their impact
Results and Discussion
Conclusions
October 23. 2009
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Lithography Extensions Conference, Prague
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“Lithography is a Bargain!*”
1,000
* Paul Arnold, ASML at the VLSI Litho Panel 2008 (November 18, 2008)
Tool Sales Price (no units)
450mm projections
100
10
1
0
0
1
10
100
1,000
10,000
Pixel Transfer
BitrateRate
October 23. 2009
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Still – Time for Reality Check:
(Comparing the price-tag for a Fab with….)
Megafab:
$6B to $10B
$5B
$3B
$1B
October 23. 2009
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Should the size of Fab Price Tags
be a concern?
Yes
Bob Johnson (Gartner DQ) at ISS 2009
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The basis of our Cost Model:
Tool component – Depreciation and Tool Maintenance
Allocation of Mask Cost
Process Cost (Resist, Develop, BARC, Metrology, Inspection, etc.
Model by “Screenivasan et al.” as quoted by Frank Goodwin, November 7, 2005 – Trends in the Cost of Photolithography
October 23. 2009
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Cost of Lithography
Direct Impact Costs
̶
̶
̶
̶
Cost and Complexity of
the Patterning Process
Cost of additional Tools
required (ex.: S.I.T.)
Cost of Mask(s)
Depreciation Cost and
Maintenance Expense of
the Exposure Tool
Indirect Impact Costs
(Factors of high importance
to a customer on which the
Choice of Lithography has a
critical impact)
̶
Cost of Design
̶
Time to Design
Implementation
̶
Risk of First Silicon Fail
Tool Price to Customer
Effective Throughput
Scheduled & unscheduled
Maintenance
October 23. 2009
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Per Yan Borodovsky; Semicon West; July 15, 2009
October 23. 2009
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How to reduce cost? Start with the Tool
Tool Sales Price (no units)
1,000
Either:
Simplify the pattern, reducing
Pixel Transfer Rate
which leads to
lower capital cost
100
10
Or:
Trade off general purpose capability
with acceptable restrictions
leading to cost savings
1
0
0
1
10
100
1,000
10,000
Pixel Transfer
Bitrate Rate
October 23. 2009
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Effective Means to segment (and reduce)
Information Content contained in a pattern:
Interference Assisted Lithography

It separates high frequency component
of the image (dense line-spaces)
from the design content (line-ends)
Simplified Imaging Rules allow lower tool cost

without sacrificing minimum resolution
Several technology approaches are available

Ultimate Selection will accommodate
key requirements in both, logic and memory.
October 23. 2009
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What is Interference Assisted Lithography?
I.A.L. is a two-exposure process:


Exposure One – Fixed Pitch Pattern (a grating)
Exposure Two – a Block-Mask,
determining where the lines defined in the
first exposure end and start
+
October 23. 2009
=
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The I.A.L. Technology Principle
has been demonstrated
Source: MIT Lincoln Lab (2005)
M. Fritze, T. M. Bloomstein, B. Tyrrell, T. H. Fedynyshyn, N. N. Efremow, D. E. Hardy, S. Cann, D. Lennon, S. Spector and M. Rothschild,
“Hybrid Optical Maskless Lithography: Scaling Beyond the 45nm Node”, J. Vac, Sci. and Tech. B 23(6) (2005), pp. 2743–2748.
October 23. 2009
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Benefits of Interference-based
Exposure Tools
Cost benefits



Simplified Optics and thus lower Tool Cost
OL requirements for IAL are relaxed compared to
OL requirements for traditional Double Patterning
Significant savings in Cost of Masks
IAL requires 1 critical mask,
Double Patterning requires 2 +
Technical Benefits


Wider process window
Increased Contrast/DOF
October 23. 2009
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Double Patterning: –
22nm Technology Node Lithography Cost Comparison
Traditional DP vs. IAL DP
Comparing Traditional D.P. vs. I.A.L. D.P.
$500
Mask
Resist
Maintenance
Depreciation
Litho Cost of all DP Layers
$450
$400
$350
$300
$250
$200
$150
$100
$50
$Traditional DP
October 23. 2009
The reduced
Cost of Masks
gives IAL DP a
30% cost benefit
compared to
Traditional DP
(Independent of
Mask Usage)
IAL DP
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Total Litho Cost by Node:
Assignment of Mask Levels
Node and Minimum CD
Minimum Pitch
45
130
32
90
22
64
16
45
EUVL Levels
193i-DP Levels or 193-IAL Levels
193i-SE Levels
193d-SE Levels
248-SE Levels
I-line Levels
0
0
7
19
7
7
0
10
10
17
0
7
2
9
21
8
4
6
11
8
21
0
4
6
Total number of Levels in
Node
40
44
50
50
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Total projected Lithography Cost
Lithography
Cost per Wafer
- IAL based
DP Process
Cost of Lithography
- Traditional
DP Process
Traditional
D.P.
vs. I.A.L.
D.P.
$2,500
$2,500
Cost of Lithography
Wafer Cost per
($) Wafer
Cost of Lithography per Wafer
Mask
Cost
10,000
wafers
mask)
Mask
Cost
(at (at
10,000
wafers
perper
mask)
Resist
Cost
Resist
Cost
$2,000
$2,000
Maintenance
Cost
Maintenance
Cost
Depreciation
70%
of catalog
throughput)
Depreciation
(at (at
70%
of catalog
throughput)
$1,500
$1,500
Traditional Double Patterning
I.A.L. Double Patterning
$1,000
$1,000
$500
$500
$- $45 45
32 32
22 22
16 16
Technology
Node
Technology
Node
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Total projected Lithography Cost
IALProcess
Lithography
Cost
per
Wafer
- IAL
based
DP
Processwith IAL
Cost of
Lithography
- replaced
Traditional
DP
Hypothetical
Case
ofEUVL
replacing
allby
EUV
Layers
$2,500
$2,500
$2,500
Cost of Lithography for Node
Cost of Lithography per Wafer
Cost of Lithography
Wafer Cost for
($) the Node
Mask
Cost
(at
10,000
wafers
per
mask)
Mask
(at wafers
10,000
wafers
per mask)
Mask
Cost
(atCost
10,000
per
mask)
Resist
Cost Cost
Resist
Resist
Cost
$2,000
$2,000
$2,000
Maintenance
Cost Cost
Maintenance
Maintenance
Cost
Depreciation
(at
70%
of throughput)
catalog
throughput)
Depreciation
70%
of catalog
throughput)
Depreciation
(at (at
70%
of catalog
$1,500
$1,500
$1,500
$1,000
$1,000
$1,000
Traditional Double Patterning
I.A.L. Double Patterning
Only I.A.L. DP for Critical Layers
$500
$500
$500
$- $- $45 45 45
32 32 32
22 22 22
16 1616
Technology
Node
Technology
Node
Technology
Node
October 23. 2009
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Additional Benefits Possible with I.A.L.
(System Architecture Dependent)
Reduced Capital Cost benefits all Lot Sizes
In the case of a reduced Exposure Field
(Not all applications require large Exposure Fields)

Further Mask Cost Reduction
Minimizing write/inspection costs
Particularly benefitting small lot sizes,
which are highly sensitive to Mask Cost


Reduced Systems Cost
(Stepper architecture allows systems simplifications)
Additional efficiency particularly for small devices
(somewhat counterintuitive)
October 23. 2009
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Mask Cost Mask
vs. Cost
Mask
Patterned
Area
vs Field
Size
$60,000
$50,000
Mask Cost
$40,000
$30,000
$20,000
$10,000
$0
0
200
400
600
800
1,000
Patterned Area (mm2)
October 23. 2009
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Cost of Lithography Comparison –
Cost of Lithography Step Comparison
Traditional
Scanner
vs.
I.A.L.
(Traditional
Scanner vs.
I.A.L.
Stepper)Stepper
$10,000
80%
$1,000
60%
50%
$100
40%
30%
$10
20%
I.A.L. Stepper 10x20
10%
Traditional Scanner 30x20
$1
1
Cost Reduction (Stepper vs.
Scanner)10
100
Lithography Cost Reduction (%)
Cost per Lithography Step
(USD)
70%
1,000
0%
10,000
Mask Utilization (Wafers per Mask)
October 23. 2009
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I.A.L. Limitations
High Regularity requires Design Restrictions

I.A.L. Restrictions are similar to
Sidewall Image Transfer (S.I.T.) Restrictions
Yet, S.I.T. is considered as one viable option
for extending resolution.
Designs compatible with S.I.T. are expected
to be compatible with I.A.L..

Adopting such restrictions early and transitioning to
regularity in one single step promises
significant cost benefits.
October 23. 2009
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In Summary – Cost Benefits of I.A.L.:
Direct:
Significant reduction of Mask Cost

Comparable layers (vs. traditional DP)
Containment of Litho Cost Increases

If applied to all Critical Levels in the process flow
Additional Benefits are possible:


Reduced Die Size, Small Lot-size,
(leading to smaller Exposure Fields)
Enhanced Maskless Lithography Economics
Reduced Image (Pixel) Density for Block Mask
Enables competitive MLL Throughput (prototyping)
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In Summary – Cost Benefits of I.A.L.:
Indirect:
I.A.L. can become a Technology Enabler for
a market segment currently underserved:

Opening Access to Leading Edge Geometries
for low/medium mask usage applications
(ASIC/ASSP) by:
Reduced Mask Costs (and Capital Cost)
Simplified DR complexity
Reduced time to Design Completion
Reduced risk to first time success
October 23. 2009
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Acknowledgements
Al Bergendahl, Bergendahl Enterprises
Marc Levenson
Mark Pinto, Applied Materials
Hans Stork, Applied Materials
Bill Tobey, ACT Consulting
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Thank you!
October 23. 2009
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