Homework Chapter 5
Due
3/23/09
Solutions
1. Problem 5.19(a), (d).
U1
Z
Y
X
1
2
3
A
B
C
VCC
6
4
5
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
15
14
13
12
11
10
9
7
U5A
1
2
13
12
F(X ,Y,Z) = sum(2,4,7)
74LS10
74LS138
5.19(a)
2. Problem 5.82
U2A
1
3
F1
2
74LS00
U3A
1
3
F2
3
F3
3
F4
2
U1
Z
Y
X
1
2
3
A
B
C
VCC
6
4
5
G1
G2A
G2B
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
15
14
13
12
11
10
9
7
74LS00
U4A
1
2
74LS00
74LS138
U5A
1
2
74LS00
3. Design an adder circuit with inputs X1, X0, Y1, Y0 and Cin, and outputs Cout,
S1, and S0. To design the circuit, simply write equations for Cout, S1, and S0 as
minimal sum of products. You do not have to draw the circuit. The first few terms
of the truth table are shown below.
Cin
X1
X0
Y1
Y0
0
0
0
0
0
0
1
0
0
0
0
1
2
0
0
0
1
0
3
0
0
0
1
1
4
0
0
1
0
0
5
0
0
1
0
1
6
0
0
1
1
0
7
0
0
1
1
1
8
0
1
0
0
0
9
0
1
0
0
1
10
0
1
0
1
0
11
0
1
0
1
1
12
0
1
1
0
0
13
0
1
1
0
1
14
0
1
1
1
0
15
0
1
1
1
1
16
1
0
0
0
0
17
1
0
0
0
1
18
1
0
0
1
0
19
1
0
0
1
1
20
1
0
1
0
0
21
1
0
1
0
1
22
1
0
1
1
0
23
1
0
1
1
1
24
1
1
0
0
0
25
1
1
0
0
1
26
1
1
0
1
0
27
1
1
0
1
1
28
1
1
1
0
0
29
1
1
1
0
1
30
1
1
1
1
0
31
1
1
1
1
1
You should use the maps shown below for this design
Cout
0
0
0
0
0
0
0
1
0
0
1
1
0
1
1
1
0
0
0
1
0
0
1
1
0
1
1
1
1
1
1
1
S1
0
0
1
1
0
1
1
0
1
1
0
0
1
0
0
1
0
1
1
0
1
1
0
0
1
0
0
1
0
0
1
1
S0
0
1
0
1
1
0
1
0
0
1
0
1
1
0
1
0
1
0
1
0
0
1
0
1
1
0
1
0
0
1
0
1
Cout(Cin,X1,X0,Y1,Y0) =
(7,10,11,13,14,15,19,22,23,25,26,27,28,29,30,31)
S1(Cin,X1,X2,Y1,Y0) =
(2,3,5,6,8,9,12,15,17,18,20,21,24,27,30,31)
S0(Cin,X1,X2,Y1,Y0) =
(1,3,4,6,9,11,12,14,16,18,21,23,24,26,29,31)
Cin = 0
Cin = 1 Cout
X1
X1
1
1
1 1
Y0
Y0
1 1 1
1 1 1 1
Y1
Y1
1 1
1 1 1
X0
X0
Cout  X1Y1  CinX 0Y1  CinX1X 0  CinX1Y 0  X 0Y1Y 0  X 0 X1Y 0
Cin = 0
X1
1 1
1
1
Y0
1
1
Y1
1 1
X0
Cin = 1 S1
X1
1
1
1 1
Y0
1 1
Y1
1
1
X0
S1  X 1 X 0Y1Y 0  X 1X 0 Y1Y 0  X 1X 0Y1Y 0  X 1X 0Y 1Y 0
CinY1X 1 X 0  CinY1Y 0 X 1  Cin Y1X 1X 0  Cin Y1Y 0X 1
Cin X 1X 0Y1  Cin X 1Y1Y 0  CinX 1X 0Y1  CinX 1Y1Y 0
Cin = 0
X1
1 1
1
1
Y0
1
1
Y1
1 1
X0
S 0  Cin  X 0  Y 0
Cin = 1 S0
X1
1
1
1 1
Y0
1 1
Y1
1
1
X0
4. Draw the diagram to show how to realize the functions F(W,X,Y) = (1,3,5,6)
and G(W,X,Y) = (2,3,4,7) using only a single 74LS138 and two NAND gates.
U1
Y
X
W
1
2
3
A
B
C
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
VCC
6
4
5
G1
G2A
G2B
15
14
13
12
11
10
9
7
1
2
U2A
6
F(W,X,Y) = sum(1,3,5,6)
6
G(W,X,Y) = sum(2,3,4,7)
4
5
74LS20
74LS138
1
2
U3A
4
5
74LS20
5. Draw the diagram to show how to realize the functions F(A,B,C,D) = (2,4,6,14)
using only one 74LS138 and one NAND gates. (5.19 c)
U1
C
B
A
1
2
3
A
B
C
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
VCC
6
4
5
D
G1
G2A
G2B
15
14
13
12
11
10
9
7
1
2
U6A
6F(A ,B,C,D) = sum(2,4,6,14)
4
5
74LS20
74LS138
5.19(c)
6. Draw the diagram to show how to realize the functions F(A,B,C) = (0,4,6) and
G(C,D,E) = (1,2) using only a single 74LS139 IC and two NAND gates. (5.19 f)
U3A
B
A
2
3
C
1
A
B
G
U6A
Y0
Y1
Y2
Y3
4
5
6
7
1
2
13
12
F(A,B ,C) = sum(0,4,6)
3
G(C,D,E ) = sum(1,2)
74LS10
74LS139
5.19(f)
E
D
U4B
14
13
15
A
B
G
74LS139
Y0
Y1
Y2
Y3
12
11
10
9
U7A
1
2
74LS00
7. Draw the diagram to show how to realize the functions F(W,X,Y) = (3,4,5,6,7)
using only a 74LS151.
One possible solutions is shown:
VCC
U1
4
3
2
1
15
14
13
12
Y
X
W
11
10
9
7
D0
D1
D2
D3
D4
D5
D6
D7
W
Y
6
5
F(W,X,Y ) = sum(0,1,2)
A
B
C
G
74LS151
8. Draw the diagram to show how to realize the functions F(A,B,C,D) = (2,4,6,14)
using only a 74LS151.
Two solutions are shown.
VCC
U1
/D
/D
/D
/D
C
B
A
4
3
2
1
15
14
13
12
11
10
9
7
D0
D1
D2
D3
D4
D5
D6
D7
A
B
C
G
74LS151
U1
W
Y
6
5
F(A ,B,C,D) = sum(2,4,6,14)
/A
/A
D
C
B
4
3
2
1
15
14
13
12
11
10
9
7
D0
D1
D2
D3
D4
D5
D6
D7
W
Y
6
5
F(A ,B,C,D) = sum(2,4,6,14)
A
B
C
G
74LS151
Note: You can place a symbol on an OrCAD schematic, select that symbol, copy
it to the clipboard, and then past it into a Microsoft Word document, which can
be printed out. This will keep you from having to draw everything by hand.