February 28 – March 1, 2012
Graph-IC Verification
by
Gregory FAUX
Verification Engineer
STMicroelectronics
Dennis RAMAEKERS
Verification Engineer
ST-Ericsson
Hello!
• Why are we here?
– Report of our experience in verifying a complex and
highly configurable IP
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GRAPH-IC
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DUT Overview
• Display engine:
–
–
–
–
Fetch data
Process pixels
Output video formating
Multi channel / overlays
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Where Complexity Explodes…
• Each stage presents high configurability
• High flexibility achieved by decoupling each stage
Memory
Memor
Buffer
yBuffer
Buffer
Buffer
Buffer
Buffer
PP1
PP1
PP2
PP2
PP n
PP n
• Legal configurations are hard to generate, with
complex resources management
• … recurrent problem raised @each verification level
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CRV LIMITATIONS
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Original Approach
• Constraint Random Verification (VIPs, scbd, sequences…)
• C reference model
Virtual
sequences
Test Bench
Model
Scoreboard
VIP
i
f
0
DUV
i
f
1
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VIP
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Constraints Based Modeling
• Multiple stages, each requiring a large constraints set
• Additional constraints required to ensure valid data path
• Data paths can be multiple and re-configurable
High
configurability
Flexible data path
Resource
Management
Tedious generation of legal configurations !
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Challenges
• Coverage closure
– Constraints set was hard to develop and maintain
– Huge test suite
– Some scenario still missing
• Horizontal reuse
– Important constraint subset tightly linked to IP version
• Vertical reuse
– Different verification approaches and languages
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GRAPH BASED VERIFICATION
MAIN CONCEPTS
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Overview
• User describes sequential steps required to generate
verification scenario using graph
Three Types of Goals
Sequence Goal – evaluate ALL children
Select Goal – evaluate ONE child
Leaf Goal – has NO child
• Nodes can be used to perform
– Configuration generation
– TB interaction: data injection/grabbing, synchronization on events
– File generation
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Graph Evaluation
• Ordered graph walk
• Multiple and concurrent evaluations are possible
• Executing a node means evaluating the corresponding C++
function
goal sequence0 {…}
goal sequence1 {…}
goal leaf2 {…}
goal select1 {…}
goal leaf3 {…}
goal leaf1 {…}
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Graph Evaluation (cont’d)
• Constraints can be applied to any select child
– If masked, a child will never be selected
– If forced, a child will always be selected
• Constraints can be static and/or dynamic
• Goal may be redefined (body and subgraph)
new
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APPLICATION
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Application On Our Controller
IP Testbench
Virtual
Scenario
sequences
Driver
Test Bench
Model
Scoreboard
VIP
i
f
0
DUV
i
f
1
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VIP
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Application On Our Controller
System Test Generation
Test Bench
C program
Infra
IP
CPU
Infra
IP
Mem
Interconnect
System
M2M
IP
I/O IP
I/O IP
VIP
VIP
Scenario Driver
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Graph Overview
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BENEFITS
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Coverage Closure
• The sequential nature of graph evaluation permitted
• An easy decomposition of the original problem
• An easy datapath modeling
• Smooth resources management
• Generation of unexplored scenario
• New bugs found
• Re-writing of the test suite
• From basic to very complex tests
• Faster Verification closure
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Horizontal reuse
Maintenance and IP derivatives
• Easy derivatives support via several select and leaf goals
redefinitions
• Project independent common pool of files for easy
maintenance
• Few configuration specific files are needed per IP
version
Common
new
Project
specific
• Time to first valid test divided by 2
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Vertical Reuse
From IP to SoC
• Most of the graph model is common to both platforms
• Natural split between nodes that are platform agnostic and
those which are not
Drive VIP
Write C
VIP
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C
program
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Conclusion
• CRV faces some limits on really complex IPs
• Our experience with Graph Based Verification was positive
– Productivity and quality improved
• We applied it @IP and @SoC
– Vertical reuse enabler
– System tests (deployment on-going)
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