The Designs and Analysis of a
Scalable Optical Packet
Switching Architecture
Speaker: Chia-Wei Tuan
Adviser: Prof. Ho-Ting Wu
3/4/2009
1
Outline
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Introduction
Switching Architecture and Control Strategies
Performance Results
Input Traffic Model
Queueing Analysis
Numerical Results for Queueing Analysis Model
2
Outline






Introduction
Switching Architecture and Control Strategies
Performance Results
Input Traffic Model
Queueing Analysis
Numerical Results for Queueing Analysis Model
3
Contention resolution in switches
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Contention resolution is an important issue when several
packets contend for a common network resource.
When two input packets are destined for the same output port
simultaneously, packet contention occurs.
When contention occurs, storing packets into the switch
buffers becomes the most general technique.
4
Contention resolution in switches
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
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At present, optical storage technology is not available.
Thus, switching operations are done electronically, forcing the
optical signal to be converted to an electronic format.
But, in all-optical networks, packets are switched optically
until they reach their destination.
That is, switching must also be optical in all-optical networks.
5
How to store packets in all-optical networks?



Switched delay lines (SDL).
Storing of packets in fiber DLs act as transient optical buffers.
Quadro is a single-buffer DL switching architecture.
I1
DL1
O1
DL2
I2
O2
SW1

SW2
SW3
M-Quadro is a multi-buffer Quadro architecture that uses a longer DL to
increase the buffering capacity.
6
Outline
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


Introduction
Switching Architecture and Control Strategies
Performance Results
Input Traffic Model
Queueing Analysis
Numerical Results for Queueing Analysis Model
7
B-Quadro Switching Architecture


The length of DLi is mi.
The (m2-m1)th slot in DL2 counting from left to right is termed “virtual
slot” , if m2 > m1.
Outgoing
(Incoming)
slot 1
Incoming
slot 2
Outgoing
slot 2
DL2
DL1
SW1
Virtual
slot
SW2
SW3
8
Left control strategy (LCS)

Ex1:

LCS applied:
9
Right control strategy (RCS)

Ex2:

RCS applied:
10
Virtual-slot control strategy (VCS)

VCS is to ensure, whenever possible, that outgoing state 1 be
different from outgoing state 2.
Deflection:

Internal blocking:

11
Virtual-slot control strategy (VCS)

Ex1:

VCS applied:
12
Virtual-slot control strategy (VCS)

Ex2:

VCS applied:
13
The limitations of M-Quadro
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Ex3:

VCS applied:
14
The M-B-Quadro Architecture

The packets through the bypass line (BL) are carried
without delay. (No buffering capability)
15
Example of M-B-Quadro

Ex3:

LAVS applied:
16
Multi-stage Multi-buffer Bypass Quadro
(M2-B-Quadro) Switch Architecture

3 x 3 switch:

nxn
switch:
17
Outline
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


Introduction
Switching Architecture and Control Strategies
Performance Results
Input Traffic Model
Queueing Analysis
Numerical Results for Queueing Analysis Model
18
The Comparsion between M-Qdadro and
M-B-Qdadro with Symmetrical Traffic
19
The Parameter of Asymmetrical Traffic
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
The load of each input is ρ.
Let X be a random variable that indicates the state of
a input port.
P(X=i) represents the probability of the packet
destined for output port i at specific time slot.
P(X=0) = 1- ρ.
P(X=1) = R1* ρ.
P(X=2) = R2* ρ.
• where Ri is the ratio of total packets to the packets
destined for output port i.
20
The Comparsion between M-Qdadro and
M-B-Qdadro with Nonbursty and Asymmetrical Traffic
21
The Comparsion between M-Qdadro and
M-B-Qdadro with Bursty and Asymmetrical Traffic
22
Outline






Introduction
Switching Architecture and Control Strategies
Performance Results
Input Traffic Model
Queueing Analysis
Numerical Results for Queueing Analysis Model
23
Bursty Traffic Model
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
Pa: The probability of no packet arriving in the next slot, given
the current slot is idle.
Pb: The probability of the next arrival will be part of the burst.
(i.e., destined to the same destination).
24
The properties of Bursty Traffic Model


Expected bursty length =
1
L
1  Pb
Offered load at each input port =
1  Pa

1  Pa Pb
25
Asymmetric Traffic Model

In realistic networks, the traffic is not only bursty but
also asymmetric.
26
Back to P32
How to determine the value of P01 and P02?

Calculus the steady state
distribution:

P(X=i) can be derived by
summing the steady-state
probability in {bursty1,
destination i} and {bursty2,
destination i} states.

After rearranging,
we obtain:
27
Back to P32
Outline






Introduction
Switching Architecture and Control Strategies
Performance Results
Input Traffic Model
Queueing Analysis
Numerical Results for Queueing Analysis Model
28
Exact Analytical Model



is the state (i.e., destination) of slot j at DL i.
The state of input port i is represented as xi.
The state definition of exact DTMC.
smi ( j )
29
Control Strategies



Let S p and S q are two instances of S .
Define control strategy as   ( 1 ,  2 ,...,  n ) , where  i is part of
control strategy which determine the next incoming slot i.
Assuming S q is the next state of S p , the relation of them is:
30
The General Formula of State Transition Matrix
P ,  is the conditional probability that next traffic state of being  ,
given the current traffic state of being  .
31
State Transition Matrix In Non-bursty Traffic Case

In non-bursty traffic case,
P ,   P(next input traffic state= | current input traffic state= )
 P(next input traffic state= )
 P( x   )

Thus, state transition probability in can be reduced to
Tij 
n
n
j
P

P
(
x
j
i
 x ,x  k )
k 1
k
k
k 1
where P( xkj ) is the destination distribution for input port k , for k {1, 2, ..., n}.

The non-bursty case can be further divided into
1) Symmetrical case: Set P ( xkj ) to 1/n for k=1,2,…, n.
2) Asymmetrical case: Set P ( xkj ) to some probability greater or
smaller than 1/n for k=1,2,…, n
32
State Transition Matrix In Bursty Traffic Case


In bursty traffic case, it can also be further divided into
1) Symmetrical case: Set P(x=1) = P(x=2).
in the equation
2) Asymmetrical case: Set P(x=1) ≠ P(x=2).
Tij 
n
P
where Pxki , xkj is the transition probability in the
traffic model diagram.
k 1
xki , xkj
33
Calculus Steady State

Let

S =  S , S ,
 1 2
where

 be steady state distribution.
, S 
S

S =(n+1)m1 +m2 +...+mn  (# of traffic states) n
Compute
 S ( n 1)  T   S ( n ) .
Initial:  S
(0)
is the space size.
iteratively
 1 1
 , ,
S S

1 
,
.

S

S
until
( n 1)
( n)



  where  is a predefined constant.
 S
S
h 1
n h

L    h   u  sm j (m j )  i
S
h 1
i 1
 j 1

S

Deflection probability:
n




h
x

i
 1 

j 1

n
34
Approximate Asymptotic Model
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Goal: get the lowest bound of deflection probability.
Unlimited delay line size.
The approximate asymptotic model assume that
m1 = m2 = … = mn-1 = 1 and mn = ∞.
35
Estimation

Redefine the state definition of DTMC as

S  sm1 (1), sm2 (1),..., smn1 (1), smn (1), smn (2), smn (mn ), x1, x2 ,..., xn

Estimation: f S
mn
( mn 1)|Smn ( mn )
( x, y )  f S
mn
(1)| Smn ( 2 )
S
where f S
mn
(1), Smn
mn
mn
(1), Smn (2)
fS
mn
(2)
( x, y )
( y)

h
h
(
x
,
y
)



(
s
(1)

x
)

(
s
(2)  y )

m
m
(2 )
Sh
n
n
h 1
S
and f S
( x, y ) 
fS

h
(
y
)



s
(2)  y

m
(2)
Sh
n
h 1


Back
36

An Iterative Method to calculus the steady state distribution
1)
Initial:  
S1
1
, i  1, 2,
,S
S
1
f S ( m 1)|S ( m ) ( x, y ) 
, x, y {0,1,
mn
n
mn
n
n 1
2)
, n}
Calculus state transition probability matrix:
37
An Iterative Method to calculus the steady state distribution
3)
Calculus the next state distribution vectors.
 S ( n 1)  T   S ( n )
with initial condition  S
4)
(0)
 1 1
 , ,
S S

1 
,
S 

Check the convergence condition.
S

h 1
( n 1)
S
  S ( n )   where  is a predefined constant.
 If the condition holds, stop the program and compute
deflection probability.
 Otherwise, calculus the new estimate conditional
probability f Smn ( mn 1)|Smn ( mn ) ( x, y ) and go to step 2)
38
Outline






Introduction
Switching Architecture and Control Strategies
Performance Results
Input Traffic Model
Queueing Analysis
Numerical Results for Queueing Analysis Model
39
Exact model and simulation
for Symmetrical Traffic


M1=1, M2=4.
Using LAVS control strategy.
40
Exact model and simulation
for Asymmetrical Traffic



M1=1, M2=4.
Using LAVS control strategy.
Expected bursty length = 20.
41
Lowest bound of deflection probability.


Under a specific traffic condition, we obtain the lowest bound of deflection prob.
bursty length = 5 and offered load = 0.6 :
42
Conclusions



M-B-Quadro can achieve lower packet deflection
probability.
The analytical model can evaluate the system
performances under non-bursty, bursty, symmetrical,
and asymmetrical conditions.
The numerical results show the analytical model is
successful to reveal the lowest bound of deflection
probability in this switching architecture.
43
Reference

[1]

[2]

[3]
Chlamtac, I. and Fumagalli, and Suh, C. J., 2000, “Multibuffer Delay Line
Architecture for
Efficient Contention Resolution in Optical Switching
Nodes,” IEEE Transactions on Communications, Vol. 48, No. 12, pp. 20892098.
Haas, Z., 1993, “The Staggering Switch - An Electronically Controlled
Optical Packet Switch,” IEEE/OSA Journal of Lightwave Technology, Vol.
11, No. 5/6, pp. 925-936.
Wang-Rong Chang, Ho-Ting Wu, Kai-Wei Ke, and Hui-Tang Lin, “The
Designs of a Scalable Optical Packet Switching Architecture”, Journal of the
Chinese Institute of Engineers, vol. 31, no. 3, pp. 469-479, 2008.
44
Thank you!
Q&A
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