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Electromigration Study of 50 µm Pitch Micro Solder Bumps using Four-Point Kelvin Structure
Da-Quan Yu, Tai Chong Chai, Meei Ling Thew, Yue Ying Ong, Vempati Srinivasa Rao, Leong Ching Wai, John H. Lau*
Institute of Microelectronics, A*STAR (Agency for Science, Technology and Research), 11 Science Park Road, Singapore
Science Park II, Singapore 117685
Tel: (65) 67705429; Fax: (65) 67745747; E-mail: [email protected]
*Now with Hong Kong University of Science & Technology
Abstract
Electromigration (EM) of micro bumps of 50 µm pitch
was studied using four-point Kelvin structure. Two kinds of
bumps, i. e., SnAg solder bump and Cu post with SnAg solder
were tested. These bumps with thick Cu under bump
metallization (UBM) were bonded with electroless Ni/Au
(ENIG) pads. The results showed different EM features
comparing with larger flip chip joints. Under various test
temperatures from 100 to 140 ºC, the increasing of electrical
resistance under current stressing was mainly due to the
formation of the high temperature intermetallic compounds
(IMCs). The resistance increase-rate in solder bump
interconnects was faster than that of Cu post with SnAg bump
joints since there was more low temperature solder and under
current stressing, more IMCs would be formed. When Cu
post with SnAg bumps were tested at 140 ºC with the current
density of 4.08×104 A/cm2, after certain stressing time the
resistances would reach a plateau region, where the diffusion
between different materials, i. e., Cu, Ni and Sn reached
equilibrium, and IMCs became stable. Large number of
Kirkendall voids and a number of cracks were found in the
Cu post interconnects which was caused by the electron wind
since less voids and cracks were found in the adjacent bump
interconnects. When Cu post with SnAg bumps were tested at
140 ºC with the current density of 2.04×104 A/cm2 for 1000 h,
the resistance did not reach steady state. The electron flow
direction also has an effect on the diffusion of materials. The
degradation of resistance increased faster when electrons flow
from Cu UBM to ENIG.
[6-18]. For flip chip joint with thin film UBM, typically, the
failure mode was the pancake void formation across the
contact area [8]. It has been reported that thick UBM could
eliminate the current crowding effect and improve
electromigration reliability significantly [9-13].
However, so far, limited studies have been conducted to
understand the electromigration behavior of ultra-fine pitch
micro bump. The microstructure of such micro bumps was
quite different from that of large solder joints. Shrinkage of
solder volume would result in the formation of excess IMCs.
In such case, the current crowding region, voids formation
and propagation and materials diffusion behavior will be quite
different from larger solder joints. Therefore, it is quite
meaningful to understand the EM failure behavior of the
micro bump interconnects.
There are two methods to monitor the resistance change of
the bump under current crowding, i. e., daisy-chain structure
and Kelvin structure. Kelvin structure has been implemented
to detect the slight resistance changes due to voids formation
in the normal flip chip solder joint [12-13]. In our tests, since
the bump is very small, Kevin structure was used to measure
the accurate resistance change of the micro bumps. With the
help of microstructure observation, the clear relationship
between resistance change and microstructure evolution was
obtained to know the characteristics of the electromigration of
these fine pitch micro bumps.
Introduction
Flip-chip technology has become an attractive first level
interconnect solution to satisfy the new requirements of
microelectronic packaging due to its high packaging density,
miniaturized feature, and good thermal and electrical
performance. Recently, ultra-fine pitch flip-chip bump
interconnection technology with bump of 10~30 µm in
diameter is under investigation for emerging new packaging
technologies such as Chip-on-Chip (COC) package [1],
Silicon-carrier System-on-Package (SOP) [2] and Si
interposer with Through Silicon Via (TSV) [3-4].
In these advanced electronic products, current crowding
induced electromigration failure will be the limiting factor for
high-density packages in near future [5-16]. For the bumps of
25 µm in diameter, carrying with 0.05 Amp current, the
current density will reach 104 A/cm2, which is high enough to
induce electromigration in eutectic SnPb and Sn rich lead free
solder joints[5-6]. Many researchers have conducted
extensive experiments to reconcile test data with theories, and
understand the electromigration failure in the flip-chip joint
978-1-4244-4476-2/09/$25.00 ©2009 IEEE
930
Tested bump
(a)
(b)
Fig. 1. (a) Schematic of the Kevin structure; (b) test vehicle for EM.
2009 Electronic Components and Technology Conference
Experiment
In present study, EM behaviors of two kinds of micro
bumps, i. e., SnAg solder bumps and Cu post with SnAg
solder bumps were studied. For SnAg solder bumps, the
thickness of Cu UBM and solder height were 10µm and
30µm respectively. For Cu post with SnAg solder bumps,
both the Cu UBM and SnAg solder have the same height of
20µm.
The 10 × 8 mm2 silicon test chip was populated with
around 13,413 micro bumps of ~25 µm in diameter with a
pitch of 50 µm. On the substrate chip, electroless Ni/Au pads
of 20 µm in diameter were used to bond the solder bumps,
where the thickness of Ni and Au were 5 µm and 0.1 µm
respectively. As mentioned before, in order to get precise
single joint resistance measurement, four-point Kelvin
structure was designed in the packages with daisy chain
structure for electrical continuity testing as shown in Fig. 1(a).
The resistance change of one bump (marked with arrow) was
recorded.
Reflow was conducted with a peak temperature of 245 ºC.
After reflow, the carrier chip was connected to PCB board by
Au wire bonding. The carrier chip together with the adapter
PCB board formed our final test vehicle which was shown in
Fig. 1(b).
180
(b)
170
Relative Degradation (%)
(a)
were formed on both Cu UBM side and ENIG side. It was
known that when SnAg solder wetted with Ni, Ni-Sn IMCs
will be formed [18]. However, it was also reported that Ni
from Ni pad would accelerate the growth of Cu6Sn5 on Cu
UBM because trace amount of Ni would decrease the Cu
solubility in liquid Sn [18]. Considering the short distance
between Cu UBM and ENIG pad (10~20 µm) in the present
micro bumps study, Cu is expected to diffuse to ENIG pad in
a shorter time to form (Cu,Ni)6Sn5.
2. Effect of test temperatures on the resistance change with a
current density of 4.08 ×104 A/cm2
With the current density of 4.08×104 A/cm2, EM tests were
conducted at different temperatures, i. e., 100, 120, and 140
ºC. In these test, electrons flowed from ENIG to Cu UBM.
The results were shown in Fig. 3. For both the tow kinds of
bump interconnects, the resistance increased faster under
higher test temperatures. In addition, the resistance increasing
rate of solder bump interconnects was faster than that of Cu
post with solder bump at each test temperature. For normal
flip chip solder joints, the void was found when the resistance
increased to 1.03 times of the initial value [12]. However,
when we made cross section observation of our micro bump
interconnects after EM tests for certain times, there was no
EM induced voids detected.
Fig. 2. The microstructure of micro bumps interconnects after
reflow: (a) Cu post with solder bump; (b) solder bump.
(a)
140C
160
150
140
120C
130
100C
120
110
100
Results and discussion
1. Initial microstructure after reflow
The resistance of the Cu posts and solder bumps were in
the range of 10~30 mΩ. The typical initial microstructures of
the two kinds of micro bumps were shown in Fig. 2. After
assembly, in both solder bump and Cu post with SnAg solder
bump interconnects, the thickness of remaining solder was
about 5~10 µm. Side wall wetting occurred in both solder
bumps. It is quite interesting that (Cu,Ni)6Sn5 compounds
931
90
0
100
200
300
400
500
Time (hrs)
300
Relative Degradation (%)
EM tests were conducted by MIRA system. The test
vehicle was connected to sockets of the burn in board of the
MIRA system. The test temperature ranged from 100 to 140
ºC, and the current of 100 and 200 mA were applied, which
corresponded to the current densities of 2.04×104 and
4.08×104 A/cm2 respectively with respect to the bump
diameters. Samples after EM tests were cross-sectioned for
optical microscopy (OM) and scanning electron microscopy
(SEM) observation. These samples were grinded with SiC
paper, and polished with 1.0 µm diamond and 0.05µm silica
suspensions. Energy dispersive x-ray (EDX) analysis was
used to study the compositions of the joints.
(b)
250
140C
200
120C
150
100C
100
0
100
200
300
400
500
Time (hrs)
Fig. 3. Relative degradation of joint resistance under various test
temperatures with the current density of 4.08 ×104 A/cm2: (a) Cu
post with solder bumps; (b) SnAg solder bumps
2009 Electronic Components and Technology Conference
(a)
(b)
(c)
(d)
(e)
(f)
Fig. 4. OM images of interconnects with the current density of 4.08
×104 A/cm2: (a) Cu post with solder bump at 100 ºC for 500 h; (b)
Cu post with solder bump at 120 ºC for 160 h; (c) Cu post with
solder bump at 140 ºC for 132 h; (d) solder bump at 100ºC for 500 h;
(e) solder bump at 120 ºC for 160 h; (f) solder bump at 140 ºC for
132 h.
3. EM tests of Cu post with solder bump under 140 ºC with
different current densities
3.1. Tests with a current density of 4.08 ×104 A/cm2
When we continued the EM test at 140 ºC with a current
density of 4.08×104 A/cm2, we found an interesting
phenomenon. For the two test samples, the resistances
increased at beginning. In one sample, the resistance
decreased to a certain value and then kept constant. As a
contrast, the resistance of another sample kept constant when
the value reach maximum. Both of the samples seemed failed
at last according to the sudden surge in resistance.
0.06
0.05
Resistance (ohm)
For Cu post with solder bump interconnects, when tested
at 100 ºC for 500 h, low temperature solder compositions
were still existed. A very thin Cu3Sn layer was detected
between Cu and (Cu,Ni)6Sn5. When tested at 120, and 140 ºC,
even in a short time, the entire solder was converted into high
temperature IMCs. The Cu UBM became smaller and Cu3Sn
became thicker. For solder bump interconnects, the same
trend was found. Due to the larger solder volume, thinner Cu
UBM, and under high temperature test, the Cu was nearly
exhausted. At the same time, ENIG pad became thinner due to
the diffusion of Ni into bump to form (Cu,Ni)6Sn5. There
were some big voids in these interconnects near ENIG as
shown in Fig. 4(c) and (f). We suspect that they were formed
during grinding process since the IMCs were very brittle.
Present results indicate that the resistance increased in these
micro bump interconnects were due to the formation and
growth of IMCs at the solder joints. It has been proven that
thick UBM would significantly improved EM reliability due
to the elimination of the current crowding effect in the solder
joint [13]. In the present test, the bump interconnect has a
thick Cu UBM and Ni pad. Due to the elimination of the
current crowding effect and fast formation of high
temperature IMCs, traditional failure mode would not happen
in the present micro bump structures. It also has been pointed
out that there will be no EM failure under a current density
smaller than 105 A/cm2 [13, 19-20]. The current density
needed to cause EM damage for Cu6Sn5 IMC is at least one
order of magnitude larger than Sn based solder.
0.04
0.03
0.02
Sample A
Sample B
0.01
0.00
0
200
400
600
800
1000
Time (hrs)
Fig. 5. Relative degradation of Cu post solder bump interconnects at
140 ºC with the current density of 4.08 ×104 A/cm2
(a)
(b)
Fig. 6. SEM images of (a) sample A of Fig. 5; (b) near bump
without current stressing.
The resistance evolution should be closely related the
microstructure evolution. The SEM image of sample A was
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2009 Electronic Components and Technology Conference
shown in Fig. 6(a). At the joint, thick Cu3Sn, (Cu,Ni)6Sn5 and
Ag3Sn IMCs were found. Surprisingly, large cracks and huge
number of large Kirkendall voids were found. It was known
that Kirkendall voids were formed because the diffusion rate
of Cu from Cu3Sn to (Cu,Ni)6Sn5 was faster than that of Sn
from (Cu,Ni)6Sn5 to Cu3Sn [10, 21]. With the growth of
Cu3Sn, Kirkendall voids will increase. Further, in the bump,
cracks were found inside the IMCs. As comparison, in the
adjacent bump, less Kirkendall voids and cracks were found
as shown in Fig. 6(b).
The SEM image of sample B was shown in Fig. 7(a).
Similar with Fig. 6(a), the main IMCs were Cu3Sn and
(Cu,Ni)6Sn5. The remaining Cu volume was larger than that of
sample A. Again, a number of large cracks and Kirkendall
voids were found. It was interesting that although many
cracks were formed at the interface, in a long time, from 100
to 800 h, the resistance had no apparent change, which meant
the resistance was not sensitive with these cracks. The reason
may be that these cracks were not big enough to affect the
resistance value. In the adjacent bump shown in Fig. 7(b),
although a large number of Kirkendall voids were formed
inside Cu3Sn, there was no apparent crack in the joint.
(a)
Xu et al., has studied the EM of 90 µm SnAuCu solder on
Cu column at 135ºC with the current density of 1.6×104
A/cm2 [12]. Since the volume ration between solder and Cu
was larger, the main IMCs was (Cu,Ni)6Sn5 after 1290 h.
Kirkendall voids and cracks formation were not found and
reported. That meant for joints composed of different IMCs
would have different EM resistance.
Although there are a lot of cracks formed at the interface,
the open of the circuit in the tests may be caused by other
failure mechanisms. In present case, the Au wire bonding on
Al pad may have failed under present test conditions.
3.2. Tests with a current density of 2.04×104 A/cm2
When Cu post with solder bumps were tested at 140ºC with
the current density of 2.04 ×104 A/cm2, the effect of the
electron flow direction on the resistance change was studied.
As shown in Fig. 8, it can be seen that there was no bump
failure up to 1000 h. It seemed the electrical resistance had
not reached the plateau stage. Resistance increased a little bit
faster in the bumps where electrons flow from Cu to ENIG.
As shown in Fig. 9, when electrons flow from ENIG to Cu
UBM, thick (Cu,Ni)6Sn5 compound layer formed on ENIG
side. While electrons flow in a opposite way, more
(Cu,Ni)6Sn5 IMCs formed on Cu side. That meant when
electrons flow from Cu to ENIG, the diffusion of Cu was
accelerated. When electrons flow from ENIG to Cu, the
diffusion of Ni was accelerated. Since the diffusion rate of Ni
(b)was slow, the diffusion rate of Cu was dominant for resistance
increase and resistance increase rate would be faster when
electrons flow from Cu side.
Relative degration R (%)
160
(b)
Electron flow from Cu to ENIG
150
140
130
120
110
Electron flow from ENIG to Cu
100
0
100
200
300
400
500
600
700
800
900 1000 1100
Time (hrs)
Fig. 8. Relative degradation of Cu post interconnects with different
electron flow direction with the current density of 2.04 ×104 A/cm2.
Fig. 7. SEM images of (a) sample B of Fig. 5; (b) near bump
without current stressing.
It has been mentioned that current stressing would
enhanced the Kirkendall voids formation. In the present
study, we suspect that current stressing would also enhance
the formation and propagation of cracks along grain boundary
and/or phase boundary. Although this hypothesis would
require more work for verification, the accelerating formation
and propagation of cracks would be a main failure mode for
micro bump joints composed of IMCs under high temperature
with current stressing.
933
(a)
(b)
e-
eFig. 9. OM images of Cu post with solder bump after test with
the current density of 2.04×104 A/cm2 with different electron flow
direction for 1000 h: (a) from ENIG to Cu UBM; (b) from Cu UBM
to ENIG.
2009 Electronic Components and Technology Conference
4. Discussion: the correlation between microstructure
evolution and resistance change
As above mentioned, after reflow, there were low
temperature solder and (Cu,Ni)6Sn5 IMCs at the solder joint.
Under a high temperature with current flow, materials
diffusion would be accelerated. Following reaction would
occur:
Cu  Sn  Ni  (Cu , Ni ) 6 Sn5
(1)
Cu  Cu6 Sn5  Cu3 Sn
(2)
At the beginning, the reaction (1) was dominating. With
the diffusion between Cu, Ni and Sn, more (Cu,Ni)6Sn5
compounds would be formed until all Sn was consumed. At
the same time, Cu3Sn compounds between Cu and
(Cu,Ni)6Sn5 would continue growing. After solder
consumption, reaction (2) would be dominant. The final IMC
products are dependant on the temperatures. The higher the
temperature, the more Cu3Sn would form.
In present EM test, the resistance evolution was mainly
dependant on the phase transformation since there was no
formation of pancake cracks along UBM or substrate.
Table 1. Resistivity of different materials in the bump
interconnect.
Materials
Resistivity at
20C(µΩ-cm)
Cu
Ni
Sn3.5Ag
Cu3Sn
Cu6Sn5
1.7*
6.2*
11.5*
8.3a
17.5a
*Data from Ref. [17]; aData from Fef. [20]
According to the materials resistivity, the two reactions
would cause resistance changes. For reaction (1), since the
resistivity of Cu6Sn5 was higher than Cu, Ni and solder, the
resistance of micro bump would increase. For reaction (2), the
formation and growth of Cu3Sn would decrease the resistance
since it has a low resistivity comparing with Cu6Sn5. When
diffusion reached equilibrium state, the resistance would not
change if there was no failure caused by the crack
propagation or failure of Au wire bonding.
Conclusions
New features of EM test of micro solder bumps were
observed, and some of the important results are summarized
in the followings.
1.
The increasing of electrical resistance of micro solder
bumps under high temperature (100~140 ºC) and
current stressing (2.04×104, 4.08×104 A/cm2) was
mainly due to the formation of high temperature IMCs.
The higher the temperatures, the faster the resistance
increase-rate.
2.
Under the same test temperature, the electrical
resistance increase-rate in all SnAg solder bump
interconnects was faster than that of Cu post with SnAg
solder bump joint. The reason was that after bonding,
there was more low temperature phase in solder bump
and under current stressing, more IMCs would be
formed.
3.
4.
5.
For Cu post with SnAg bumps tested at 140 ºC with a
higher current density of 4.08×104 A/cm2, the
resistances would reach the plateau region after certain
time (50~200 h), where the diffusion between different
materials, i. e., Cu, Ni and Sn reached equilibrium, and
IMCs became quite stable. A large number of
Kirkendall voids in Cu3Sn compounds were found
under high temperature, and high current densities. Due
to the brittle nature, large cracks along (Cu,Ni)6Sn5
grain boundaries were also found which would cause
the failure of the interconnect suddenly.
For Cu post with SnAg bumps tested at 140 ºC with a
lower current density of 2.04×104 A/cm2, the resistances
did not reach the plateau region after 1000 h test due to
less joule heating effect. The electron flow direction has
an effect on the diffusion of materials. The resistance
increase faster when electrons flow from Cu UBM to
ENIG.
Present tests indicated that the EM failure mode and
mechanism of micro bumps were total different from
larger solder joints since the resistance increase of
micro bump is not due to the tradition pancake crack
formation, but the IMC growth and phase
transformation.
Acknowledgments
This work is the result of a project initiated by the 9th IME
Electronic Packaging Research Consortium (EPRC-9). The
members of this project are ASM Technology Singapore Pte
Ltd, BASF, Chartered Semiconductor Manufacturing Ltd.,
DISCO Corporation, IBI IBIDEN Co., Ltd., Infineon
Technologies Asia Pacific, THE LINDE GROUP, Shanghai
Sinyang Semiconductor Materials Co., Ltd, Tango Systems,
Inc., United Microelectronics Corporation, Institute of
Microelectronics (IME) and Institute of High Performance
Computing (IHPC). The authors appreciate the members of
EPRC 9 - Project 3 and staffs in IME who had contributed
and made this work possible.
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