NXP LOGIC PRODUCT FAMILY LIFE CYCLE PHASE
Development phase
New product family in
development stage
Growth phase
Maturity phase
Decline phase
Growing market adoption and
recommended for new designs
Mainstream, established high volume
product family, moderate growth, no EOL
plans
Stable production nearing
end of life, recommended to
migrate new designs to
alternative product family
options
SALES VOLUME
CBT
AHC(T)/VHC(T)/XC7
LVT/
ALVT
HC(T)
HEF
EOL phase
End of Life —
product
discontinuation
CBTLV
LVC
LV
ALVC
AVC
AUP
ABT
LV-A
AXP
Development phase
NPIC
FAST
LIFE CYCLE PHASE
Growth phase
Maturity phase
Decline phase
EOL phase
NPIC
AHC(T)
VHC(T)
XC7
HC(T)
HEF
CBT
ABT
FAST
LV-A
AXP
AUP
LVC
AVC
ALVC
LVT
CBTLV
LV
High
voltage
Low
voltage
ORANGE = New product family introduction
BOLD = Volume leader in Logic portfolio NXP LOGIC PRODUCT FAMILY SEGMENTATION
Logarithmic
scale
1000.0
HEF (60 ns, ±3 mA)
600.0
NPIC (5 ns, 100 mA)
120.0
LVT
ALVT
Standby current (µA)
90.0
(1.5 ns, -32/64 mA)
HC(T) (9 ns, ±8 mA)
80.0
ALVC
50.0
More current
(2 ns, ±24 mA)
AHC(T)/VHC(T)/XC7 (5 ns, ±8 mA)
40.0
LV
20.0
(2 ns, -32/64 mA)
(9 ns, ±8 mA)
LV-A (4 ns, ±8 mA)
LVC (2 ns, ±24 mA)
10.0
LVC (Mini Logic only)
AVC (2 ns, ±8 mA)
Less current
CBTLV
3.0
CBT
(0.15 ns, N/A)
(0.25 ns, N/A)
2.0
0.9
AUP (4 ns, ±4 mA)
AXP (3 ns, ±8 mA)
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
Operating voltage (V)
High voltage
Low voltage
Legend: Product family (Typical prop. delay tPD, drive current)
9.0
10.0
11.0
12.0
13.0
14.0
15.0