hecs-1 1 Analysis and Verification of Sequential Programs Discovering the Z3 SMT-solver Exercice 1.1 : Q1. Use the z3 SMT-solver to decide if the following problem admits solutions. Does there exist a, b, c ∈ Z and f : Z → Z such that a = c + 1 ∧ c = 1 − b ∧ f (a) 6= f (b) Q2. Modify the constraints such that the problem has a model and ask the model using (get-model) Exercice 1.2 : Encoding a binary adder in propositional logic The goal is to use assertions to encode the relation (sn , sn−1 , . . . , s0 ) = (an−1 , . . . , a0 ) ⊕ (bn−1 , . . . , b0 ) where the vectors of ai , bi , si are vectors of bits and ⊕ denotes the binary addition of bit vectors. Introduce an additional bit vectors (cn , . . . , c0 ) for the carries. Dene si in terms of ai , bi , ci and ci+1 in terms of ai , bi , ci using =,ite,xor,and,or,.... Indication : Q3. Consider the case n = 2, encode and check your encoding. Show that 2+2=4. Indication : Complete the table ai 0 bi 0 ci 0 si ci+1 .. .. 0 0 1 .. .. 0 1 0 .. .. 1 0 0 .. .. 0 1 1 .. .. 1 0 1 .. .. 1 1 0 .. .. 1 1 1 .. .. Take your favorite programming language and write a function adder(n) to generate automatically the assertions for the case for vectors of size n. Q4. Exercice 1.3 : Validation of your specication Q5. Use z3 to check that your specication is deterministic. Indication : Q6. Duplicate some parts of your specication and check that it is impossible to have ~c = ~a ⊕ ~b and c~0 = ~a ⊕ ~b and ~c 6= c~0 Use z3 to check that your adder result is correct for random inputs. Exercice 1.4 : Using the z3 bit-vectors. Q7. Use z3 bit-vectors to encode a binary adder. Indication : Use n-bits bit vectors A,B,S for operands,result and an n + 1-bits bit vector C for the carry. Use operators bvand,bvor,bvxor,(- extract i j ). . . Example : (declare-const A (_ BitVec 5)) Q8. Using z3, mosig-hecs Compare your specication to the builtin bvadd operator. Université Grenoble-Alpes 1
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