TEXAS INSTRUMENTS INC.
HIGH PERFORMANCE ANALOG
HIGH SPEED AMPLIFIERS
Design Guide
Load Sharing Concepts: Implementation
for Large-Signal Applications
Pavol Balaz
Contents
1 What Constitutes a Large Signal?
1
2 Load Sharing Amplifiers
2.1 Concepts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Output DC Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2
2
4
3 Load Sharing Amplifiers and Distortion Performance
5
4 THS3091 Test Circuit and Load Sharing
4.1 Test Circuit . . . . . . . . . . . . . .
4.2 PCB Design / Thermal Discussion .
4.3 Measured Performance . . . . . . . .
Performance
. . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . .
5 Conclusion
7
8
8
11
14
ii
List of Figures
V
V
1.1
1 kHz Harmonic Distortion vs. Output Voltage (THS6182, G = -1
, 1 kHz) .
1
2.1
2.2
2.3
Load Sharing Conceptual Block Diagram . . . . . . . . . . . . . . . . . . . . .
Two THS3091 Amplifiers in Load Sharing Configuration . . . . . . . . . . . .
Simplified Load Sharing Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . .
3
3
5
2.4
2.5
3.1
Example of Mismatched Amplifier Output Voltages . . . . . . . . . . . . . . . .
Difference in Amplifier Current vs. Series Output Resistor . . . . . . . . . . . .
Harmonic Distortion vs. Load Resistance Graph from OPA695 Data Sheet . . .
6
6
7
4.1
4.2
4.3
4.4
4.5
4.6
Reference THS3091 Single and Load Sharing Test Configurations . . . . . . .
Top Layer and Overlay (Signal) . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mid Layer 1 (GND) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Mid Layer 2 (+VS ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Bottom Layer (−VS ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
30 MHz Sine Wave Output, Single THS3091 (G = 5 VV , Signal Level Referred
to Amplifier Output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
30 MHz Sine Wave Output, Dual THS3091 Load Sharing (G = 5 VV , Signal
Level Referred to Amplifier Output) . . . . . . . . . . . . . . . . . . . . . . . .
60 MHz Sine Wave Output, Single THS3091 (G = 5 VV , Signal Level Referred
to Amplifier Output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60 MHz Sine Wave Output, Dual THS3091 Load Sharing (G = 5 VV , Signal
Level Referred to Amplifier Output) . . . . . . . . . . . . . . . . . . . . . . . .
Harmonic Distortion vs. Frequency, Single THS3091 . . . . . . . . . . . . . .
Harmonic Distortion vs. Frequency, Dual THS3091 Load Sharing . . . . . . .
Second-Harmonic Distortion vs. Frequency, Single and Dual (Load Sharing)
THS3091 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Third-Harmonic Distortion vs. Frequency, Single and Dual (Load Sharing)
THS3091 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9
10
10
10
10
4.7
4.8
4.9
4.10
4.11
4.12
4.13
11
11
12
12
13
13
14
14
List of Tables
3.1
Harmonic Distortion for 100 Ω and 1 kΩ Loads (from THS3091 Data Sheet) .
iii
8
1 What Constitutes a Large Signal?
What Constitutes a Large Signal?
www.ti.com
Most operational amplifier data sheets define large signal as any output signal that swings
greater than 2 aVPLarge
amplifiers and 5 VP P for ±15-V amplifiers. However, the per1
What Constitutes
Signal?
P for ±5-V
formance that is specified as large signal depends on the intended application as well as the
Most operational
amplifier data sheets define large signal as any output signal that swings greater than
internal architecture of the specific device. For example, analog-to-digital converter (ADC)
2 VPP for ±5-V amplifiers and 5 VPP for ±15-V amplifiers. However, the performance that is specified as
driver amplifiers - such as the low-voltage, ±5-V, fully-differential, voltage-feedback architeclarge signal depends on the intended application as well as the internal architecture of the specific device.
ture THS4521 - specify a 2-VP P large-signal bandwidth because 2 VP P is a common ADC
For example, a low-voltage, +5-V, fully-differential,
voltage-feedback architecture analog-to-digital
analog
input
range.
On thesuch
otheras
hand,
high-voltage,
+28-V,a current-feedback
architecture,
converter
(ADC)
driver
amplifier
the aTHS4521
specifies
2-VPP large-signal
bandwidth because 2
high
output
power
line
driver
device
such
as
the
THS6204
specifies
large-signal
performance
VPP is a common ADC analog input range. On the other hand, a high-voltage ,+28-V,
current-feedback
for
4-V
to
20-V
output.
P
P
P
P
architecture, high output power line driver device such as the THS6204 specifies large-signal performance
for 4-VPPIntofact,
20-V
output.voltage swing of an amplifier can affect the bandwidth by more than 50%
PP output
the
at 20-V
compared
a small-signal
(200
mVP Pthe
) bandwidth
a direct
of slew
P P output
In fact, the
output
voltage
swing oftoan
amplifier can
affect
bandwidthasby
more result
than 50%
at 20-VPP
rate
limitation
or
loading.
For
a
detailed
discussion
on
the
parameter
affected
by
the
output compared to a small-signal (200 mVPP) bandwidth as a direct result of slew rate output
limitation or
swing, please
refer to on
the the
application
note Large-Signal
Specifications
for High-Voltage
loading.voltage
For a detailed
discussion
parameters
affected by the
output voltage
swing, refer to the
Linenote
Drivers
(SBOA126)Specifications
available for download
from the Line
TI website.
a first-order
rule,
application
Large-Signal
for High-Voltage
Drivers As
(SBOA126),
available
for
distortion
performance
also
degraded by
6 dB
for second-harmonic
12 dB
for thirddownload
from the
TI website.isAs
a first-order
rule,
distortion
performanceand
is also
degraded
by 6 dB for
second-harmonic
distortionevery
and time
12 dB
third-harmonic
distortion
every
timeisthe
signal
doubles. This
harmonic distortion
thefor
signal
amplitude doubles.
This
behavior
shown
in figure
behavior
shown
in Figure
1 for the
a 1-kHz
signal using the THS6182.
1.1isfor
a 1 kHz
signal using
THS6182.
THS6182: G = -1 V/V, 1 kHz
HARMONIC DISTORTION vs OUTPUT VOLTAGE
Figure 1.1: 1 kHz Harmonic Distortion vs. Output Voltage (THS6182, G = -1
V
V
, 1 kHz)
-100
Harmonic Distortion (dBc)
-105
Second Harmonic (dBc)
-110
-115
-120
-125
-130
-135
Third Harmonic (dBc)
-140
-145
VS = ±15 V
-150
1
10
Output Voltage (VPP)
Figure 1. 1-kHz Harmonic Distortion vs. Output Voltage (THS6182)
Slew rate, output voltage swing and output current are key operational amplifier parameters
to consider for large signals applications, especially when targeting low distortion as key design
Slew rate,
output voltage
swing, here
and is
output
areofkey
operational
amplifier
parameters
parameter.
As a reminder,
a briefcurrent
summary
these
three specific
parameters
and theto consider
for largerespective
signals applications,
in bandwidth,
particular when
targeting
low distortion
as key design parameter. As a
relationships to
distortion
and amplifier
architecture.
reminder, here is a brief summary of these three specific parameters and the respective relationships to
bandwidth, distortion, and amplifier architecture.
1. Slew rate is directly related to the large-signal bandwidth of an operational amplifier. Slew rate
limitation may also be a factor in the distortion 1of the amplifier. As a rule of thumb, to be able to
support 80 dBc for a given frequency, the amplifier achievable slew rate must be 20x the slew rate
requirement to support the signal at that frequency.
2. The amplifier output current sourcing and sinking ability into the load determine the output voltage
swing range of the device. As the load current increases, distortion suffers. Additionally, high-speed
large signal swings into a capacitive load require the amplifier to quickly charge and discharge the
load. Depending on the load capacitance, the limited amplifier current sourcing and sinking ability may
1. Slew rate is directly related to the large-signal bandwidth of an operational amplifier.
Slew rate limitation may also be a factor in the distortion of the amplifier. As a rule of
thumb, to be able to support 80 dBc for a given frequency, the amplifier achievable slew
rate must be 20x the slew rate requirement to support the signal at that frequency.
2. The amplifier output current sourcing and sinking ability into the load determine the
output voltage swing range of the device. As the load current increases, distortion suffers.
Additionally, high-speed large signal swings into a capacitive load require the amplifier
to quickly charge and discharge the load. Depending on the load capacitance, the limited
amplifier current sourcing and sinking ability may lead to a lower effective slew rate into
the capacitive load.
3. The amplifier output is distorted as it approaches the output voltage swing range as a
result of compression because the transistor swing is getting too close to the voltage rail.
In high voltage swing applications, where an operational amplifier is pushed to drive close to
its supply rail, it is possible to drive several identical operational amplifiers in parallel and
combine the outputs to achieve higher bandwidth and lower distortion. The remainder of this
design guide develops this concept of load sharing and demonstrates how this technique can
be used to reduce current sourcing and sinking requirements towards the amplifier.
2 Load Sharing Amplifiers
2.1 Concepts
The fundamental concept of load sharing is to drive a load using two or of the same operational
amplifiers. Each amplifier is driven by the same source. Figure 2.1 shows three THS3091
amplifiers sharing the same load.
This concept effectively reduces the current load of each amplifier by
of amplifiers.
1
N,
where N is the number
The balance of this report focuses on selection of component values and demonstrated performance improvements.
Figure 2.2 shows two THS3091 devices in a typical load sharing configuration.
In this example, each THS3091 is configured in a non-inverting gain of +5 VV with the two noninverting inputs connected to a common input signal, VIN . Several items are worth noting:
• In order to provide matching to the 50 Ω load, each output has a 100 Ω resistor in series.
Looking from the load, these two resistors appear to be in parallel, providing the desired
50 Ω matching.
2
Load Sharing Amplifiers
www.ti.com
2
Load Sharing Amplifiers
2.1
Concepts
2 Load Sharing Amplifiers
The fundamental concept of load sharing is to drive a load using two or more of the same operational
amplifiers. Each amplifier is driven by the same source. Figure 2 shows three THS3091 amplifiers sharing
the same load.
Figure 2.1: Load Sharing Conceptual Block Diagram
THS3091
VOUT
THS3091
VIN
THS3091
Figure 2. Load Sharing Conceptual Block Diagram
Load Sharing Amplifiers
www.ti.com
shows two
THS3091 devices Amplifiers
configured in a typical
sharingSharing
configuration. Configuration
Figure Figure
2.2:3 Two
THS3091
inload
Load
This concept effectively reducesR the current
load of each amplifier by 1/N,
where
N is the number of
R
V+
V250 W
1 kW
amplifiers.
+
+
V
V
G1
F1
1
2
15 V
-15 V
The balance of this report focuses on selection
of component values and demonstrated performance
VR
improvements.
100 W
S1
RSOURCE
50 W
VIN
V+
RG2
250 W
RF2
1 kW
VOUT
RLOAD
50 W
V-
RT2
100 W
TL1
Characteristic
Impedance
50 W
THS3091
U1
RT1
100 W
RS2
100 W
THS3091
U2
V+
Figure 3. Two THS3091 Amplifiers in Load Sharing Configuration
In this example, each THS3091 is configured in a noninverting gain of +5 V/V with the two noninverting
• The matchinginputs
minimizes
reflections
the
load
end
of the transmission line. This comes
tied to a common
input signal, V . at
Several
items
are worth
noting:
• Each output has 100-Ω resistors in series. This configuration provides matching to the 50-Ω load.
at the expense
of
6
dB
attenuation
of
the
signal
that
reaches
the
load.
Looking from the load, then, both resistors appear to be in parallel, presenting
a 50-Ω
matched
IN
impedance to the 50-Ω load through the transmission line.
The matched
load 50-Ω impedance
minimizes reflections
the load
end ofΩ
theresistors
transmission line.
This appear to be in
• The matched• input
impedance
is realized
with attwo
100
that
reduced reflection, however, comes at the expense of 6-dB attenuation of the signal that reaches the
load.
parallel with the
50 Ω source.
•
The matched input impedance is realized with two 100-Ω resistance that appear to be in parallel with
the 50-Ω source.
SBOA127
– October 2011 where back or double terminations
Load Sharing Concepts:
Implementation
Large-Signal
Applications
For applications
is not
required
orfordesired,
placing
a non- 3
For applications where back or double termination is not required
or desired,
a non-zero resistor
on each
Submit Documentation Feedback
amplifier output is highly recommended; the resistors help to balance the current load so that each
Copyright
© 2011,
Texas highly
Instrumentsrecommended.
Incorporated
zero resistor on each
amplifier
output
is still
Doing
amplifier
provides the same
current. Because
both amplifiers are
low-impedance, this configuration
also this ensures that
minimizes the tendency of one amplifier driving the other amplifier, as could be the case if the output
there is a balance offset
in the
current
load
so
that
each
amplifier
drives
the
same
current. Since
voltages were different.
The
next
section
focuses
on
the
dc
offset
contribution
that
results
in
unequal
load
current
distribution.
both outputs are low
impedance, this also minimizes the tendency of one amplifier output
Differences in gain from one amplifier to the next because of mismatched resistors also leads to
imbalanced
load if
currents.
driving the other, as
couldoutput
bevoltages
the and
case
the output offset voltages were different.
Note that the topic of gain mismatch is not developed in this report, but may need to be considered,
depending on the final application.
3
4
Load Sharing Concepts: Implementation for Large-Signal Applications
Copyright © 2011, Texas Instruments Incorporated
SBOA127 – October 2011
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2 Load Sharing Amplifiers
The next section focuses on unequal load current distribution caused by the DC offset voltage.
Differences in gain from one amplifier to the next due to mismatched gain / feedback resistors
also lead to imbalanced output voltages and currents. However, please note that this topic
is not discussed in this document but may need to be considered depending on the final
application.
2.2 Output DC Offset
The goal of the load sharing concept is to reduce the current load of each amplifier by equally
distributing the total current load among all the amplifiers ( N1 ). Thus, it has to be ensured that
neither amplifier supplies the majority of the load current and that neither amplifier sources
/ sinks current into / from the output of the other amplifier(s). Failing to achieve this would
entirely defeat the purpose of the load sharing concept.
Also, please note that while this concept reduces the output current requirement for a given
amplifier, the output voltage swing requirement remains unchanged. This allows us to select
from a bigger range of amplifiers, thus possibly achieving a higher bandwidth than would
otherwise have been possible with monolithic amplifiers.
Mismatched output voltages can result in imbalanced load currents. One possible source of
mismatch is output-referred offset voltage. The worst-case can be calculated using equation
2.1.
VOS_RT O = |VOS | · (1 +
RF
RF
) + |IB+ | · RN E · (1 +
) + |IB− | · RF
RG
RG
(2.1)
Where VOS is the input offset voltage, IB± is the non-inverting / inverting input bias current
and RN E is the equivalent resistance looking out of the non-inverting terminal.
For the THS3091, the maximum input offset voltage is 4 mV and the maximum non-inverting
/ inverting input bias current is 20 µA. Looking out of the non-inverting terminal of either
amplifier yields in an equivalent series resistance of RT 1 k RT 2 k RSOU RCE = 25Ω. Using these
values in equation 2.1 results in:
VOS_RT O = 4mV · (1 +
1kΩ
1kΩ
) + 20µA · 25Ω · (1 +
) + 20µA · 1kΩ = 42.5mV
250Ω
250Ω
(2.2)
Presuming that the offset can either be positive or negative, the resulting voltage difference
at DC can be as high as 85 mV for two amplifiers - assuming the gain resistors are perfectly
matched.
Although amplifiers in a dual package should have better matching than single operational
amplifiers, a dual package approach is not recommended because of limited power supply
rejection isolation in the standard dual footprint package. This is due to the fact that the
power supply pins are shared - this could lead to positive feedback on the other amplifier, thus
4
configuration, an offset of ±42.5 mV for each amplifier indicates that a voltage as high as 85 mV can be
developed between the two outputs at dc, assuming perfectly-matched gain-setting resistors.
Although dual amplifiers should have better matching than single operation amplifier, a dual operational
amplifier in a single package approach is not recommended because of limited power-supply rejection
(PSR) isolation in the standard dual footprint package. In a dual standard footprint package, the
resulting
oscillations.
issue which
favours
single
operational
amplifiers
thermal
power-supply
pinsinare
shared; The
this other
configuration
could
lead
to positive
feedback
onisthe
other amplifier,
and resultdissipation,
in oscillations.
Thewhen
otherheavy
issueloads
to consider
if looking into a dual operational amplifier in a single
especially
are concerned.
package is thermal power dissipation, especially where heavy loads are concerned.
The circuit shown in figure 2.2 can be simplified for further analysis as shown in figure 2.3.
Consider
where3 the
is at 0 V. Due
to the non-ideal
and bias
of Consider
the
The circuit
shownaincase
Figure
caninput
be simplified
for further
analysisoffset
as shown
in currents
Figure 4.
a case
where theamplifiers,
input to the outputs
load sharing
at 0 V.
Because
theoutputs
non-ideal
offset
and/bias currents
are notamplifiers
0 V. In theisworst
case
situation,ofthe
are at
positive
of the amplifiers,
the outputs
are not 0 (see
V. In
the worst-case
situation, the output of Amplifier U1 is the
negative worst
case, respectively
equations
2.1 and 2.2).
positive worst-case, output-referred offset voltage and the output of Amplifier U2 is the negative
worst-case offset.
Figure 2.3: Simplified Load Sharing Circuit
RS
U1
VAMP1 = +VOS_RTO
0V
VOUT
RLOAD
RS
U2
VAMP2 = -VOS_RTO
Figureresistors
4. Simplified
Sharing
Circuit
With matched series output
(RS ), theLoad
voltage
at the load
(VOU T ) is 0 V. The current
VOS_RT O
from amplifier U1 and U2 is ± RS , respectively.
Amplifier U1 is sourcing current into the output of U2 without generating any signal on the
best,Sharing
this configuration
would dissipate
power and at
BOA127 – Octoberload.
2011 This is not a desired behavior. AtLoad
Concepts: Implementation
for Large-Signal
Applications
ubmit Documentation
Feedback
worst,
it could damage the amplifiers. RS is therefore necessary in order to limit the current
Copyright © 2011, Texas Instruments Incorporated
that one amplifier attempts to drive into the other in this worst-case scenario.
The difference in the two currents is given by equation 2.3.
VOS_RT O
VOS_RT O
=
− −
RS
RS
IDIF F
=2·
VOS_RT O
RS
(2.3)
This is best illustrated with an example. If RS is chosen to be 5 Ω for a configuration with two
THS3091 amplifiers, the worst-case difference in the output currents is 2 · 42.5mV
= 17mA.
5Ω
During normal operation, if the nominal output of each amplifier in figure 2.4 is 5 V, the worst
case results in the voltages being 5V ± 42.5mV because of the mismatched offset voltages.
Figure 2.4 shows the resulting currents. As expected, amplifier U1 supplies 17 mA more than
U2. Thus, U1 will have to dissipate more heat and will be more susceptible to failure. Also,
due to the higher output current, the harmonic distortion shown by U1 will increase.
The difference in amplifier currents can be plotted against the series resistor RS . Figure 2.5
shows the difference in amplifier currents for two load sharing THS3091 amplifiers versus the
series resistor RS . With RS increased to 10 Ω, the difference in amplifier currents is reduced
to 4.25 mA.
5
configuration with two THS3091 amplifiers in a load sharing configuration, the worst-case difference in the
two amplifier output currents is 17 mA (= 2 ● 42.5 mV / 5 Ω). During normal operation, if the nominal
output of each amplifier in Figure 5 is 5 V, the worst case is that the output of Amplifier U1 is 5.0425 V
and the output of Amplifier 2 is 4.9575 V (or the other way around) because of the mismatched offset
3 Load
Distortion
Performance
voltages. Figure 5 shows
the Sharing
resulting Amplifiers
currents. Asand
expected,
Amplifier
U1 supplies 17 mA more current to
the load than does Amplifier U2. The total current to the load is the same, but one amplifier always
appears to be hotter than the other, and will be more susceptible to failure. In this example, Amplifier U1
also shows harmonic
distortion
that is worse
than expected.
Figure
2.4: Example
of Mismatched
Amplifier Output Voltages
RS = 5 W 56.11905 mA
U1
VAMP1 = 5.0425
95.2381 mA
VOUT = 4.7619
V
Load Sharing
Amplifiers
and Distortion Performanc
ww.ti.com
RLOAD = 50 W
The difference in amplifier currents Rcan
be39.11905
plotted
mA against the series resistor, RS. Figure 6 shows the
1=5W
U2
difference in amplifier currents
for two load sharing THS3091 amplifiers versus the series resistor, RS.
= 4.9575
With an RS of 10 Ω, the differenceVAMP2
in amplifier
currents is reduced to 4.25 mA.
DIFFERENCE
IN AMPLIFIER
CURRENTS Unbalanced Amplifier Currents
Figure 5. Example of Mismatched Amplifier
Output
Voltages Producing
vs SERIES OUTPUT RESISTOR
Figure 2.5: Difference in Amplifier Current vs. Series Output Resistor
Difference in Amplifier Currents (mA)
50
45
40
35
30
25
20
15
10
5
0
0
10
20
30
40
50
Series Output Resistor (W)
Figure 6. Difference in Amplifier Currents for Two Load Sharing THS3091 Amplifiers vs Series Output
Resistor
Load Sharing Amplifiers and Distortion Performance
3 Load Sharing Amplifiers and Distortion
Performance
6
Load
Concepts:
Implementation
Large-Signal
Applications
SBOA127 – October 2011
In addition
to Sharing
providing
higher
outputforcurrent
drive
to the load, the load sharing configuration
can also
Submit Documentation Feedback
provide improved distortion performance.
In
many
cases,
an
operational
amplifier
shows
better
distortion
Copyright © 2011, Texas Instruments Incorporated
performance as the load current decreases (that is, for higher resistive loads) until the feedback resistor
starts to dominate the current load. In a load sharing configuration of N amplifiers in parallel, the
equivalent current load that each amplifier drives is 1/N times the total load current. For example, in a
In addition
to providing
higher output
drive resistance
to the load, the
loadtosharing
two-amplifier
load sharing
configuration
withcurrent
matching
(refer
Figureconfiguration
3) driving a resistive
provide
improvedisdistortion
performance.
In many
cases,
amplifier
load, RL, can
eachalso
series
resistance
2 ● RL and
each amplifier
drives
2 ●anRoperational
.
L
shows better distortion performance as the load current decreases (that is, for higher resistive
A convenient
whether
an op
amp
function
in aload.
loadInsharing
configuration
loads)indicator
until the of
feedback
resistor
starts
towill
dominate
the well
current
a load sharing
config- is the
characteristic
performance
graphinof
harmonic
distortioncurrent
versusload
load
Such
uration
with N amplifiers
parallel,
the equivalent
forresistance.
each amplifier
is N1 graphs
times can be found
in most ofthe
TI’s
high-speed
amplifier
data
sheets.
These
graphs
can
be
used
to
obtain
a
general sense of
total load current. Looking at a load sharing configuration of 2 amplifiers with matching
whether or
not an amplifier
will show
improved
distortion
performance
in load sharing configurations.
resistance
(refer to figure
2.2) driving
a resistive
load R
L , each series resistance is 2 · RL and
each amplifier drives 2 · RL .
6
A convenient indicator of whether an operational amplifier will benefit from a load sharing configuration is the characteristic performance graph of harmonic distortion versus load resistance.
Load Sharing Amplifiers
and Distortion
Performance
Such graphs
can be found
in most of TI’s high-speed amplifier data sheets.
www.ti.com
For example,
Figure figure
7 (from
OPA695
product
data
sheet)
provides
a figure
of 10-MHz
harmonic
For example,
3.1 the
(from
the OPA695
data
sheet)
provides
a figure
of 10 MHz
harmonic
distortiondistortion
versus load
resistance.
This graph
shows
9-dB9 improvement
in second-order
versus
load resistance.
This graph
shows
dB improvement
in second-orderharmonic
harperformance
a load ofwith
200aΩload
compared
a 100-Ω to
load.
Third-order
harmonic performance
also
monicwith
performance
of 200 Ωtocompared
a 100
Ω load. Third-order
harmonic
shows an
improvement
of
about
6
dB.
Consequently,
the
OPA695
may
be
a
good
candidate
for
a
load
performance shows an improvement of about 6 dB. Consequently, the OPA695 may be a good
sharing configuration
twosharing
OPA695
amplifiers of
driving
a 100-Ωamplifiers
load. Thedriving
apparent
load
to each OPA695
candidate for aofload
configuration
two OPA695
a 100
Ω load.
will be double
the
shared
resistor
load,
or
200
Ω.
The apparent load to each OPA695 will be double the shared resistive load, or 200 Ω.
10-MHz HARMONIC DISTORTION
vs LOAD RESISTANCE
Figure 3.1: Harmonic Distortion vs. Load Resistance Graph from OPA695 Data Sheet
Harmonic Distortion (dBc)
-50
VO = 2 VPP
G = 8 V/V
-60
Second Harmonic
-70
-80
Third Harmonic
-90
-100
50
100
500
Load Resistance (W)
Figure
7. Harmonic
vs. distortion
Load Resistance
Graph
from OPA695
DataasSheet
However,
please noteDistortion
that harmonic
does not always
improve
monotonically
the
resistive load increases. For example, figure 3.1 shows that third-harmonic distortion reaches
a minimum
at ahowever,
200 Ω load.
a 500 distortion
Ω load, third-harmonic
distortion
is virtually
the
It is important
to note,
thatWith
harmonic
does not always
improve
monotonically
as the
same as increases.
with a 100 Ω
load while
second-harmonic
distortion continues
to improve.
Anotherdistortion
load resistance
Figure
7 shows
that for the OPA695,
for example,
third-harmonic
affecting
the distortion
performance
the output
signal swing.
Increasing
latterthe same as
reachesparameter
a minimum
at a 200-Ω
load. With
a 500-Ωisload,
third-harmonic
distortion
is the
virtually
that observed
with a degrade
100-Ω load,
while second-harmonic
distortion
continues
to improve. Distortion
will typically
the distortion
performance, though
not always
monotonically.
performance also varies with the output signal swing, typically degrading as the output swing increases,
Product data sheets that do not include harmonic distortion versus load resistance graphs
though not
always monotonically.
usually include distortion versus frequency graphs for different load resistances. The typical
Product distortion
data sheets
that do not
versusloads
loadmay
resistance
graphs usually
include
performance
at ainclude
specificharmonic
frequency distortion
for two different
also be included
in
distortionthe
versus
frequency
graphstable.
for different
load resistances.
Thedata
typical
performance at a
Electrical
Specifications
For example,
the THS3091
sheetdistortion
includes typical
specific distortion
frequencyperformance
for two different
mayΩalso
included
thedistortion
Electricalperformance
Specifications
graphsloads
for 100
and be
1 kΩ
loads. inThe
at table. For
V
example,10the
THS3091
data
sheet
includes
typical
distortion
performance
graphs
for
100-Ω
MHz for a 2 V gain configuration and 2 VP P output are also included in the Electricaland 1-kΩ
loads. The
distortion performance
at 10 MHz
forgiven
a 2-V/V
gain3.1.
configuration
and
2-VPP output are also
Characteristics
table for this device
and are
in table
It shows that
second-harmonic
includeddistortion
in the Electrical
Characteristics
forload
thisthan
device,
given
in Table
1. The data show that
performance
is better withtable
a 1 kΩ
with and
a 100are
Ω load
while
third-harmonic
second-harmonic
distortion
performance
is
better
with
a
1-kΩ
load
than
with
a
100-Ω
load; however,
distortion is superior with a 100 Ω load compared to a 1 kΩ load.
third-harmonic distortion is better with a 100-Ω load than with a 1-kΩ load.
Assuming the THS3091 has been chosen to drive a 20 VP P signal into a 100 Ω load (a double-
Supposeterminated,
the THS3091
chosen
drive
a 20-V
into a 100-Ω
load (in
other words,
PP signal
50 Ωiscable)
and to
load
sharing
is being
considered,
no definitive
conclusion
can bea
double-terminated,
cable) and data
loadprovided
sharingby
is the
being
considered.
No definitive
conclusion can be
reached using50-Ω
the performance
data
sheet and additional
characterization
reachedwould
from the
available
100-Ω
and
1-kΩ
performance
data
and
additional
characterization
would be
be required.
required.
Table 1. Harmonic Distortion for 100-Ω and 1-kΩ Loads (from THS3091 Product Data Sheet)
7
THS3091
TYP
PARAMETER
Second Harmonic Distortion
CONDITIONS
G = 2, RF = 1.21 kΩ,
VO = 2 VPP, f = 10 MHz
+25°C
MIN/MAX OVER
TEMPERATURE
+25°C
0°C to
70°C
–40°C to
+85°C
UNIT
RL = 100 Ω
66
dBc
RL = 1 kΩ
77
dBc
included in the Electrical Characteristics table for this device, and are given in Table 1. The data show that
second-harmonic distortion performance is better with a 1-kΩ load than with a 100-Ω load; however,
third-harmonic distortion is better with a 100-Ω load than with a 1-kΩ load.
Suppose the THS3091 is chosen to drive a 20-VPP signal into a 100-Ω load (in other words, a
4 THS3091
Load
Sharing
double-terminated, 50-Ω
cable) andTest
load Circuit
sharing isand
being
considered.
NoPerformance
definitive conclusion can be
reached from the available 100-Ω and 1-kΩ performance data and additional characterization would be
required.
Table
3.1:
Distortion
100and
Ω 1-kΩ
and 1Loads
kΩ Loads
(from THS3091
Data
Sheet)
Table
1. Harmonic
Harmonic Distortion
for for
100-Ω
(from THS3091
Product Data
Sheet)
THS3091
MIN/MAX OVER
TEMPERATURE
TYP
PARAMETER
8
CONDITIONS
+25°C
+25°C
0°C to
70°C
–40°C to
+85°C
UNIT
Second Harmonic Distortion
G = 2, RF = 1.21 kΩ,
VO = 2 VPP, f = 10 MHz
RL = 100 Ω
RL = 1 kΩ
77
dBc
Third Harmonic Distortion
G = 2, RF = 1.21 kΩ,
VO = 2 VPP, f = 10 MHz
RL = 100 Ω
74
dBc
RL = 1 kΩ
69
dBc
66
dBc
Load Sharing Concepts: Implementation for Large-Signal Applications
SBOA127 – October 2011
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
4 THS3091 Test Circuit and Load Sharing
Performance
4.1 Test Circuit
As in the case in every design, lab evaluation is the best gauge of performance. Two test
circuits are shown in figure 4.1, one with a single and the other with two THS3091 in a load
sharing configuration. Both circuits are driving a double-terminated, 50 Ω cable. In the load
sharing configuration, the two 100 Ω series output resistors act in parallel to provide 50 Ω
back-matching to the 50 Ω cable.
4.2 PCB Design / Thermal Discussion
While designing the PCB, multiple things have to be kept in mind:
• Minimize Parasitics
• Minimize Trace Inductance (Short Traces)
• Maximize heat dissipation
When starting the design, it is important to review the thermal aspects. In the planned bench
tests, the THS3091 is supposed to drive a 20 VP P signal into a double-terminated, 50 Ω
cable. The frequency of the signal is supposed to get as high as 70 MHz. In previous tests,
it has been determined that a load sharing configuration of two THS3091 is pulling approx.
100mA from both the +15 V and the -15 V rail of the power supply when driving a 70 MHz
20 VP P signal into a double-terminated, 50 Ω cable. A single THS3091 is still pulling approx.
70mA from both the +15 V and the -15 V rail. That results in a total power consumption of
approx. 3 W for the load sharing and 2.1 W for the single configuration. Assuming a 20 VP P
sinusoid signal being driven in a 50 Ω load, the resulting signal power would be 1 W. That
8
THS3091 Test Circuits and Load Sharing Performance
www.ti.com
4
THS3091 Test Circuits and Load Sharing Performance
4 THS3091 Test Circuit and Load Sharing Performance
As is the case in every design, lab evaluation is the best gauge of performance. Two test circuits are
shown in Figure 8, one for a single THS3091 amplifier driving a double-terminated, 50-Ω cable and one
with two THS3091 amplifiers in a load sharing configuration. In the load sharing configuration, the two
100-Ω
series
resistorsTHS3091
act in parallel Single
to provide
50-Ω
back-matching
the 50-Ω
cable.
Figure
4.1:output
Reference
and
Load
Sharing to
Test
Configurations
RG
250 W
RF
1 kW
V-
RS
50 W
RSOURCE
50 W
VOUT
THS3091
U3
RT
50 W
VIN
TL2
Characteristic
Impedance
50 W
RG1
250 W
RF1
1 kW
V+
V1
15 V
V-
RSOURCE
50 W
VIN
RLOAD
50 W
V+
V+
RG2
250 W
RF2
1 kW
V2
-15 V
TL1
Characteristic
Impedance
50 W
VOUT
RLOAD
50 W
V-
RT2
100 W
+
RS1
100 W
THS3091
U1
RT1
100 W
V-
+
RS2
100 W
THS3091
U2
V+
Figure 8. Reference THS3091 and THS3091 Load Sharing Test Configurations
would result in a total power dissipation of 3 − 1 = 2W for the load sharing and 2.1 − 1 = 1.1W
for the single configuration. To avoid thermal artifacts and shut-down, it has to be made sure
that the heat is properly dissipated. For this reason, the THS3091DDA version should be
used and the PCB should be designed accordingly. The DDA version comes in a thermally
enhanced 8-SOIC PowerPADT M package. Here, the die is mounted on a downset leadframe.
This acts as a heatsink and must be connected to a thermally dissipating plane for proper
power dissipation. For maximum performance, the junction temperature must not exceed 125
◦ C. Thermal shut-down occurs for junction temperatures over 160 ◦ C. In the THS3091,
the PowerPADT M is electrically isolated from the silicon and all leads. Hence, connecting the
PowerPADT M to any potential voltage is acceptable. However, regarding devices featuring a
PowerPADT M in general, it is recommended to connect the PowerPADT M to the lowest supply
(−V
case) since this technique is applicable
to all devices / process technologies. 9
S in –this
SBOA127
October 2011
Load Sharing Concepts: Implementation for Large-Signal Applications
Submit Documentation Feedback
Copyright © 2011, Texas
Instruments
Incorporated
In order to minimize parasitic capacitances,
the
planes
below the IC are usually cut out in a
high-speed design. However, cutting out the planes when using a PowerPADT M would reduce
the heat sinking efficiency. Therefore, no cut-outs have been performed when designing the
board. Figures 4.2 through 4.5 show the 4 layers of the PCB used during bench testing.
9
4 THS3091 Test Circuit and Load Sharing Performance
COR201
COR501
PAU101
PAU109
PAU103
PAU104
PAC402
COR202
PAR101
PAR20201 COR302
PAR102
PAR20202
PAU209
PAU203
PAU204
PAC602
PAR101
PAR20201 COR302
PAC601
PAR102
PAR20202
COR202
PAC702 COU2
COC7
PAC201
PAC102
PAC101
COL2 PAL202
PAL201
PAL101
PAL102 COL1
PAU209
PAR50202 PAR50201 PAU203
CODA0LSHRING
PAC302
COC2 PAC202
PAU208
PAU202
COC3
PAC301
PAR30201 PAR30202
PAU201
COR402
COC1
PAP101 PAP102 PAP103
PAR40101 PAR40102
COU1
COC4
COC6
PAU207
PAR40201 PAR40202
PAU106
PAC402
COR1
PAC601
PAC502 COR401
PAU107
PAU105
PAC401
COU1
COC4
COC6
PAU206
PAU109
PAU104
PAU205
COR502 PAC701
PAU108
PAU102
PAU208
PAU202
CODA0LSHRING
PAR50102 PAR50101 PAU103
PAR30201 PAR30202
PAU201
PAR50202 PAR50201
PAR40101 PAR40102
PAU101
PAU105
PAC401
COR1
PAU106
PAC501
PAR30101 PAR30102
PAR20102
COR501
PAU107
COC5
PAR20101 COR301
PAC502 COR401
PAU108
PAU102
PAR50102 PAR50101
PAC501
PAR30101 PAR30102
PAR20102
COR201
COC5
PAR20101 COR301
PAU204
PAC602
PAU207
PAU206
PAR40201 PAR40202
PAU205
COR502 PAC701
COR402
PAC702 COU2
COC7
COC3
PAC301
PAC302
COC2 PAC202
PAC201
PAC102
PAC101
COL2 PAL202
PAL201
PAL101
PAL102 COL1
COC1
PAP101 PAP102 PAP103
COP1
COP1
Figure 4.2: Top Layer
(Signal)
COR201
and
Figure 4.3: Mid Layer 1 (GND)
COR501
PAU101
PAR50102 PAR50101 PAU103
PAU108
PAU109
PAU104
PAC402
COR202
PAR102
PAU202
PAR50202 PAR50201 PAU203
PAU101
PAU102
PAR40101 PAR40102
PAR50102 PAR50101
PAU209
PAU204
COR502 PAC701
CODA0LSHRING
COR402
PAC702 COU2
COC7
COC3
PAC301
PAR101
PAR20201 COR302
PAC601
PAR102
PAR20202
COR202
PAR30201 PAR30202
PAU202
PAR40201 PAR40202
PAC302
COC2 PAC202
PAC201
PAC102
PAC101
COL2 PAL202
PAL201
PAL101
PAL102 COL1
COC1
PAR40101 PAR40102
PAU105
PAU201
PAU205
PAU106
COU1
COC4
COC6
COR1
PAC602
PAC502 COR401
PAU107
PAC402
PAU207
PAU206
PAU109
PAC401
PAC601
PAU208
PAU103
PAU108
PAU104
COU1
COC4
COC6
PAR30201 PAR30202
PAU201
CODA0LSHRING
PAU106
PAC501
PAR30101 PAR30102
PAR20102
COR501
PAU107
PAR20201 COR302
PAR20202
COR201
PAC502 COR401
COC5
PAR20101 COR301
PAU105
PAC401
PAR101
PAC501
PAR30101 PAR30102
PAU102
COR1
COC5
PAR20101 COR301
PAR20102
Overlay
PAR50202 PAR50201
PAU203
PAC602
PAU208
PAU209
PAU204
COR502 PAC701
PAU207
PAU206
PAR40201 PAR40202
PAU205
COR402
PAC702 COU2
COC7
COC3
PAC301
PAC302
COC2 PAC202
PAC201
PAC102
PAC101
COL2 PAL202
PAL201
PAL101
PAL102 COL1
COC1
PAP101 PAP102 PAP103
PAP101 PAP102 PAP103
COP1
COP1
Figure 4.4: Mid Layer 2 (+VS )
Figure 4.5: Bottom Layer (−VS )
10
4 THS3091 Test Circuit and Load Sharing Performance
4.3 Measured Performance
Figures 4.6 and 4.7 show a 30 MHz, 20 VP P sine wave output amplitudes for the single and
load sharing THS3091 configuration, respectively, measured using an oscilloscope. An ideal
sine wave is included as a visual reference (dashed red line).
Figure 4.6: 30 MHz Sine Wave Output, Single THS3091 (G = 5
Amplifier Output)
V
V
, Signal Level Referred to
15
10
Output Voltage [V]
5
0
−5
−10
−15
0
5
10
15
20
25
30
Time [ns]
Figure 4.7: 30 MHz Sine Wave Output, Dual THS3091 Load Sharing (G = 5
Referred to Amplifier Output)
15
10
Output Voltage [V]
5
0
−5
−10
−15
0
5
10
15
20
Time [ns]
11
25
30
V
V
, Signal Level
4 THS3091 Test Circuit and Load Sharing Performance
Figures 4.8 and 4.9 show a 60 MHz, 20 VP P sine wave output amplitudes for the single and
load sharing THS3091 configuration, respectively, measured using an oscilloscope. An ideal
sine wave is included as a visual reference (dashed red line).
Figure 4.8: 60 MHz Sine Wave Output, Single THS3091 (G = 5
Amplifier Output)
V
V
, Signal Level Referred to
15
10
Output Voltage [V]
5
0
−5
−10
−15
0
2
4
6
8
Time [ns]
10
12
14
16
Figure 4.9: 60 MHz Sine Wave Output, Dual THS3091 Load Sharing (G = 5
Referred to Amplifier Output)
V
V
, Signal Level
15
10
Output Voltage [V]
5
0
−5
−10
−15
0
2
4
6
8
Time [ns]
10
12
14
16
Evaluating the sine wave captures, the optical difference might not seem too large. However,
measuring the harmonic distortion shows significant improvement when using the load shar-
12
4 THS3091 Test Circuit and Load Sharing Performance
ing configuration. Figures 4.10 and 4.11 show harmonic distortion performance for a single
THS3091 and a dual load sharing configuration, respectively. In the frequency range from 20
to 70 MHz, the load sharing configuration shows an improvement of approx. 8 dB in average
when compared to a single THS3091.
Figure 4.10: Harmonic Distortion vs. Frequency, Single THS3091
−10
VO = 20 VPP (at amplifier output)
VO = 10 VPP (at load)
RS = 50 Ω
RL = 50 Ω
−20
Harmonic Distortion [dBc]
−30
−40
−50
−60
−70
−80
Second Harmonic
Third Harmonic
−90
1
10
Frequency [MHz]
100
Figure 4.11: Harmonic Distortion vs. Frequency, Dual THS3091 Load Sharing
−10
VO = 20 VPP (at amplifier output)
VO = 10 VPP (at load)
RS (Each Amplifier) = 100 Ω
RL (Shared) = 50 Ω
−20
Harmonic Distortion [dBc]
−30
−40
−50
−60
−70
−80
Second Harmonic
Third Harmonic
−90
1
10
Frequency [MHz]
100
Figures 4.12 and 4.13 show direct comparisons of HD2 and HD3 performances, respectively.
Figure 4.13 shows a significant improvement in HD3 performance at frequencies greater than
10 MHz when using a load sharing configuration (approx. 8 dB in average). The load sharing
13
configuration shows improvement in HD2 performance as well, however of a lesser magnitude
than HD3.
Figure 4.12: Second-Harmonic Distortion vs. Frequency, Single and Dual (Load Sharing)
THS3091
−10
−20
Harmonic Distortion [dBc]
−30
−40
−50
−60
−70
−80
Single − Second Harmonic
Dual − Second Harmonic
−90
1
10
Frequency [MHz]
Figure 4.13: Third-Harmonic Distortion vs.
THS3091
100
Frequency, Single and Dual (Load Sharing)
−10
−20
Harmonic Distortion [dBc]
−30
−40
−50
−60
−70
−80
Single − Third Harmonic
Dual − Third Harmonic
−90
1
10
Frequency [MHz]
14
100
5 Conclusion
5 Conclusion
The operational amplifier limitations imposed by slew rate and output current must be considered when an application requires large output signal swings. Output current is an especially
important factor. This application note reviewed and explained a load sharing method to
increase the output current ability of an amplifier and potentially improve distortion performance.
15
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