Cheddar : about the usability of
the real-time scheduling theory
Ellidiss Technologies, France
University of Brest/UBO, Lab-STICC/UMR 6285, France
Talk overview
1. Cheddar project : context and motivations
2. Research Roadmap
2/18
About scheduling analysis and its use

Real-time scheduling theory:
 Simplified models of functions : e.g. periodic task: processor
demand + deadline.
 Analysis: either with feasibility tests or simulations.
1.
Scheduling
Simulation:
2.
Feasibility tests :
 Ri 
Ri  Ci      C j
jhp ( i )  Pj 
=> architectures must meet assumptions of the feasibility test.
3/17
Does people really use
real-time scheduling theory ?
– Real-time scheduling theory, verification with
analytical methods and/or simulations:
1. Most important theoretical results proposed between
1974 and 1994 (simple uniprocessor architectures).
2. Technologies are compliant with (POSIX 1003.1b
operating systems, Ada/Ravenscar profile, …).
3. Strong demand from engineers.
4. …
Not used as much we can expect 
4/17
Some possible explanations
1. This theory can not be applied on some architecture types (e.g.
multiprocessor/distributed/hierarchical systems).
2. Require advanced skills to be used:
–
–
–
Numerous theoretical results: how to choose the right one ?
Numerous assumptions for each result.
How to abstract/model a system to access schedulability ? (e.g. dependency)
3. Engineers must be helped to use tools:
–
–
–
4.
How and when performing this analysis ?
How to write models to be analyzed ? Which design languages ?
How to safely use scheduling tools ?
...
5/17
Talk overview
1. Cheddar project : context and motivations
2. Research Roadmap
6/18
Cheddar project : context and motivations
– Cheddar project : expects to increase the usability of
the real-time scheduling theory.
•
Started in 2002 by Univ. of Brest, partnership with Ellidiss Tech.
(provide open source and industrial support) since 2008.
•
Current project members (U. Brest & Ellidiss Tech.) : A. Plantec, S.
Rubini, V. Gaudel, P. Dissaux, J. Legrand, J. Boukhobza, L. Lemarchand,
C Fotsing, S. Li, I. Armah-mensah, N. Tran Hai and F. Singhoff.
Support : Ellidiss Tech., Conseil Régional de Bretagne, BMO,
EGIDE/Campus France, Thalès communication.
Other contributors/partners: Télécom-Paris-Tech, ISAE, Univ. Lisboa
•
•
7/18
Ellidiss
Technologies
w w w . e l li di s s .c o m
Cheddar 3.0 new features
 Distributed with the next AADLInspector releases:
◦ Extended Cheddar ADL for multiprocessor and hierarchical
architectures, new generated XML printer/parser (A.
Plantec, C. Fotsing, F. Singhoff)
◦ Design pattern uniprocessor analysis tool (Phd Gaudel, A.
Plantec, P. Dissaux, F. Singhoff)
◦ Global multiprocessor scheduling : global
RM/DM/EDF/LLF, Pfair scheduling (F. Singhoff)
◦ New 2-levels scheduling services : various aperiodic
servers and cyclic 2-levels schedulers (F. Singhoff)
◦ New ARINC 653 features : scheduling + feasibility test +
export of ARINC 653 configuration table (A. Plantec, F.
Singhoff, P. Dissaux, Phd V. Gaudel)
Ellidiss
Technologies
w w w . e l li di s s .c o m
Cheddar 3.1 new features
 Ongoing developments :
◦ N-levels hierarchical scheduling analysis, both analytic
and scheduling simulation (Phd V. Gaudel, P. Dissaux,
A. Plantec, F. Singhoff)
◦ Task group based support : (Phd S. Li, V. Nguyen, S.
Rubini, F. Singhoff)
 Offset worst case response time analysis tools
 GMF/MF task scheduling simulation support + transformation
◦ Analysis of Multicore architectures with caches
(scheduling simulation) and with extended task
semantics /AADL BA (S. Rubini, N. Tran, F. Singhoff)
◦ New machine man interface (C. Fotsing, F. Singhoff)
Ellidiss
Technologies
w w w . e l li di s s .c o m
Cheddar 3.1 new features
 Future developments (starting fall 2013):
◦ Memory hierarchy (including cache) and scheduling
analysis (Phd N. Tran, S. Rubini, J. Boukhoza, F.
Singhoff)
◦ Modeling and automatic code generation of
partitionning algorithms (Phd I. Armah Mensah, JP
Babau, F. Singhoff)
◦ RTEMS source code generation and comparison with
Cheddar verification (C. Fotsing)
◦ SMART project (June 2014)
◦ U. Lisbonne/SAPIENT 2 (2014/2016). Bus scheduling
and tasks scheduling/ARINC 653