Experiment#8
Introduction to Shift Registers
Eng. Ruba Salamah
Experiment #8
Introduction to Shift Registers
9.1 Objectives
To investigate the operation of the shift registers.
9.2 Background
A register capable of shifting its binary information either to right or to the left
is called a shift register.
The simplest possible shift register is one that uses only flip-flops, as shown in
figure 9.1. The Q output of a given flip-flop is connected to the D input of the
flip-flop at its right. Each clock pulse shifts the contents of the register one bit
position to the right. The serial input determines what goes into the leftmost flipflop during the shift. The serial output is taken from the output of the rightmost
flip-flop prior to the application of a pulse. Although this register shifts its
contents to the right, if we turn the page upside down; we find that the register
shifts its contents to the left. Thus a unidirectional shift register can function either
as a shift-right or as shift-left register.
The register in figure 9.1 shifts its contents with every clock pulse during the
positive edge of the pulse transition. If we want to control the shift so that it
occurs only with certain pulses but not with others, we must control CLK input of
the register.
Shift registers can be used for converting serial data to parallel, and vice versa. If
we have access to all the flip-flop outputs of a shift register, then information
entered serially by shifting can be taken out in parallel from the outputs of the
flip-flops. If a parallel-load capability is added to a shift register, then data entered
in parallel can be taken out in serial fashion by shifting the data stored in the
register.
There are five basic types of shift registers:
1.
2.
3.
4.
Serial In - Serial Out.
Serial In - Parallel Out.
Parallel In - Serial Out.
Parallel In - Parallel Out.
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Experiment#8
Introduction to Shift Registers
Eng. Ruba Salamah
5.
Bidirectional shift registers.
Some shift registers provide the necessary input and output terminals for parallel
transfer. They may also have both shift-right and right-shift capabilities. The most
general shift register has all the following capabilities:
1. A clear control to clear the register to 0.
2. A CP (or CLK) input for clock pulses to synchronize all
operations.
3. A shift-right control to enable the shift-right operation and the
serial input and output lines associated with the shift right.
4. A shift-left control to enable the shift-left operation and the serial
input and output lines associated with the shift left.
5. A parallel-load control to enable a parallel transfer and the n input
lines associated with the parallel transfer.
6. n parallel output lines.
7. A control state that leaves the information in the register
unchanged even though clock pulses are continuously applied.
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Experiment#8
Introduction to Shift Registers
Eng. Ruba Salamah
9.2.1 Serial In Parallel Out Shift
Register
Figure 9.2 shows a
logic diagram of an 8-bit shift
register (74LS164). Its data is
entered serially through one of
two inputs (A or B) with the
LOW to HIGH transition of the clock; either of these inputs can be used as an
active HIGH Enable for data entry through the other input. An unused input must
be tied HIGH, or both inputs connected together.
9.2.2 Parallel - to - Serial Shift Register
The SN54/74LS165 is an 8-bit parallel load or serial-in register with
complementary outputs available from the last stage (see Figure 9.3). Parallel
inputting occurs asynchronously when the Parallel Load ( ) input is LOW. With
HIGH, serial shifting occurs on the rising edge of the clock; new data enters
via the Serial Data (DS) input. The 2-input OR clock can be used to combine two
independent clock sources, or one input can act as an active LOW clock enable.
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Experiment#8
Introduction to Shift Registers
Eng. Ruba Salamah
PIN NAMES:CP1, CP2 Clock (LOW-to-HIGH Going Edge) Inputs
DS
Serial Data Input
Asynchronous Parallel Load (Active LOW) Input
P0–P7
Parallel Data Inputs
Q7
Serial Output from Last State
Bidirectional Shift Register
The register capable of shifting both right and left is called a bidirectional shift
register.
The SN54/74LS194A is a High Speed 4-Bit Bidirectional Universal Shift
Register. As a high speed multifunctional sequential building block, it is useful in
a wide variety of applications. It may be used in serial-serial, shift left, shift right,
serial-parallel, parallel-serial, and parallel-parallel data register transfers.
PIN NAMES:S0, S1 Mode Control Inputs
P0–P3 Parallel Data Inputs
DSR
Serial (Shift Right) Data Input
DSL Serial (Shift Left) Data Input
CP
Clock (Active HIGH Going Edge) Input
MR
Master Reset (Active LOW) Input
Q0–Q3 Parallel Outputs
4-Bit Bidirectional Shift Register – 74LS194
Parallel inputs
MSB
LSB
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Experiment#8
Introduction to Shift Registers
Eng. Ruba Salamah
74LS194
Prelab
1. for circuit in part 1 draw timing diagram given the initial state 1100, given
input A=0 for the first 4clock pulses and A=1 for the next clock pulses.
2. draw pin connection diagram and function table for the IC's in parts 2 to 4.
3. using the 74194 register design a circulating shift left register (draw pin
connection diagram)..
Lab Work
Parts list:
1234-
module KL-33008
74LS164.
74LS165.
Two 74LS194 ICs.
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Experiment#8
Introduction to Shift Registers
Eng. Ruba Salamah
Part I :
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Experiment#8
Introduction to Shift Registers
Eng. Ruba Salamah
Part II :
Serial In - Parallel Out shift register
The 74x164 is an 8 bit SI/PO shift register. Serial data is entered through a 2
AND gate synchronous with the LOW to high transition of the clock.
a) Derive the functional table for the 74x164 and verify it experimentally.
b) Show that the 74x164 acts as SI/PO shift register. Enter the data 11001010
serially after how many clock pulses can you get the data at the output
simultaneously. Fill in the timing diagram below
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Experiment#8
Introduction to Shift Registers
Eng. Ruba Salamah
Part III:
Parallel In - Serial Out / or Serial In - Serial Out shift register
The 74x165 is an 8 bit parallel load or serial in with serial output taken at the
last bit Q7. clock.
a) Derive the functional table for the 74x165 and verify it
experimentally.
b) Show that the 74x165 acts as PI/SO shift register. Enter the data
11001010 in parallel mode, after how many clock pulses can you
get the data at the output serially.
c) Repeat part (b) but use SI/SO mode and count the pulses needed to
take the data at the output.
d)
Part IV:
Bidirectional shift register
The 74LS194 is a high speed 4-bit bidirectional universal shift register. It is
useful in a wide variety of applications. It may be used in serial-serial, shift lift,
shift right, serial-parallel, parallel-serial and parallel-parallel data register transfer.
a) Connect the 74194 to the breadboard with approprait inputs and outputs.
b) Fill in the timing diagram below
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Experiment#8
Introduction to Shift Registers
Eng. Ruba Salamah
Exercises:
1. How many clock pulses are required to get the data serial in
for the register in part 1? Explain.
2. From which of the outputs Q can we get the data serial output
from the 74164 register? And how many pulses do we need?
3. Use two ICs of the 74194 to build an 8-bit bidirectional register, and verify
the functional table for the resultant register.
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