APPLIED PHYSICS LETTERS VOLUME 82, NUMBER 15 14 APRIL 2003 Low-temperature layer splitting of „100… GaAs by He¿H coimplantation and direct wafer bonding I. Radu,a) I. Szafraniak, R. Scholz, M. Alexe, and U. Gösele Max Planck Institute of Microstructure Physics, Weinberg 2, D-06120 Halle, Germany 共Received 19 December 2002; accepted 14 February 2003兲 The present letter introduces a low-temperature GaAs layer splitting approach by He⫹H coimplantation which—in combination with direct wafer bonding—enables monolithic integration of GaAs with different substrates. The influence of He⫹H coimplantation on blistering and layer splitting of GaAs is studied and the optimum coimplantation conditions are determined. Thin GaAs layers are transferred onto Si after bonding of He⫹H coimplanted GaAs and Si substrates via a spin-on glass intermediate layer and subsequent annealing at only 225 °C for 14 h. Cross-sectional transmission electron microscopy investigations show a high quality of the GaAs/SOG bonding interface. © 2003 American Institute of Physics. 关DOI: 10.1063/1.1567045兴 The combination of III–V semiconductors with mature silicon technology has been a goal for many years. Monolithic integration of GaAs into silicon technology requires fabrication of high-quality single crystalline GaAs layers onto silicon and would result in applications in optoelectronics, microwave electronics, and high-temperature electronic devices. Heteroepitaxial growth of GaAs layers on Si was intensively studied, but due to the lattice mismatch of about 4%, an unacceptable high density of threading dislocations is still present.1,2 Recently, scientists from Motorola reported on device-quality GaAs epitaxial layers grown onto Si by molecular-beam epitaxy.3 A SrTiO3 buffer layer was epitaxially grown supposedly in order to absorb the effects of the different lattice constants of GaAs and Si. As yet, no independent evaluation of the grown GaAs layers concerning the density of threading dislocations has been reported. One of the most promising approaches to transfer highquality single crystalline thin layers on any substrates 共including amorphous materials兲 without any epitaxial relationship to the film, is layer transfer also known as smart-cut, layer splitting, or layer exfoliation by hydrogen implantation and direct wafer bonding. This approach was introduced by Bruel in 19954 as a method for the fabrication of high-quality silicon-on-insulator wafers. The layer splitting process consists of three steps: 共i兲 implanting a device wafer with a relatively high dose (1016 – 1017 cm⫺2 ) of either hydrogen ⫹ (H⫹ or H⫹ 2 ) or helium (He ), 共ii兲 direct bonding of the implanted wafer to a host substrate, and 共iii兲 annealing of the bonded pair, first to increase the bonding energy and then to achieve splitting. If an implanted wafer is annealed without stiffening the implanted surface by bonding it to a second wafer, blistering or exfoliation occurs instead of splitting. It was shown that in order to achieve blistering/splitting after a postimplantation anneal, the implantation temperature must fall within a temperature window specific to each material.5 Attempts on transferring GaAs layers onto Si by layer splitting were reported by Jalaguier et al.,6 but relatively high splitting temperatures of 400– 700 °C were required. a兲 Electronic mail: [email protected] When dissimilar materials are used, it is desirable that the splitting temperature is low enough to avoid stress problems associated with the difference in thermal expansion coefficients. Recently, Gawlik et al.7 proposed a low-temperature GaAs splitting approach by two-step hydrogen implantation and wafer bonding. In the present work, we are proposing a He⫹H coimplantation which enables a low-temperature splitting and layer transfer of GaAs. The influence of He⫹H coimplantation on the blistering and splitting of different materials 共i.e., Si and InP兲 was previously reported.8,9 Agarwal et al.8 showed that the minimum dose necessary to induce blistering and exfoliation of silicon can be decreased by a factor of 3.5 by He⫹H coimplantation. In this case, the helium atoms provide the pressure inside the cavities more efficiently than molecular hydrogen. Moreover, they stabilize the hydrogen bound to the cavity walls facilitating the propagation of the buried cracks.10 The main goal in the present study is to define optimum conditions for a low-temperature GaAs layer splitting approach by He⫹H coimplantation and wafer bonding. Semi-insulating 共100兲 GaAs wafers 共Freiberger Compound Materials GmbH兲 were coimplanted with low He⫹ doses followed by range matched H⫹ 2 implantation. In order to minimize ion channeling, implantation was performed under a 7° sample tilt. Nomarski optical microscopy, atomic force microscopy 共AFM兲, and scanning electron microscopy were used to investigate blister formation and exfoliation of He⫹H coimplanted and annealed samples. The formation of platelet-like defects and their evolution after annealing were analyzed by cross-sectional transmission electron microscopy 共XTEM兲. The implantation parameters are summarized in Table I and the optimum conditions for the blistering of coimplanted 共100兲 GaAs are indicated in bold. Surface blister formation was investigated by annealing the as-implanted GaAs at elevated temperatures and the onset of blistering was obtained for each annealing temperature. The activation energies of blistering were determined from an Arrhenius plot. As expected, it can be seen from Fig. 1 for low dose H-implantation that the blistering times are about ten times 0003-6951/2003/82(15)/2413/3/$20.00 2413 © 2003 American Institute of Physics Downloaded 08 Apr 2003 to 195.37.184.165. Redistribution subject to AIP license or copyright, see http://ojps.aip.org/aplo/aplcr.jsp 2414 Radu et al. Appl. Phys. Lett., Vol. 82, No. 15, 14 April 2003 TABLE I. Summary of He⫹H coimplantation conditions. Occurrence of blistering Dose (cm⫺2 ) Energy 共keV兲 Holder temperature (°C) He⫹ H⫹ 2 5⫻1015 2⫻1016 105 160 RTa RT No Yes He⫹ H⫹ 2 5⫻1015 3⫻1016 105 160 RT RT No Yes He⫹ H⫹ 2 5⫻1015 3⫻1016 105 160 RT 100 Yes ¯ He⫹ H⫹ 2 1⫻1016 3.5⫻1016 100 130 RT 100 Yes ¯ a As implanted After annealing RT indicates room temperature. longer than for the higher H dose, but for both implantation conditions similar activation energies were obtained. It is worth mentioning that the surface blisters obtained after annealing of coimplanted GaAs have relatively small lateral sizes, about 2–3 m, and a high area density (3.5 ⫻107 cm⫺2 ). Further annealing caused the growth of surface blisters but did not induce their breaking even after long annealing times due to insufficient gas pressure inside the blisters. The transmission electron microscopy 共TEM兲 investigations in Fig. 2 show that during implantation a relatively narrow damaged region 共150 nm兲 is formed, decorated with bubbles and platelet-like defects. The linear features, about 30–50 nm in lateral size, are microcracks surrounded by strong strain fields. They are responsible for blistering and further splitting. As shown in Fig. 2共a兲, not only 共100兲oriented platelets 共parallel to the surface兲, but also some 共111兲-oriented platelets were formed. During annealing, these platelets grow and connect to each other, leading to the formation of large cracks following a zigzag path 关see Fig. FIG. 2. XTEM images of platelets and microcracks in 共a兲 as-implanted and 共b兲 annealed 共100兲-oriented GaAs. Coimplantation of He⫹ (5⫻1015 cm⫺2 16 ⫺2 at 105 keV兲 followed by H⫹ at 160 keV兲 was performed at 2 (3⫻10 cm room temperature. 2共b兲兴. Therefore, a relatively high surface roughness of the transferred layer is expected after splitting. In order to transfer a thin GaAs layer onto a Si substrate, a He⫹H coimplanted GaAs wafer was bonded to a Si wafer via a spin-on glass 共SOG兲 film. Due to the mismatch in the thermal expansion coefficients between GaAs and Si, it is desirable that the annealing temperature after bonding does not exceed 250 °C. It was shown earlier that roomtemperature GaAs/Si bonding via a SOG film is a reliable approach to obtain high bonding energies after lowtemperature annealing.11 In order to remove any metallic contaminants, the GaAs wafer was chemically cleaned with 共5%兲 HCl solution and then rinsed in de-ionized 共DI兲 water. After cleaning, the GaAs wafer was brought in contact with the SOG/Si wafer at room temperature. Annealing of the bonded pair at 225 °C for about 14 h induced splitting of the thin GaAs layer and its transfer onto Si. XTEM of this structure shows a high quality of the bonding interface 共see Fig. 3兲. The microroughness of the transferred layer measured by AFM in contact mode indicates a root-mean-square value of ⬃17 nm, therefore a soft-polishing step is required in order to improve the surface quality of the transferred layer. In conclusion, we have shown that a low-temperature GaAs layer splitting approach by He⫹H coimplantation and wafer bonding can be used for the transfer of single crystalline GaAs films onto silicon wafers. The electronic quality of the transferred GaAs layer still has to be investigated. The authors would like to thank S. Hopfe and B. Lausch for TEM specimen preparation. This work was partly funded FIG. 1. Activation energies of the onset of blistering obtained on He⫹H coimplanted GaAs. Coimplantation of He⫹ (5⫻1015 cm⫺2 at 105 keV兲 fol16 ⫺2 16 ⫺2 lowed by 共a兲 H⫹ at 160 keV兲 and 共b兲 H⫹ at FIG. 3. XTEM image of the bonding interface after transferring a thin GaAs 2 (2⫻10 cm 2 (3⫻10 cm 160 keV兲. layer onto a SOG/Si wafer. Downloaded 08 Apr 2003 to 195.37.184.165. Redistribution subject to AIP license or copyright, see http://ojps.aip.org/aplo/aplcr.jsp Radu et al. Appl. Phys. Lett., Vol. 82, No. 15, 14 April 2003 by Marie Curie Host Development Fellowship, HPMD-CT2000-00015. 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