Finite State Machines - Department of Computer Science, Columbia

Fundamentals of Computer Systems
Finite State Machines
Stephen A. Edwards
Columbia University
Spring 2012
Finite State Machine Components
Current State
Inputs
Next State
CL
Next State
CL
Outputs
Current State
CLOCK
Current State
Inputs?
Moore and Mealy Machines
Inputs
Next State
Logic
Next
State
Current
State
Output Logic
CLK
The Moore Form:
Outputs are a function of only the current state.
Outputs
Moore and Mealy Machines
Inputs
Next State
Logic
Next
State
Current
State
Output Logic
Outputs
CLK
The Mealy Form:
Outputs may be a function of both the current state and
the inputs.
A mnemonic: Moore machines often have more states.
Mealy Machines are the Most General
Outputs
Inputs
Current
State
CL
CLK
Next State
Another, equivalent way of drawing Mealy Machines
This is exactly the synchronous digital logic paradigm
Moore vs. Mealy FSMs
Alyssa P. Hacker has a snail that
crawls down a paper tape with
1’s and 0’s on it. The snail smiles
whenever the last four digits it
has crawled over are 1101.
Design Moore and Mealy FSMs of
the snail’s brain.
State Transition Diagrams: Looking for “1101”
S0
0
Moore Machine: States indicate output
State Transition Diagrams: Looking for “1101”
0
S0
0
1
S1
0
Moore Machine: States indicate output
State Transition Diagrams: Looking for “1101”
0
S0
0
1
S1
0
1
S2
0
0
S3
0
1
S4
1
Moore Machine: States indicate output
State Transition Diagrams: Looking for “1101”
0
1
1
0
S0
0
1
S1
0
1
S2
0
0
0
S3
0
1
S4
1
0
Moore Machine: States indicate output
State Transition Diagrams: Looking for “1101”
0
1
1
0
S0
0
1
S1
0
1
S2
0
0
0
S3
0
1
S4
1
0
Moore Machine: States indicate output
S0
Mealy Machine: Arcs indicate input/output
State Transition Diagrams: Looking for “1101”
0
1
1
0
S0
0
1
S1
0
1
S2
0
0
0
S3
0
1
S4
1
0
Moore Machine: States indicate output
0/0
S0
1/0
S1
Mealy Machine: Arcs indicate input/output
State Transition Diagrams: Looking for “1101”
0
1
1
0
S0
0
1
S1
0
1
S2
0
0
S3
0
0
1
S4
1
0
Moore Machine: States indicate output
1/1
0/0
S0
1/0
S1
1/0
S2
0/0
S3
Mealy Machine: Arcs indicate input/output
State Transition Diagrams: Looking for “1101”
0
1
1
0
S0
0
1
S1
0
1
S2
0
0
1
S3
0
0
S4
1
0
Moore Machine: States indicate output
0/0
S0
1/1
0/0
1/0
S1
1/0
S2
1/0
0/0
S3
0/0
Mealy Machine: Arcs indicate input/output
Moore Machine
Next State
S
A S’
S0
S0
S1
S1
S2
S2
S3
S3
S4
S4
0
1
0
1
0
1
0
1
0
1
S0
S1
S0
S2
S3
S2
S0
S4
S0
S2
Output
S
Y
S0
S1
S2
S3
S4
0
0
0
0
1
Moore Machine
A
S20
Next State
S
A
S’
000
000
001
001
010
010
011
011
100
100
0
1
0
1
0
1
0
1
0
1
000
001
000
010
011
010
000
100
000
010
Output
S
Y
000
001
010
011
100
0
0
0
0
1
S2
CLK
S10
S1
CLK
S00
CLK
S0
Y
Mealy Machine
S
A
S’
Y
S0
S0
S1
S1
S2
S2
S3
S3
0
1
0
1
0
1
0
1
S0
S1
S0
S2
S3
S2
S0
S1
0
0
0
0
0
0
0
1
Mealy Machine
A
S10
S
A
S’
Y
00
00
01
01
10
10
11
11
0
1
0
1
0
1
0
1
00
01
00
10
11
10
00
01
0
0
0
0
0
0
0
1
S1
CLK
S00
S0
CLK
Y
More Intuitive Solutions using Shift Registers
Y
A
CLK
Mealy Form: Output Depends on Input Immediately
Y
A
CLK
Moore Form: Output Depends Only on State
FSM Example: A Traffic Light Controller
This controls a traffic
light at the intersection
of a busy highway and a farm
road. Normally, the highway
light is green but if a sensor
C
detects a car on the farm
road, the highway light turns
yellow then red. The farm road light then turns green
until there are no cars or after a long timeout. Then, the
farm road light turns yellow then red, and the highway
light returns to green. The inputs to the machine are
the car sensor, a short timeout signal, and a long
timeout signal. The outputs are a timer start signal and
the colors of the highway and farm road lights.
C
Source: Mead and Conway, Introduction to VLSI Systems, 1980, p. 85.
State Transition Diagram for the TLC
HG
H:G
F:R
Inputs:
C: Car sensor
S: Short Timeout
L: Long Timeout
Outputs:
T: Timer Reset
H: Highway color
F: Farm road color
State Transition Diagram for the TLC
C + L/ T
CL/ T
HG
H:G
F:R
Inputs:
C: Car sensor
S: Short Timeout
L: Long Timeout
HY
H:Y
F:R
Outputs:
T: Timer Reset
H: Highway color
F: Farm road color
State Transition Diagram for the TLC
C + L/ T
S/ T
CL/ T
HY
H:Y
F:R
HG
H:G
F:R
S/ T
S/ T
FG
H:R
F:G
FY
H:R
F:Y
C + L/ T
S/ T
Inputs:
C: Car sensor
S: Short Timeout
L: Long Timeout
C L/ T
Outputs:
T: Timer Reset
H: Highway color
F: Farm road color
State Transition Diagram for the TLC
C + L/ T
S/ T
S
C
S
L
T
S’
HG
HG
HG
HY
HY
FG
FG
FG
FY
FY
0
X
1
X
X
1
0
X
X
X
X
X
X
0
1
X
X
X
0
1
X
0
1
X
X
0
X
1
X
X
0
0
1
0
1
0
1
1
0
1
HG
HG
HY
HY
FG
FG
FY
FY
FY
HG
CL/ T
HY
H:Y
F:R
HG
H:G
F:R
S/ T
S/ T
FG
H:R
F:G
FY
H:R
F:Y
C + L/ T
S/ T
Inputs:
C: Car sensor
S: Short Timeout
L: Long Timeout
C L/ T
Outputs:
T: Timer Reset
H: Highway color
F: Farm road color
S
H
F
HG
HY
FG
FY
G
Y
R
R
R
R
G
Y
State and Output Encoding
S
C
S
L
T
S’
HG
HG
HG
HY
HY
FG
FG
FG
FY
FY
0
X
1
X
X
1
0
X
X
X
X
X
X
0
1
X
X
X
0
1
X
0
1
X
X
0
X
1
X
X
0
0
1
0
1
0
1
1
0
1
HG
HG
HY
HY
FG
FG
FY
FY
FY
HG
S
H
F
HG
HY
FG
FY
G
Y
R
R
R
R
G
Y
First idea: use a binary
encoding:
HG
HY
FG
FY
00
01
10
10
G
Y
R
00
01
10
State and Output Encoding
S
C
S
L
T
S’
00
00
00
01
01
10
10
10
11
11
0
X
1
X
X
1
0
X
X
X
X
X
X
0
1
X
X
X
0
1
X
0
1
X
X
0
X
1
X
X
0
0
1
0
1
0
1
1
0
1
00
00
01
01
10
10
11
11
11
00
S
H
F
H0 = S1 S0
00
01
10
11
00
01
10
10
10
10
00
01
F1 = S1
T = S1 S0 CL + S1 S0 S +
S1 S0 (C + L) + S1 S0 S
S10 = S1 S0 S + S1 S0 +
S1 S0 S
S00 = S1 S0 C L + S1 S0 S +
S1 S0 (C + L) + S1 S0 S
H1 = S1
F0 = S1 S0
State and Output Encoding
S
C
S
L
T
S’
00
00
00
01
01
10
10
10
11
11
0
X
1
X
X
1
0
X
X
X
X
X
X
0
1
X
X
X
0
1
X
0
1
X
X
0
X
1
X
X
0
0
1
0
1
0
1
1
0
1
00
00
01
01
10
10
11
11
11
00
S
H
F
H0 = S1 S0
00
01
10
11
00
01
10
10
10
10
00
01
F1 = S1
T = S1 S0 CL + S0 S +
S1 S0 (C + L)
S10 = S0 S + S1 S0
S00 = S1 S0 C L +
S0 S + S1 S0 (C + L)
H1 = S1
F0 = S1 S0
State and Output Encoding
S
C
S
L
T
S’
00
00
00
01
01
10
10
10
11
11
0
X
1
X
X
1
0
X
X
X
X
X
X
0
1
X
X
X
0
1
X
0
1
X
X
0
X
1
X
X
0
0
1
0
1
0
1
1
0
1
00
00
01
01
10
10
11
11
11
00
S
H
F
H0 = S1 S0
00
01
10
11
00
01
10
10
10
10
00
01
F1 = S1
€
Š
T = S0 S1 CL + S1 (C + L) +
S0 S
S10 = S0 S + S1 S0
€
Š
S00 = S0 S1 C L + S1 (C + L) +
S0 S
H1 = S1
F0 = S1 S0
State and Output Encoding
C
L
C
L
€
Š
T = S0 S1 CL + S1 (C + L) +
S0 S
S
1
0
T
S
S1
1
0
S10
1
0
S1
S
1
0
S00
S0
F1
S1
S0
H0
S10 = S0 S + S1 S0
€
Š
S00 = S0 S1 C L + S1 (C + L) +
S0 S
H1 = S1
H0 = S1 S0
H1
S1
S0
F0
F1 = S1
F0 = S1 S0
State and Output Encoding
S
C
S
L
T
S’
HG
HG
HG
HY
HY
FG
FG
FG
FY
FY
0
X
1
X
X
1
0
X
X
X
X
X
X
0
1
X
X
X
0
1
X
0
1
X
X
0
X
1
X
X
0
0
1
0
1
0
1
1
0
1
HG
HG
HY
HY
FG
FG
FY
FY
FY
HG
S
H
F
HG
HY
FG
FY
G
Y
R
R
R
R
G
Y
Second idea: use a one-hot
encoding:
HG
HY
FG
FY
0001
0010
0100
1000
G
Y
R
001
010
100
State and Output Encoding
S
C
S
L
T
S’
0001
0001
0001
0010
0010
0100
0100
0100
1000
1000
0
X
1
X
X
1
0
X
X
X
X
X
X
0
1
X
X
X
0
1
X
0
1
X
X
0
X
1
X
X
0
0
1
0
1
0
1
1
0
1
0001
0001
0010
0010
0100
0100
1000
1000
1000
0001
S
H
F
0001
0010
0100
1000
001
010
100
100
100
100
001
010
T = S0 CL + S1 S +
S2 (C + L) + S3 S
S30 = S2 (C + L) + S3 S
S20 = S1 S + S2 (C + L)
S10 = S0 CL + S1 S
S00 = S0 (CL) + S3 S
HR = S2 + S3
HY = S1
HG = S 0
FR = S0 + S1
FY = S3
FG = S 2
State and Output Encoding
FY
HR
S3
C
L
S30
S30 = S2 (C + L) + S3 S
FG
S20 = S1 S + S2 (C + L)
S20
S10 = S0 CL + S1 S
S2
HY
S00 = S0 (CL) + S3 S
FR
HR = S2 + S3
S1
HY = S1
S10
HG
S0
S
T = S0 CL + S1 S +
S2 (C + L) + S3 S
S00
HG = S0
FR = S0 + S1
FY = S3
FG = S2