Effects of LDD Structure with
Optimum Ion Concentration on p-Channel
MOSFET’s
Shrey Bhala , B. Tech student at IIT Delhi
Abstract— In this paper we have to study hot carrier
injection phenomenon (HC degradation) in p-channel
MOSFET and effect of Lightly Doped Drain Structure
(LDD structure) in minimizing it. HC degradation leads to
effective channel length shrinkage. It is due to the hot
electrons which are there trapped in gate SiO2 accumulate
holes near the channel region of drain. This reduces the
effective channel width.
On the other hand, in case of p-channel LDD MOSFETs,
the HC generation in LDD region is one tenth of that in p+
drain MOSFETs under the same Vgs. The lifetime of
MOSFET is defined as the time it takes to deviate it’s
transconductance by 10 percent. The lifetime of LDD
MOSFETs are longer by two orders of magnitudes than
those of the p+ drain MOSFETs. Best lifetime can be
achieved when the boron dose is in between 1 & 3×1013cm-2
LDD region. As shown in the graph, Channel length shrinkage
increases as the Boron dose increases.
Index Terms— Lightly Doped Drain(LDD), Effective channel
length, transconductance(gm), MOSFET lifetime.
I.
INTRODUCTION
A major problem in a small sized MOSFET operating at 5V is
hot carrier degradation. Especially in n-channel MOSFETs,
this is a serious problem as the ionization rate of electrons
which is the charge carrier in N-channel MOSFET is greater
than that of holes. Also, hot carrier injection is also a problem
in p-channel MOSFETs, so LDD structures also have to be
implemented in p-channel MOSFETs to decrement its effect.
This paper focuses on the usefulness of LDD structure by
minimizing the HC degradation in p-channel LDD MOSFET
and p+-drain MOSFET.
II.
SAMPLE PRPERATION
The boron concentration in Lightly Doped regions is approx.
1×10 13cm-2 for 3 types of LDD structures like ones with p doses in LDD regions equating to 1013, 3×1013, 8× 1013.The
region depths of LDD region is around 0.2µm. The heavily
doped source-drain region did not reach the Silicon surface
under gate terminal. Therefore, SiO2 layer exists over LDD
region.
The effective channel length depends on the Boron dose of
The authors are with the Department of Electrical Engineering, Indian
Institute of Technology, Delhi, 110 016 India
(e-mail: [email protected]; [email protected]).
III.
GENERATION OF HOT CARRIERS IN P-CHANNEL LDD
MOSFETs
A.)
Substrate current in LDD structure
MOSFET
In Fig.3 HC injection phenomenon is shown both in case of pchannel LDD MOSFETs and p+- Drain MOSFETs. The
substrate current Isub shows the HC concentration in p-channel
MOSFET. Drain voltage (Vd) varies from -13V to -5V keeping
Vsub=0V. The max value of substrate current appears when |Vg|
< |Vd|. The characteristics of both p+-drain and LDD structure
is similar except the fact that substrate current in latter is
lesser.
The variation of effective channel length with p- conc is shown
in Fig.4. It can be seen that peak Isub decreases with the
decrease in Leff. However the peak Isub decreases with decrease
in p- conc.
B.)
Gate current in LDD structure MOSFET
In Fig.5 Ig v/s Vg characteristics are shown of both p+-drain
and LDD MOSFETs. Vd is varied from -13V to -6V and Ig is
measured keeping the substrate Voltage Vsub=0V.
A sharp bell-shaped structure was obtained as Ig vs Vg
characteristics of both p+ drain and LDD MOSFETs. This
current is the electron gate current which is HC current
developed by the impact ionization. The electric field strength
reduction effect can only be observed in LDD structures.
The characteristics are same for both the structures however
the peak gate current decreases when the p - concentration is
decreased. The dependence of peak gate current on the p —
concentration is shown in Fig.6 as a function of effective
channel length Also, the peak Ig in the LDD MOSFET was
smaller by two orders of magnitude than p + drain MOSFET.
This leads to significant electric field reduction effect in the pregion.
IV.)
HOT CARRIER INFLUENCE AND EFFECTIVE
CHANNEL LENGTH SHRINKAGE IN P-CHANNEL LDD
MOSFETs.
A.)
Hot carrier influence in p-channel LDD
mosfet
The deviation in transconductance in p-Channel MOSFET is
due to the HC degradation and the curve is shown in Fig.8.
After keeping the MOSFET on for some time( stress time), the
transconductance is measured again. The curve shifted slightly
towards the positive gate voltage. The observed characteristics
were same for both p+-drain and LDD MOSFETs, except the
fact that the deviation was lesser in p-channel LDD MOSFET.
C.)
Difficulties in p-channel MOSFET scaling
Thresh-hold voltage degradation and transconductance
degradation is smaller in p-channel MOSFET than n-channel
MOSFET because the ionization rate of holes is lesser than
that of electrons. But the difference in the ionization rate of
holes in p-channel and electrons in n-channel MOSFET
become less with the increment in electric field.
From Fig.7 we can see that the ionization rate of both holes
and electrons became close to each other as the drain voltage
became high. With increment in Vd the gate length became
shorter. Thus, it is concluded that the difference in the
ionization rate is small for small MOSFETs.
The change in transconductance can be written as
Δgm=gm(t)-gmo
t=stress time, gmo=initial transconductance
And the graph of Δgm vs stress time at different Vd’s is shown
in Fig.9. And from the figure it can easily be observed that
time dependence on transconductance is very less.
Effective channel length shrinkage logic for
p-channel LDD MOSFET
There is a similar shifts in transconductance in both p-Channel
LDD MOSFET and p+ - drain MOSFET. But there is a huge
difference in p-Channel and n-Channel MOSFET dependency.
The hot electrons generated are injected into the SiO2 layer
present over lightly doped channel region due to intercollision and attraction due to gate electrode. Now in case of:
1.)
N-Channel MOSFET- the electrons are
trapped in SiO2 layer thus reducing the number of
B.)
conduction carriers hence increasing the resistance of
the system. Therefore gm is decreased.
2.)
P-Channel MOSFET- the electron are
trapped in SiO2 layer present over the lightly doped
channel region. These electrons attract more holes in
the inversion layer thus increasing the concentration
of conduction carriers, hence reducing the resistance.
Thus, gm is increased.
As the channel conductance is increased effective channel
length decreases, because resistance is directly proportional to
channel length.
100 times than that of p+ drain MOSFET.
V.)
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C.)
Lifetime of p-channel LDD MOSFET
The lifetime of an LDD MOSFET is defined as the time it
takes to shift the transconductance by 10 percent due to hot
carrier injection. As the HC injection is lesser in case of LDD
MOSFET so the transconductance degradation is also small.
Thus, it takes longer time to shift the transconductance by 10
percent hence increase in the lifetime of LDD MOSFETs.
Experimentally is shown that the channel region doped with 13×1013cm-2 has the longest lifetimes which is approximately
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REFERENCES
W. N. Grant. "Electron and hole ionization rates in
epitaxial silicon at high electric fields." Solicl-Srotc
Electrori.. vol. 16, p. 1189. 1973.
J . J . Tzou, C. C. Yao. R. Cheung, and H. W. K.
Chan, "Hot-carrier induced degradation in p-channel
LDD MOSFET's.
F. C. Hsu and H. R. Grinolds. "Structure-enhanced
MOSFET degradation due to hot-clcctron injection”.
Effects of Lightly Doped Drain Structure with
Optimum Ion Dose on p-Channel MOSFET’s, Toru
Kaga and Yoshio Sakai members of IEEE.