PC Fundamentals
Presentation 30 – PC Architecture
Copyright © 2007 Heathkit Company, Inc. All Rights Reserved
Objectives
At the end of this presentation,
you will be able to:
2

Draw a simple diagram of a Pentium D or
Core 2 based PC’s architecture.
 Explain the difference between the purpose
of the north bridge and the south bridge.
 List some of the major functions supported
by the Pentium D and Core 2 MPUs.
 Define front side bus (FSB), I/O Controller
Hub (ICH), and Graphics Memory
Controller Hub (GMCH).
3
Pentium III
CPU
(1GHz)
1GHz
Cache
CPU Bus
AGP
Video
66MHz
North
Bridge
100/133MHz
PCI Bus Slots
33MHz PCI BUS
Super I/O
Controller
South
Bridge
Keyboard
Floppy
Mouse
IDE1
DRAM
ISA Bus
Slots
IDE2
4
Pentium III
CPU
(1GHz)
1GHz
Cache
CPU Bus
5
Pentium III
CPU
(1GHz)
1GHz
Cache
CPU Bus
AGP
Video
66MHz
North
Bridge
100/133MHz
DRAM
6
Pentium III
CPU
(1GHz)
1GHz
Cache
CPU Bus
AGP
Video
66MHz
PCI Bus
Slots
North
Bridge
100/133MHz
DRAM
33 MHz PCI BUS
7
Pentium III
CPU
(1GHz)
1GHz
Cache
CPU Bus
AGP
Video
66MHz
PCI Bus
Slots
North
Bridge
100/133MHz
DRAM
33MHz PCI BUS
Super I/O
Controller
Keyboard
Floppy
Mouse
8
Pentium III
CPU
(1GHz)
1GHz
Cache
CPU Bus
AGP
Video
66MHz
North
Bridge
100/133MHz
PCI Bus
Slots
33MHz PCI BUS
Super I/O
Controller
South
Bridge
Keyboard
Floppy
Mouse
IDE1
DRAM
IDE2
9
Pentium III
CPU
(1GHz)
1GHz
Cache
CPU Bus
AGP
Video
66MHz
North
Bridge
100/133MHz
PCI Bus
Slots
33MHz PCI BUS
Super I/O
Controller
South
Bridge
Keyboard
Floppy
Mouse
IDE1
8MHz
DRAM
ISA Bus
Slots
IDE2
10
Hierarchical Bus Structure
CPU
Host Bus
AGP
Connector
AGP
Bus
North
System
Memory
Bridge
PCI Bus
ISA Slot
South
Bridge
ISA Bus
PCI Slots
11
Hierarchical Bus Structure (Server)
CPU
CPU
Host Bus
AGP
Connector
AGP
Bus
North
Bridge
System
Memory
PCI Busses
ISA Slot
South
Bridge
ISA Bus
PCI Slots
12
Why Multiple Processors?

Thermal dissipation problems led to a
performance stagnation problem.
 Because clock speed increases could not
continue at its prior pace, other methods of
improving performance had to be found.
 The idea of multiple processor was
borrowed form the server world.
13
Two Approaches to Multiple
Processors

Servers used two (or more) MPU packages.
 The multi-core processors used in PCs place
two or processors (called cores) in a single
package.
14
Inside the Pentium D or Core 2 Duo
1 MB Cache 1 MB Cache
Execution
Core
System Bus Interface
Execution
Core
System Bus Interface
15
Pentium D
Or Core 2
CPU
(3 GHz)
Front side bus
800MHz
or1066MHz
16
CPU
(3 GHz)
1066 MHz
System Bus
Graphics
Graphics Memory
Controller Hub
(GMCH)
Memory
667
MHz
17
CPU
(3 GHz)
PCI Express X 16
Expansion Slot
Media Expansion
1066 MHz
System Bus
Graphics Memory
Controller Hub
(GMCH)
Intel GMA
950 Graphics
18
CPU
(3 GHz)
1066 MHz
System Bus
Graphics Memory
Controller Hub
(GMCH)
Dual Channel
DDR2-667
Memory
DDR2 SRAM
DDR2 SRAM
667 MHz
19
CPU
(3 GHz)
1066 MHz
System Bus
Graphics Memory
Controller Hub
(GMCH)
I/O Controller Hub
(ICH)
20
CPU
(3 GHz)
Intel High
Definition 7.1 Audio
8 High Speed
USB Ports
Graphics Memory
Controller Hub
(GMCH)
6 PCI Slots
6 PCI Express X 1
Gigabit LAN
I/O Controller Hub
(ICH)
21
Flash BIOS
CPU
(3 GHz)
1 ATA/IDE Port
4 Serial ATA Ports
6 PCI Express X 1
Graphics Memory
Controller Hub
(GMCH)
RAID
I/O Controller Hub
(ICH)
22
CPU
PCI Express X 16
Media Expansion
GMCH
DDR2 SRAM
DDR2 SRAM
Intel GMA 950 Graphics
Flash BIOS
High Definition Audio
1 ATA/IDE Port
8 USB Ports
4 Serial ATA Ports
6 PCI Slots
6 PCI Express X 1
6 PCI Express X 1
RAID
ICH
Gigabit LAN
23
PC Fundamentals
End
Copyright © 2007 Heathkit Company, Inc. All Rights Reserved