Study of a Battery Energy Storage
System Based on a Multilevel
Cascade PWM Converter
With Star Configuration
A DISSERTATION SUBMITTED TO
THE DEPARTMENT OF ELECTRICAL ENGINEERING
AND THE COMMITTEE ON GRADUATE STUDIES
OF TOKYO INSTITUTE OF TECHNOLOGY
IN PARTIAL FULFILLMENT OF THE REQUIREMENTS
FOR THE DEGREE OF DOCTOR OF ENGINEERING
Supervisor : Prof. Hirofumi Akagi
By
Laxman Maharjan
Student Number: 07D13107
March 2010
i
Acknowledgements
First of all, I would like to express my deepest gratitude to academic supervisor,
Prof. Hirofumi Akagi for his generous guidance, constant support and continuous encouragement during my study at the Tokyo Institute of Technology. His knowledge,
wisdom and commitment to the highest standards inspired and motivated me. The work
presented in the dissertation could not have been completed without his meaningful
advice and invaluable suggestions.
I am grateful to Assoc. Prof. Hideaki Fujita for his wise guidance and insightful
comments. He was always there to ask me good questions to help me think and improve
my work.
My profound appreciation goes to Prof. Shozo Ishii, Prof. Koichi Yasuoka, Assoc.
Prof. Koji Takahashi, Visiting Prof. Hiroaki Urushibata, Visiting Assoc. Prof. Shinji
Tominaga, and Visiting Assoc. Prof. Yoshihiko Kataoka for their careful reviewing of
the manuscript and constructive comments.
I owe my sincere thanks to external examiner Prof. Yoichi Hori from Tokyo University
for going through the manuscript. His insightful comments and suggestions helped me
improve the manuscript.
I would like to thank Prof. Tadashi Fukao, Dr. Suzuo Saito (Toshiba Corporation),
and Dr. Noriko Kawakami (Toshiba Mitsubishi-Electric Industrial Systems Corporation)
for their meaningful comments as mentors.
I am greatly indebted to Panasonic Corporation, especially Mr. Jun Asakura. This
work would not have been possible without their collaboration.
Appreciation is due to all the members of Akagi-Fujita Laboratory for their friendship.
I would also like to thank Asst. Prof. Makoto Hagiwara for his kind interest in my work.
I owe my sincere thanks to Mr. Tsukasa Yamagishi for his excellent cooperation in the
ii
experiments. I would also like to thank previous members of the laboratory, especially
Dr. Shigenori Inoue (presently at Hitachi, Ltd.) and Mr. Tsurugi Yoshii (presently at
Railway Technical Research Institute) for their valuable counsel.
I would like to thank my family in Nepal: my father, my mother, my sister, my brother
and my nephews for their support and encouragement. I would like to thank my wife
Anju, who is a constant and active source of support.
Finally, I am thankful to the Ministry of Education, Culture, Sports, Science and
Technology (MEXT) of Japan for supporting me with Monbukagakusho Scholarship.
iii
Contents
Chapter 1 Introduction
1.1
1
Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1
1.1.1
Trend of Power Electronics . . . . . . . . . . . . . . . . . . . . . .
1
1.1.2
Power Electronics For Renewable Energy Resources . . . . . . . .
6
1.1.2.1
Renewable Energy Resources . . . . . . . . . . . . . . .
6
1.1.2.2
Battery Energy Storage Systems . . . . . . . . . . . . .
8
1.2
Research Objective . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
12
1.3
Dissertation Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
13
Chapter 2 Trend of Medium-Voltage Power Converters
15
2.1
Medium-Voltage Power Converters . . . . . . . . . . . . . . . . . . . . .
15
2.2
Two-Level Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
2.3
Multilevel Converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18
2.3.1
Diode-Clamped Converter . . . . . . . . . . . . . . . . . . . . . .
18
2.3.2
Flying-Capacitor Converter . . . . . . . . . . . . . . . . . . . . .
20
2.3.3
Cascade Converter . . . . . . . . . . . . . . . . . . . . . . . . . .
20
2.3.4
Comparison of Multilevel Converters . . . . . . . . . . . . . . . .
22
Emerging Multilevel Converters . . . . . . . . . . . . . . . . . . . . . . .
23
2.4.1
Hybrid/Asymmetrical Converters . . . . . . . . . . . . . . . . . .
23
2.4.2
Modular Multilevel Converters . . . . . . . . . . . . . . . . . . . .
26
2.4.3
Multilevel Converters With Multiple Three-Phase Converters . . .
27
2.4.4
Soft-Switched Multilevel Converters . . . . . . . . . . . . . . . . .
29
Modulation Methods . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
29
2.5.1
30
2.4
2.5
Sinusoidal Pulsewidth Modulation . . . . . . . . . . . . . . . . . .
Contents
2.6
2.7
iv
2.5.2
Space Vector PWM . . . . . . . . . . . . . . . . . . . . . . . . . .
32
2.5.3
Selective Harmonic Elimination . . . . . . . . . . . . . . . . . . .
33
2.5.4
Space Vector Control . . . . . . . . . . . . . . . . . . . . . . . . .
33
Applications of Multilevel Converters . . . . . . . . . . . . . . . . . . . .
34
2.6.1
Medium-Voltage Motor Drives . . . . . . . . . . . . . . . . . . . .
34
2.6.2
Applications in Power Systems
. . . . . . . . . . . . . . . . . . .
38
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
40
Chapter 3 Battery Energy Storage Systems
41
3.1
Conventional Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . .
41
3.2
Modern Systems . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
44
3.3
Design Concept Based on a Cascade Converter . . . . . . . . . . . . . .
46
3.3.1
Transformer-Based System . . . . . . . . . . . . . . . . . . . . . .
46
3.3.2
Transformerless System . . . . . . . . . . . . . . . . . . . . . . . .
48
3.4
Practical Issues for the 6.6-kV System . . . . . . . . . . . . . . . . . . .
50
3.5
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
52
Chapter 4 The 200-V, 10-kW, 3.6-KWh Experimental System
53
4.1
System Configuration
. . . . . . . . . . . . . . . . . . . . . . . . . . . .
53
4.2
Overview of the Control System . . . . . . . . . . . . . . . . . . . . . . .
56
4.3
Sampling Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
59
4.4
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
60
Chapter 5 Active-Power Control and SOC-Balancing Control
61
5.1
Active-Power Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
61
5.2
SOC-Balancing Control . . . . . . . . . . . . . . . . . . . . . . . . . . .
64
5.2.1
Clustered SOC-Balancing Control . . . . . . . . . . . . . . . . . .
66
5.2.2
Individual SOC-Balancing Control . . . . . . . . . . . . . . . . .
72
Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
74
5.3.1
Startup Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . .
74
5.3.2
Charging and Discharging Waveforms . . . . . . . . . . . . . . . .
76
5.3.3
Battery-Unit Voltage and Current Waveforms . . . . . . . . . . .
78
5.3
5.4
Contents
v
5.3.4
Transient Waveforms . . . . . . . . . . . . . . . . . . . . . . . . .
79
5.3.5
Effectiveness of the SOC-Balancing Control . . . . . . . . . . . .
80
5.3.6
Ride-Through Capability of Voltage Sags . . . . . . . . . . . . . .
82
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
83
Chapter 6 Fault-Tolerant Control
85
6.1
Reliability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
85
6.2
Fault Tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
85
6.3
Literature Review . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
86
6.4
SOC Balancing During Fault-Tolerant Operation . . . . . . . . . . . . .
88
6.5
Methods of Bypassing a Faulty Converter Cell . . . . . . . . . . . . . . .
90
6.6
Fault-Tolerant Control . . . . . . . . . . . . . . . . . . . . . . . . . . . .
91
6.7
Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
97
6.8
SOC Balancing During Fault-Tolerant Operation . . . . . . . . . . . . . 102
6.9
Simulation Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
6.10
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Chapter 7 Active-Power Control of Individual Converter Cells
108
7.1
Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
7.2
Control Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
7.3
Experimental Results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
7.4
Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Chapter 8 Conclusion and Future Research
119
8.1
Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
8.2
Future Research
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
References
122
List of Publications
139
vi
List of Tables
2.1
Voltage levels and corresponding switching states of a five-level diodeclamped converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2
Possible combinations of voltage levels and corresponding switching states
of a five-level flying-capacitor converter . . . . . . . . . . . . . . . . . . .
2.3
21
Possible combinations of voltage levels and corresponding switching states
of a five-level cascade converter . . . . . . . . . . . . . . . . . . . . . . .
2.4
19
23
Comparison of power component requirements per phase leg among three
m-level converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
24
2.5
Commercial medium-voltage motor drives based on multilevel converters
39
3.1
Major battery energy storage system installations throughout the world .
42
4.1
Circuit parameters of the experimental battery energy storage system . .
55
7.1
Five modes of operation, each of which has a different set of converter-cell
power commands, and its corresponding theoretical zero-sequence voltage 112
vii
List of Figures
1.1
Power electronics as a combination of technologies of electronics, power
and control [9]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2
Approximate development timeline of major high-power semiconductor
devices [15]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3
2
3
Voltage and current ratings of major high-power semiconductor devices
commercially available [16]. . . . . . . . . . . . . . . . . . . . . . . . . .
4
1.4
Global cumulative installed wind power capacity 1996-2008 [37]. . . . . .
6
1.5
A battery energy storage system installed in the vicinity of renewable
energy resources for power leveling. . . . . . . . . . . . . . . . . . . . . .
1.6
Practical demonstration of power leveling of a 500-kW wind turbine generator by a 400-kW NaS battery energy storage system [40]. . . . . . . .
1.7
8
A battery energy storage system. (a) Schematic, and (b) Possible operating modes for active- and reactive-power generation. . . . . . . . . . . . .
1.9
7
Approximate scale of energy storage systems installed by mid-2006 excluding pumped hydro storage and compressed-air energy storage [41]. . .
1.8
7
9
A battery energy storage system. (a) Equivalent circuit, and (b) Phasor
diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10
1.10 Unity power-factor operation of the battery energy storage system. (a)
Discharging, and (b) Charging. . . . . . . . . . . . . . . . . . . . . . . .
10
2.1
Simplified classification of medium-voltage high-power converters. . . . .
16
2.2
A two-level converter. (a) One phase leg schematic, and (b) Converter
phase voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
List of Figures
2.3
A five-level diode-clamped converter. (a) One phase leg schematic, and
(b) Converter phase voltage. . . . . . . . . . . . . . . . . . . . . . . . . .
2.4
18
A five-level flying-capacitor converter. (a) One phase leg schematic, and
(b) Converter phase voltage. . . . . . . . . . . . . . . . . . . . . . . . . .
2.5
viii
20
A five-level cascade converter. (a) One phase leg schematic, and (b) Converter phase voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
22
2.6
A seven-level asymmetrical cascade converter. . . . . . . . . . . . . . . .
24
2.7
Nine-level hybrid asymmetrical converter consisting of a three-phase NPC
converter, with a three-level H-bridge in series with each phase. (a) Main
circuit, and (b) Converter voltages. . . . . . . . . . . . . . . . . . . . . .
2.8
2.9
25
A nine-level converter using a five-level full-bridge diode-clamped converter as the H-bridge in the cascade converter. . . . . . . . . . . . . . .
26
Modular multilevel converter. (a) Main circuit, and (b) Chopper cell. . .
27
2.10 Multilevel converter using three standard three-phase converter cells along
with an output transformer. (a) System configuration, and (b) Vector
diagram of the system with the fundamental voltages. . . . . . . . . . . .
28
2.11 Classification of multilevel modulation methods. . . . . . . . . . . . . . .
29
2.12 Phase-disposition modulation for a five-level diode-clamped converter. (a) One
phase leg schematic of the converter, and (b) Phase-disposition modulation. 31
2.13 Phase-shifted sinusoidal PWM for a five-level cascade converter. (a) One
phase leg schematic of the converter, and (b) Phase-shifted sinusoidal PWM. 31
2.14 Space vector diagram for a five-level converter. . . . . . . . . . . . . . . .
32
2.15 Generalized stepped-voltage waveform. . . . . . . . . . . . . . . . . . . .
33
2.16 Space vector control of an 11-level converter. (a) Load voltage space
vectors generated by the converter, and (b) Reference and output voltage
vectors. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
34
2.17 Power circuits and line currents of multipulse diode rectifiers. (a) 12-pulse,
and (b) 18-pulse. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
35
2.18 A typical medium-voltage motor drive based on an NPC inverter with
12-pulse diode rectifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
35
List of Figures
ix
2.19 A medium-voltage motor drive based on a cascade PWM inverter with
non-regenerative frond end [46]. . . . . . . . . . . . . . . . . . . . . . . .
36
2.20 A typical medium-voltage adjustable-speed motor drive with NPC rectifier
as an active front end. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
37
2.21 A neutral-point-clamped converter based motor drive of Type N700 bullet
train in Japan [22]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
37
2.22 A medium-voltage motor drive based on a cascade PWM inverter with
regenerative three-phase active frond end [101]. . . . . . . . . . . . . . .
38
2.23 The ±80-MVA GCT STATCOM using NPC converters at Kanzaki substation, Japan [115]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1
The 10-MW 40-MWh battery energy storage system based on an 18-pulse
power converter in Chino, CA, USA [42]. . . . . . . . . . . . . . . . . . .
3.2
44
The 600-kW 200-kWh battery energy storage system based on a neutralpoint clamped converter in UK. . . . . . . . . . . . . . . . . . . . . . . .
3.4
43
The 5-MVA 2.5-MWh battery energy storage system based on a 12-pulse
power converter in Vernon, CA,USA [58]. . . . . . . . . . . . . . . . . . .
3.3
40
45
Feasible circuit configuration of the 6.6-kV transformer-based battery energy storage system based on combination of a cascade PWM converter
with a cascade number N = 6, and 18 NiMH battery units with a nominal
voltage of 288 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
47
3.5
Charge/discharge characteristic of a typical NiMH battery cell [130]. . . .
48
3.6
Feasible circuit configuration of the 6.6-kV transformerless battery energy
storage system based on combination of a cascade PWM converter with
a cascade number N = 10, and 30 NiMH battery units with a nominal
voltage of 660 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1
49
Experimental system configuration of the 200-V, 10-kW, 3.6-kWh downscaled battery energy storage system based on combination of a threephase cascade PWM converter with a cascade number N = 3, and nine
4.2
NiMH battery units with a nominal voltage of 72 V. . . . . . . . . . . . .
54
Control system for the battery energy storage system. . . . . . . . . . . .
56
List of Figures
x
4.3
Snapshot of the cascade converter. (a) Front view, and (b) Rear view. . .
57
4.4
Control block diagram for the 200-V system with a cascade number N = 3. 58
4.5
Sampling method showing three phase-shifted carriers and three reference
signals for a cluster of three converter cells of one phase. . . . . . . . . .
59
5.1
Active-power control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
63
5.2
Block diagram of the d-axis current control, excluding the effect of a onesampling delay. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3
63
Switching-pattern swapping scheme for SOC balancing of multiple battery
units in an 11-level cascade SCM converter. . . . . . . . . . . . . . . . .
65
5.4
Clustered SOC-balancing control based on zero-sequence voltage injection. 69
5.5
Three-phase to two-phase transformation of SOC errors in the u-, v-, and
w-clusters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.6
69
Illustration of the injection of zero-sequence voltage and the resulting neutral shift. (a) Phasor diagram before the injection of zero-sequence voltage,
and (b) Phasor diagram after the injection of zero-sequence voltage. . . .
71
5.7
Clustered SOC-balancing control, taking the u-phase as an example. . . .
72
5.8
Individual SOC-balancing control between three cascaded converter cells
inside each cluster, paying attention to the n-th converter cells.
5.9
. . . . .
73
Individual SOC-balancing control, taking the u-phase n-th converter cell
as an example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
73
5.10 Experimental waveforms when the battery energy storage system was
started. (a) CB1 was turned on at t = 0, (b) CB2 was turned on at
t = 30 s, and (c) Controller was started at t = 2 min. . . . . . . . . . . .
75
5.11 Experimental waveforms when the battery bank was charged at 10 kW
with a mean SOC window between 40 and 45%. . . . . . . . . . . . . . .
76
5.12 Experimental waveforms when the battery bank was discharged at 10 kW
with a mean SOC window between 40 and 45%. . . . . . . . . . . . . . .
77
5.13 Experimental waveforms with repetitive charging and discharging of the
battery bank, where a mean SOC window was kept between 25 and 75%.
78
List of Figures
xi
5.14 Battery voltage and current waveforms. (a) During charging at 10 kW,
and (b) During discharging at 10 kW. The mean SOC value was 65%. . .
79
5.15 Experimental waveforms when p∗ was changed from 10 kW to −10 kW in
30 ms with a mean SOC value of 70%. . . . . . . . . . . . . . . . . . . .
80
5.16 Experimental waveforms when p∗ was changed from −10 kW to 10 kW in
30 ms with a mean SOC value of 30%. . . . . . . . . . . . . . . . . . . .
81
5.17 Experimental waveforms to verify the effectiveness of the SOC-balancing
control, where a mean SOC value was kept between 30 and 70% with
p∗ = 10 kW and q ∗ = 0. . . . . . . . . . . . . . . . . . . . . . . . . . . .
81
5.18 Voltage-sag generator used to simulate a single-phase voltage sag in the
laboratory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
82
5.19 Experimental waveforms when a voltage sag of 25% occurred in the uphase and lasted for 100 ms during charging at 10 kW with a mean SOC
value of 75%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
83
5.20 Experimental waveforms when a voltage sag of 25% occurred in the uphase and lasted for 100 ms during discharging at 10 kW with a mean
SOC value of 75%. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.1
A 4.16-kV 7.2-MVA STATCOM based on a five-level cascade converter
with one redundant converter cell in each phase. . . . . . . . . . . . . . .
6.2
84
87
Space vector diagram of a seven-level cascade converter. (a) Normal condition, and (b) With one faulty cell in the u-phase. Dots with a circle
around represent faulty space vectors. . . . . . . . . . . . . . . . . . . . .
6.3
88
A 4.16-kV motor drive based on a cascade PWM inverter [154]. (a) Power
circuit, (b) Normal operation with no faulty converter cell, and (c) Balanced operation with one faulty converter cell in u-phase. . . . . . . . . .
6.4
Methods for bypassing a faulty converter cell. (a) Using thyristor switches,
and (b) Using a bypass contactor. . . . . . . . . . . . . . . . . . . . . . .
6.5
89
90
Method for bypassing a faulty converter cell used in the dissertation, which
exploits the failure state of the power switching device. . . . . . . . . . .
91
List of Figures
6.6
Block diagram of the fault-tolerant control riding through a single-convertercell fault. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.7
xii
92
Phasor diagrams of converter-cell voltages with a cascade number N = 3.
(a) During normal operation, (b) During a fault in the u-phase converter
cell numbered 1 without zero-sequence voltage injection, and (c) During
a fault in the u-phase converter cell numbered 1 with the injection of
zero-sequence voltage. Note that the modulation indices of the u-phase
converter cells were increased by a factor of 1.5 in (b) and (c). They,
however, got reduced in (c) due to the injection of zero-sequence voltage.
6.8
93
Experimental waveforms when the u-phase converter cell numbered 1 was
bypassed while the remaining eight battery units were being charged or
discharged. (a) Charged at 10 kW with a mean SOC value at 65 %, and
(b) Discharged at 10 kW with a mean SOC value at 69%. . . . . . . . . .
6.9
98
Transient waveforms during charging at 10 kW. (a) When the u-phase
converter cell numbered 1 was bypassed with a mean SOC value of 67%,
and (b) When the u-phase converter cell numbered 1 was restored with a
mean SOC value of 69%. . . . . . . . . . . . . . . . . . . . . . . . . . . .
99
6.10 Experimental voltage waveforms at the ac side of the cascade converter
during normal operation at 10 kW in discharging. (a) Four converter-cell
ac voltages, (b) Three line-to-neutral voltages, and (c) Three line-to-line
voltages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
6.11 Experimental voltage waveforms at the ac side of the cascade converter
during fault-tolerant operation at 10 kW in discharging. (a) Four convertercell ac voltages, (b) Three line-to-neutral voltages, and (c) Three line-toline voltages.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
6.12 Experimental SOC waveforms with no fault-tolerant control, when the uphase converter cell numbered 1 was bypassed while the remaining eight
battery units were charged at 10 kW. . . . . . . . . . . . . . . . . . . . . 103
6.13 Experimental SOC waveforms with the fault-tolerant control, when the uphase converter cell numbered 1 was bypassed while the remaining eight
battery units were repetitively charged and discharged at 10 kW. . . . . 103
List of Figures
xiii
6.14 Simulation waveforms during charging at 10 kW. (a) When the u-phase
converter cell numbered 1 was bypassed, and (b) When the u-phase converter cell numbered 1 was restored. . . . . . . . . . . . . . . . . . . . . . 104
6.15 Simulation voltage waveforms at the ac side of the cascade converter during normal operation at 10 kW in discharging. (a) Four converter-cell
ac voltages, (b) Three line-to-neutral voltages, and (c) Three line-to-line
voltages. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
6.16 Simulation voltage waveforms at the ac side of the cascade converter during fault-tolerant operation at 10 kW in discharging. (a) Four convertercell ac voltages, (b) Three line-to-neutral voltages, and (c) Three line-toline voltages.
7.1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Block diagram of the active-power control of individual converter cells
(represented by solid lines). The part represented by dashed lines is the
active-power control of the whole converter cells. For simplicity, the SOCbalancing control and the fault-tolerant control are not included. . . . . . 109
7.2
Feedback loop (taking u-phase as an example) used in the experiment to
make the converter-cell powers at the dc side (Pun ) equal to the respective
∗
commands at the ac side (Pun
) regardless of the converter-cell losses. . . 111
7.3
Experimental power waveforms of the nine battery units during five modes
of operation of Table 7.1. . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
7.4
Experimental waveforms during mode I. . . . . . . . . . . . . . . . . . . 113
7.5
Experimental waveforms during mode II. . . . . . . . . . . . . . . . . . . 114
7.6
Experimental waveforms during mode III. . . . . . . . . . . . . . . . . . 114
7.7
Experimental waveforms during mode IV. . . . . . . . . . . . . . . . . . 115
7.8
Experimental waveforms during mode V. . . . . . . . . . . . . . . . . . . 115
7.9
Modulating signals (normalized by respective battery-unit voltages) of uphase converter cells numbered 1 and 3. (a) Mode I, (b) Mode II, (c)
Mode III, (d) Mode IV, and (e) Mode V. . . . . . . . . . . . . . . . . . . 116
List of Figures
xiv
7.10 Experimental waveforms of the battery current in the u-phase convertercell numbered 1. (a) Mode I, (b) Mode II, (c) Mode III, (d) Mode IV, and
(e) Mode V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
1
Chapter 1
Introduction
1.1
1.1.1
Background
Trend of Power Electronics
Modern era of power electronics began with the development of commercial siliconcontrolled rectifier (SCR) or thyristor by the General Electric Company in 1958 [1]–[3].
The thyristor is a three-junction device, which is triggered into conduction by a short
gate-current pulse. However, once it is in conduction mode, the gate circuit has no control. Therefore, force-commutated inverters such as McMurray inverter and McMurrayBedford inverter played the central role in 1960-70s [4], [5].
In many respects, thyristor is nearly the ideal switch for power electronic applications.
It can block high voltages in the off state and conduct large currents in the on state with
only a small on-state voltage drop. However, its inability to turn off by a gate pulse
prevents its use in switch-mode applications.
In the 1970s, gate turn-off (GTO) thyristor was developed [6]–[8]. The GTO is a
thyristor-like latching device that can be turned off by a short gate-current pulse. Although the inclusion of a turn-off capability in a thyristor required some compromises in
the operational capabilities of the device, the gate turn-off capability provided increased
flexibility in circuit applications and eliminated the use of elaborate commutation circuitry.
In 1974, William E. Newell from Westinghouse Research Laboratories, Pittsburgh
called for the need of communication and cooperation between specialists in electronics,
rcu
its
Ci
es
r
El
ec
tro
De
vic
nic
2
g
we atin t
Po Rot pmen
ui
eq
c
ati nt
St pme
ui
eq
s
Chapter 1 Introduction
Power
electronics
Continuous
Discrete
Control
Fig.
1.1: Power electronics as a combination of technologies of
electronics, power and control [9].
power and control to help power electronics emerge from limbo [9]. Fig. 1.1 illustrates his
vision of power electronics. During 1980s and 1990s, there were significant advancement
in the key areas of power electronics, such as power semiconductor devices, control and
converter circuits.
In the late 1970s, the power metal-oxide-semiconductor field-effect transistor (MOSFET) appeared, providing the first switching device having a high input impedance.
Its evolution represents the convergence of power semiconductor technology with mainstream complementary metal-oxide-semiconductor (CMOS) technology for the first time.
Being a voltage-controlled device, the MOSFET has the advantage over the power
bipolar-junction transistor (BJT) of requiring very low switching power. In addition,
being a majority carrier device, it has the advantage of much enhanced speed and has
replaced the power BJT in many applications.
The development of power semiconductor devices took an important turn in the 1980s
when new process technology was developed that allowed integration of MOS and BJT
technologies on the same chip. From this emerged the insulated-gate bipolar transistor (IGBT) in which bipolar current conduction was controlled by using an MOS-gate
structure [10]. It is an important milestone in the history of power electronics.
In the late 1980s, Mitsubishi Electric introduced the concept of intelligent power module (IPM) [11], [12]. The IPM integrates the dedicated drive and protection circuitry
Chapter 1 Introduction
3
Transistor-based devices
Power BJT
1955
1965
Diode
Low-voltage (LV)
IGBT
1975
Medium-voltage
(MV) IGBT
1985
SCR
GTO
1995
GCT/IGCT
Injection enhanced
gate transistor
(IEGT)
2005
Symmetrical gate
commutated thyristor
(SGCT)
Thyristor-based devices
Fig. 1.2: Approximate development timeline of major high-power
semiconductor devices [15].
with the IGBT in an appropriate packaging to overcome the IGBT’s inherent parasitic
limitations and maximize system performance and reliability. It also helps to reduce
system size and cost.
In 1996, gate-commutated thyristor (GCT), also known as integrated gate-commutated
thyristor (IGCT), was developed from the GTO strucure [13], [14]. Due to its features
such as snubberless operation and low switching loss, the GCT has continuously replaced
the GTO thyristor in medium-voltage (MV) drives.
Fig. 1.2 gives the approximate development timeline of major high-power semiconductor devices [15], while Fig. 1.3 shows the voltage and current ratings of major high-power
semiconductor devices commercially available today [16].
With achievements made by several generations of power semiconductor devices, silicon
is considered to be approaching limit in terms of performance improvement. In 1999,
Siemens AG introduced a new high-voltage power MOSFET, namely CoolMOS, that
virtually combined the low switching loss of a MOSFET with the on-state loss of an
IGBT [17].
Today, extensive research is being carried out to replace silicon-based devices by those
based on wide bandgap materials like silicon carbide (SiC). SiC Schottky diodes rated at
Chapter 1 Introduction
4
V [kV]
12
12 kV/1.5 kA
(Mitsubishi)
SCR
10
6.5 kV/0.6 kA
(Eupec)
8
7.5 kV/1.65 kA
(Eupec) 6 kV/3 kA 6.5 kV/4.2 kA
(ABB)
(ABB)
6
6.5 kV/1.5 kA
(Eupec)
0
1
4.8 kV/5 kA
(Westcode)
2.5 kV/1.8 kA 1.7 kV/3.6 kA
(Fuji)
(Eupec)
4.5 kV/0.9 kA
(Mitsubishi)
2
0
GTO/GCT
3.3 kV/1.2 kA
(Eupec)
4
6 kV/6 kA
(Mitsubishi)
IGBT
2
3
4
5
6
I [kA]
Fig. 1.3: Voltage and current ratings of major high-power semiconductor devices commercially available [16].
300-1200 V are already available in the market [18], [19]. Moreover, Mitsubishi Electric
Corporation has reported a successful development of 1.2-kV SiC MOSFETs and built a
prototype 400-V 3.7-kW motor drive using SiC MOSFETs and SiC Schottky diodes [20].
Although the evolution of power electronics has generally followed the evolution of
power semiconductor devices, the advent of digital signal processors (DSPs) and field
programmable logic arrays (FPGAs) in 1980s brought tremendous size and cost reduction to the controller accompanied by improved performance, increased reliability and
flexibility of control. Over the last two decades, digital control methods and digital controllers based on general-purpose or dedicated microprocessors, DSPs, or programmable
logic devices have become pervasive in applications such as motor drives and three-phase
power converters for utility interfaces.
Topologically, multilevel converters have been developed. In 1981, Nabae et al. [21]
proposed the pioneering neutral-point clamped (NPC) voltage-source converter (VSC).
The topology offered a simple solution to extend voltage and power ratings of the ex-
Chapter 1 Introduction
5
isting two-level VSC technology, which were severely limited by the blocking voltages of
the existing power switching devices with active turn-on and turn-off capabilities. Moreover, due to the increased number of voltage levels, the harmonic voltages and the total
harmonic distortion (THD) are lower than that of a comparable two-level VSC. The
three-level NPC-VSC was soon introduced to the market by leading manufacturers and
is currently the most widely used topology in MV drive applications including Type N700
bullet trains in Japan [22]. An alternative multilevel topology known as flying-capacitor
converter, where the voltage across an open switch is constrained by clamping capacitors
instead of clamping diodes, has been proposed in 1992 [23].
Another development in multilevel converter topology occurred in the mid-1990s when
Hammond [24] and Peng et al. [25] filed two major patents extending the idea of cascade converter in [26] for medium-voltage adjustable-speed motor drives and static synchronous compensators (STATCOMs), respectively. Besides its applications in motor
drives and STATCOMs, the cascade converter is also suitable for grid integration of
renewable energy resources such as fuel cells, photovoltaics and wind turbine generators [27]–[29]. It has also gained interests in energy storage systems based on electric
double-layer capacitors (EDLCs) and batteries.
Other developments in converter topologies include the introduction of resonant dc-link
inverter in 1986 [30]. This was an attempt in reducing switching losses by modifying the
switching environment. Before this, increase in switching frequency and improvement
in switching losses had been mainly as a result of improvements in device speed and
safe operating area (SOA) ratings, although use of snubbers [31]–[33] and high-frequency
(HF) link converter [34], [35] had already been investigated.
Finally, the trend in power electronics today is toward the improvement of efficiency
and reliability, and the elimination/size-reduction of transformers and inductors/capacitors
based on power semiconductor technology, converter topologies and control methods.
Chapter 1 Introduction
6
MW
150,000
120,798
120,000
93,835
90,000
74,052
59,091
60,000
39,431
30,000
47,620
31,100
17,400
10,200 13,600
6,100 7,600
23,900
0
1996 1997 1998 1999 2000 2001 2002 2003 2004 2005 2006 2007 2008
Fig. 1.4: Global cumulative installed wind power capacity 1996-2008 [37].
1.1.2
Power Electronics For Renewable Energy Resources
1.1.2.1
Renewable Energy Resources
Depletion of fossil fuels, environmental considerations and security of supply concerns
have spurred significant interests in renewable energy resources such as wind power and
solar power [36].
Fig. 1.4 shows the global cumulative installed capacity of wind power [37]. Over the
past ten years, the global wind power capacity has grown by an average rate of over 30%
annually, reaching more than 120 GW by the end of 2008. Global Wind Energy Council (GWEC) predicts that wind power will supply 10-12% of global electricity demand
by 2020.
However, renewable energy resources including wind power are “intermittent” in nature. Their power varies under the influence of meteorological fluctuations. Therefore,
a large amount of renewable energy may have an undesirable effect on power system
voltage/frequency stability [38]. Energy storage systems (ESS) [39] are indispensable for
successful integration of renewable energy resources into power systems.
Fig. 1.5 shows a battery energy storage system (BESS) installed in the vicinity of
renewable energy resources. The energy storage system stores the excess power from grid
when the renewable energy resources produces a larger power than an average power over
Chapter 1 Introduction
7
Power
Wind power
0
12
24h
Grid
Power
Solar power
4
12
Battery energy
storage system
24h
Fig. 1.5: A battery energy storage system installed in the vicinity
of renewable energy resources for power leveling.
a period of time, and releases the shortage of power back to the grid when they produce
a smaller power. The process is referred to as “power leveling.”
Fig. 1.6 shows results from a practical demonstration of power leveling at Hachijojima
wind power station, Japan, which was jointly carried out by Tokyo Electric Power Company, Inc. (TEPCO) and NGK Insulators, Ltd. [40]. A 400-kW sodium sulphur (NaS)
600
Wind power
A
AU
500
Power (kW)
400
Total power
A
A
AU
300
200
100
0
NaS Battery
-100
-200
-300
0
60
120
180
240
300
Time (s)
Fig. 1.6: Practical demonstration of power leveling of a 500-kW
wind turbine generator by a 400-kW NaS battery energy storage
system [40].
Chapter 1 Introduction
8
battery energy storage system was integrated with a 500-kW wind turbine generator.
The net output was almost constant, verifying the effectiveness of the battery energy
storage system in power leveling of renewable energy resources.
1.1.2.2
Battery Energy Storage Systems
Fig. 1.7 shows the approximate scale of energy storage systems installed by mid-2006
excluding pumped hydro storage and compressed-air energy storage [41]. Battery systems make up a large proportion compared to flywheels, electric double-layer capacitors
100 MW
(EDLCs) and superconducting magnetic energy storage (SMES) systems.
Seconds
EDLC/
Flywheel
1 MW
10 kW
Power
SMES
Lithium
Conventional
(lead-acid,
NiCd, NiMH)
Minutes
Hours
NaS
Flow
10 kWh
1 MWh
100 MWh
Energy
Fig. 1.7: Approximate scale of energy storage systems installed
by mid-2006 excluding pumped hydro storage and compressed-air
energy storage [41].
Conventional battery technologies include lead acid, nickel cadmium (NiCd), and nickel
metal hydride (NiMH), while advanced battery technologies include:
• Lithium (Li)-based batteries, e.g. Li-ion
• High-temperature batteries, e.g. NaS
• Flow batteries, e.g. vanadium redox batteries (VRB) and zinc bromine (ZnBr).
Chapter 1 Introduction
VS
9
At ac terminal
Grid
Capacitive
Coupling
transformer
I 6
I
Charging
Discharging
VS
IDC 6
VDC
Converter
C
Inductive
At dc terminal
Charging
−IDC
IDC VDC Discharging
Battery
(a)
(b)
Fig. 1.8: A battery energy storage system. (a) Schematic, and (b)
Possible operating modes for active- and reactive-power generation.
Fig. 1.8(a) shows schematic of a battery energy storage system, composed of a voltagesource converter and a battery. The battery energy storage system can exchange both
active and reactive power with the grid. The active and reactive power, generated or
absorbed by the system, can be controlled independently of each other, and any combination of active-power generation/absorption with reactive-power generation/absorption
is possible, as illustrated in Fig. 1.8(b). The active power that the converter exchanges
at its ac terminals with the grid must, of course, be supplied to, or absorbed from, its
dc terminals by the battery. By contrast, the reactive power exchanged is internally
generated by the converter, without the battery playing any significant part in it.
The battery energy storage system in Fig. 1.8 can be considered as an ideal sinusoidal
synchronous voltage source behind a coupling reactance provided by the leakage inductance of the coupling transformer as shown in Fig. 1.9(a). Since the generated voltage
(V ) is completely controllable, the ac current (I) can be supplied at any phase angle
relative to the grid voltage (VS ). Fig. 1.9(b) shows the phasor diagram. The active and
Chapter 1 Introduction
Grid
I
6
10
VS 6 0◦
LAC
V
jωLAC I
δ
VS
V6 δ
◦
(a)
(b)
Fig. 1.9: A battery energy storage system. (a) Equivalent circuit,
and (b) Phasor diagram.
VS
I
δ
V
jωLAC I
V
δ
jωLAC I
VS
I
(a)
(b)
Fig. 1.10: Unity power-factor operation of the battery energy storage system. (a) Discharging, and (b) Charging.
reactive power supplied by the battery energy storages system to the grid are given by:
V VS
sin δ
ωLAC
VS2
V VS
cos δ −
.
Q=
ωLAC
ωLAC
P =
(1.1)
(1.2)
In the dissertation, the reactive power (Q) is always considered zero and therefore, the
battery energy storage system operates in two modes:
• discharging at unity power factor, where the converter voltage (V ) leads the grid
voltage (VS ) by an angle δ, as shown in Fig. 1.10(a), and
• charging at unity power factor, where the converter voltage (V ) lags the grid
voltage (VS ) by an angle δ, as shown in Fig. 1.10(b).
Chapter 1 Introduction
■ Conventional Systems
11
Topologically, conventional battery energy storage sys-
tems are based on a multipulse converter employing complicated zigzag transformer.
For example, the 10-MW 40-MWh system in Chino, California is based on an 18-pulse
converter with complicated multiwinding transformer to synthesize a staircase voltage
waveform [42]. The multi-winding transformer is expensive, bulky, lossy, and prone to
failure.
Modern multilevel converters such as diode-clamped, flying capacitor, and cascade
converters are preferred to traditional transformer-based multipulse converters [21]–[26],
[43], [44]. Although cascade converters have been primarily investigated for STATCOMs
and motor drives [45]–[50], their unique structure makes them suitable for energy storage
systems using batteries.
■ Multilevel Cascade Converter Based Systems
Multilevel cascade converters
have become an attractive topology for medium-voltage high-power applications [29],
[44], [47]–[50], [51], [52]. They are simple and modular in structure, and can reach
medium/high voltages with low voltage/current harmonics without using step-up transformers or switching devices connected in series.
Although the concept of cascade converters has existed for more than three decades [26],
it was in the mid-1990s that they grabbed the attention of power electronics research
scientists and engineers. In 1997, two major patents [24], [25] were filed that indicated
the advent of the cascade converters for motor drives and utility applications.
Peng et al. [45] presented transformerless STATCOMs based on cascade staircasemodulated (SCM) converters. Robicon Corporation commercialized cascade pulsewidthmodulated (PWM) inverters for medium-voltage adjustable-speed motor drives [46],
while Alstom T&D commercialized large-rated cascade-converter-based STATCOMs [53].
More recently, with advancement in batteries, integration of cascade converters with
batteries have gained interests. Tolbert et al. [54] described a three-phase cascade SCM
converter using batteries for a motor drive. Ertl et al. [55] discussed a single-phase cascade PWM converter using batteries for a switch-mode power amplifier. This dissertation
discusses a three-phase cascade PWM converter for a battery energy storage system.
Chapter 1 Introduction
1.2
12
Research Objective
The aim of the research is to study a battery energy storage system based on a multilevel cascade PWM converter and investigate three important issues indispensable for its
practical use, namely state-of-charge (SOC) balancing of battery units, fault tolerance of
the system, and active-power control of individual converter cells.
■ SOC Balancing
The SOC of a battery is its available capacity, expressed as a
percentage of the rated capacity. Due to asymmetric battery units, unequal convertercell losses, and so on, SOC imbalance may occur among multiple battery units in a battery
energy storage system based on a cascade converter. This may result in the reduction of
total available capacity of the battery units, and may also cause overcharge/overdischarge
of a particular battery unit. The research aims to propose an SOC-balancing control and
verify its effectiveness based on a 200-V laboratory system.
■ Fault Tolerance
Medium-voltage battery energy storage system is a high-power
equipment. When it fails, the downtime can be very expensive. Therefore, reliability is
an important issue. However, the use of multilevel cascade converter increases its chances
of failure because the multilevel converter employs a large number of power switching
devices. The research aims to present, and verify based on the 200-V laboratory system,
a fault-tolerant control that, during a converter-cell or battery-unit failure, enables the
battery energy storage system to maintain continuous operation by producing a threephase balanced line-to-line voltage and achieving SOC balancing of remaining healthy
battery units.
■ Active-Power Control of Individual Converter Cells
In the cascade-converter-
based battery energy storage system, power-handling capacities of the multiple battery
units may differ due to manufacturing tolerances and operating conditions or when one
or more of the battery units are replaced by the new ones. For maximum utilization
of battery energy, it would then be necessary to operate one or more battery units at
reduced or increased power levels. The research aims to present, and verify based on
the 200-V laboratory system, an active-power control of individual converter cells that
enables the multiple battery units to operate at different power levels while producing a
Chapter 1 Introduction
13
three-phase balanced line-to-line voltage.
1.3
Dissertation Outline
The dissertation has been organized into 8 chapters as follows:
■ Chapter 1 Introduction (Current Chapter)
Chapter 1 briefly reviews the trend
in power electronics. The chapter explains how battery energy storage systems can be
used for grid integration of renewable energy resources like wind power that produce fluctuating/intermittent output. It also talks about the drawbacks of conventional topologies
and discusses the suitability of multilevel topologies, especially cascade converters, for
the battery energy storage systems.
■ Chapter 2 Trend of Medium-Voltage Power Converters
Chapter 2 provides
an overview of medium-voltage high-power converters with focus on multilevel voltagesource converters such as diode-clamped, flying-capacitor, and cascade converters, and
their modulation strategies. Emerging topologies like hybrid/asymmetrical converters
and modular multilevel converters are also reviewed. Finally, applications of the multilevel converters in industries and power distribution systems are discussed.
■ Chapter 3 Battery Energy Storage Systems
Chapter 3 reviews the conven-
tional battery energy storage systems which are based on multipulse converters with
complicated zigzag transformers. The chapter discusses the present trend towards the
use of multilevel converters for the battery energy storage systems. Basic design concept
of the 6.6-kV system based on a multilevel cascade converter is presented, and issues for
its practical use are discussed.
■ Chapter 4 The 200-V, 10-kW, 3.6-kWh Experimental System
Chapter 4
describes the experimental battery energy storage system based on a combination of a
multilevel cascade PWM converter and NiMH battery units. The chapter discusses the
system configuration and gives an overview of the control system including the sampling
method.
Chapter 1 Introduction
■ Chapter 5 Active-Power Control and SOC-Balancing Control
14
Chapter 5
describes an active-power control for the battery energy storage system, which is based
on the synchronous dq reference frame and provides decoupling control of the active
and reactive current components. The chapter proposes an SOC-balancing control for
effective utilization of battery energy and stable operation of the system. Theoretical
analysis is done and experimental results are presented to verify the effectiveness of the
presented control methods.
■ Chapter 6 Fault-Tolerant Control
Chapter 6 reviews fault-tolerant controls for
cascade converters that enable them to maintain continuous operation during a convertercell failure. The chapter presents a new fault-tolerant control for the battery energy
storage system that, during the converter-cell or battery-unit failure, not only produces
a three-phase balanced line-to-line voltage but also achieves SOC balancing of remaining
healthy battery units. Theoretical analysis is done and experimental results are presented
to verify the control method.
■ Chapter 7 Active-Power Control of Individual Converter Cells
Chapter 7
presents an active-power control of individual converter cells for the cascade-converterbased battery energy storage system. The control enables the multiple battery units
to operate at different power levels while producing a three-phase balanced line-to-line
voltage. This is particularly advantageous when power-handling capacities of multiple
battery units differ. Theoretical analysis is done and experimental results are presented
to verify the control method.
■ Chapter 8 Conclusion and Future Research
Chapter 8 summarizes the achieve-
ment of the research and discusses the work to be done.
15
Chapter 2
Trend of Medium-Voltage Power
Converters
This chapter discusses an overview of medium-voltage high-power converters. Attention is paid to well-established and emerging topologies of multilevel voltage-source
converters as well as their modulation strategies and applications in industries and power
distribution systems.
2.1
Medium-Voltage Power Converters
Fig. 2.1 presents a simplified classification of medium-voltage high-power converters.
They are broadly categorized as current-source (CS) and voltage-source (VS) converters.
Two types of current-source inverters are commonly used: the load-commutated inverter
(LCI) and the PWM current-source inverter. For a higher power rating up to 100 MW,
the LCI is a preferred choice, with which the voltage-source inverters normally cannot
compete in terms of cost and energy efficiency. Its main drawbacks include low input
power factor and distorted input current waveforms, which can be overcome by the
PWM current-source inverter. The power rating of the PWM current source inverters is
normally in the range of 1-10 MW and can be further increased with parallel inverters.
Over the last 10-15 years, the voltage-source converters have experienced a higher
market penetration and a more noticeable development in comparison to current-source
converters. Topologically, the classical two-level voltage-source converter is suited to
low- or medium-power applications due to switching-device voltage limits. Nevertheless,
Chapter 2 Trend of Medium-Voltage Power Converters
16
Medium-voltage
high-power converters
Voltage source
Current source
Load
commutated
PWM
current source
High-power
two level
Multilevel
Diodeclamped
Flying
capacitor
Cascade
H-bridge
Fig. 2.1: Simplified classification of medium-voltage high-power converters.
the series connection of switching devices enables it to be used for medium-voltage highpower applications.
Multilevel voltage-source converters were originally evolved from the need for reducing
the harmonic content in the converter output voltage. Subsequently, it has been practically implemented to serve the need for realizing converters driven from high-voltage dc
bus. By using multilevel topologies, medium-voltage high-power converters can be realized without using bulky and lossy step up/down transformers or series-connected switching devices. The diode clamped [21], flying capacitor [23], and cascade converter [26],
are the most popular topologies and have been commercialized by major manufacturers.
2.2
Two-Level Converter
Two-level converter is the simplest and most commonly used topology in low-voltage
applications. In order to apply this topology to medium-voltage systems, a series connection of power switching devices is required due to their blocking voltage limitation. Thus,
a converter leg is composed by two groups of power switching devices, each consisting of
two or more devices in series, depending on the dc voltage.
Fig. 2.2 shows (a) one phase leg schematic, and (b) phase voltage of a two-level converter. The main advantages of the two-level converter are as follows:
Chapter 2 Trend of Medium-Voltage Power Converters
17
VDC
2
u
M
− VDC
2
VDC
2
∗
vuM
(Reference)
vuM
− VDC
2
(a)
(b)
Fig. 2.2: A two-level converter. (a) One phase leg schematic, and
(b) Converter phase voltage.
• Simple and proven topology
• Same converter design over supply-voltage range
• Standard fully-developed PWM control
• Provision for series redundancy of power switching devices in each phase arm.
The possible disadvantages are:
• Static and dynamic voltage sharing of series-connected power switching devices
• High dv/dt
• Poor device voltage utilization
• High switching-frequency harmonic content in converter output voltage.
To get around the limitations of the standard two-level six-pulse converter, the twolevel converters are connected together in ways which reduce their harmonic content and
combine their output power. Transformer-coupled six-pulse converters have been used to
create pseudo 12-, 18-, 24-, 36-, or 48-pulse arrangements for motor drives, STATCOMs
and battery energy storage systems [42], [56]–[59].
Chapter 2 Trend of Medium-Voltage Power Converters
2.3
18
Multilevel Converters
Early interest in multilevel converters was triggered by the introduction of so-called
neutral-point clamped inverter by Nabae et al. [21] in 1981. Since then, numerous topologies have been introduced and widely studied [23], [60]–[67]. The multilevel converters
attempt to address the limitations of the standard two-level converter. Their key properties are:
• Harmonics decrease as the number of levels increases
• Increasing output voltage and power does not require an increase in rating of
individual devices
• Reduced dv/dt and common-mode voltage.
2.3.1
Diode-Clamped Converter
The diode-clamped topology was first proposed in the early 1980s [21], [43] as a threelevel neutral-point clamped inverter. It has been shown that the resultant three-level
PWM waveform has considerably better spectral performance compared to that of a
VDC
2
Q4
Q3
VDC
4
Q2
∗
vuM
(Reference)
VDC
2
Q1
u
M
Q04
VDC
4
vuM
0
Q03
− VDC
4
Q02
Q01
− VDC
2
− VDC
4
− VDC
2
(a)
(b)
Fig. 2.3: A five-level diode-clamped converter. (a) One phase leg
schematic, and (b) Converter phase voltage.
Chapter 2 Trend of Medium-Voltage Power Converters
19
Table 2.1: Voltage levels and corresponding switching states of a
five-level diode-clamped converter
Voltage
vuM
Switch state
Q4
Q3
Q2
Q1
Q04
Q03
Q02
Q01
VDC /2
1
1
1
1
0
0
0
0
VDC /4
0
1
1
1
1
0
0
0
0
0
0
1
1
1
1
0
0
−VDC /4
0
0
0
1
1
1
1
0
−VDC /2
0
0
0
0
1
1
1
1
conventional PWM voltage-source inverter. Subsequently, the original NPC topology
has been extended to higher number of levels [68].
Since the diode-clamped topology offers a simple solution to extend voltage and power
ratings, it is of particular interest for medium-voltage applications, and has been introduced to the market by leading manufacturers [69].
Fig 2.3 shows (a) one phase leg schematic and (b) phase voltage of a five-level diodeclamped converter. The dc link consists of four capacitors. For a dc-link voltage of
VDC , the voltage across each capacitor is VDC /4, and each device stress is limited to one
capacitor voltage, VDC /4, through clamping diodes. The clamping diodes distinguish
this circuit from the conventional two-level converter.
Table 2.1 lists the five levels (VDC /2, VDC /4, 0, −VDC /4, and −VDC /2) of converter
voltage vuM and their corresponding switch states. State condition 1 means the switch
is on, and 0 means it is off. Note that there exists four complementary switch pairs
(Q1 , Q01 ), (Q2 , Q02 ), (Q3 , Q03 ), and (Q4 , Q04 ) such that turning on one of the switches of
the pair requires that the other complementary switch be turned off.
The major drawbacks of the diode-clamped voltage-source converters are the requirement of clamping diodes, the lack of modularity, the unequal semiconductor-loss distribution [70], and the voltage balancing problem.
Chapter 2 Trend of Medium-Voltage Power Converters
20
VDC
2
Q4
Q3
VDC
4
Q2
∗
vuM
(Reference)
VDC
2
Q1
u
M
Q01
VDC
4
vuM
0
Q02
− VDC
4
Q03
Q04
− VDC
2
− VDC
4
− VDC
2
(a)
(b)
Fig. 2.4: A five-level flying-capacitor converter. (a) One phase leg
schematic, and (b) Converter phase voltage.
2.3.2
Flying-Capacitor Converter
Meynard et al. [23] proposed a multilevel structure, known as flying-capacitor converter, where the device off-state voltage clamping was achieved by using clamping capacitors rather than clamping diodes.
Fig. 2.4 shows (a) one phase leg schematic and (b) phase voltage of a five-level
flying-capacitor converter. Table 2.2 lists all the possible combinations of five levels
(VDC /2, VDC /4, 0, −VDC /4, and −VDC /2) of converter voltage vuM and the corresponding switch states. The voltage synthesis in the flying capacitor converter has more
flexibility than that in the diode-clamped converter. The converter’s major problem is
the additional expense of flying capacitors, particularly at low and medium switching
frequencies.
2.3.3
Cascade Converter
The concept of cascade converters has existed for more than three decades [26]. However, it was in the mid-1990s that they grabbed the attention of power electronics research
scientists and engineers. In 1997, two major patents [24], [25] were filed that indicated
Chapter 2 Trend of Medium-Voltage Power Converters
21
Table 2.2: Possible combinations of voltage levels and corresponding switching states of a five-level flying-capacitor converter
Voltage
vuM
Switch state
Q4
Q3
Q2
Q1
Q01
Q02
Q03
Q04
1
1
1
1
0
0
0
0
VDC /4 = VDC /2 − VDC /4
1
1
1
0
1
0
0
0
VDC /4 = 3VDC /4 − VDC /2
0
1
1
1
0
0
0
1
VDC /4 = VDC /2 − 3VDC /4 + VDC /2
1
0
1
1
0
0
1
0
0 = VDC /2 − VDC /2
1
1
0
0
1
1
0
0
0 = VDC /2 − VDC /2
0
0
1
1
0
0
1
1
0 = VDC /2 − 3VDC /4 + VDC /2 − VDC /4
1
0
1
0
1
0
1
0
0 = VDC /2 − 3VDC /4 + VDC /4
1
0
0
1
0
1
1
0
0 = 3VDC /4 − VDC /2 + VDC /4 − VDC /2
0
1
0
1
0
1
0
1
0 = 3VDC /4 − VDC /4 − VDC /2
0
1
1
0
1
0
0
1
−VDC /4 = VDC /2 − 3VDC /4
1
0
0
0
1
1
1
0
−VDC /4 = VDC /4 − VDC /2
0
0
0
1
0
1
1
1
−VDC /4 = VDC /2 − VDC /4 − VDC /2
0
0
1
0
1
0
1
1
0
0
0
0
1
1
1
1
VDC /2
(No redundancy)
(2 redundancies)
(5 redundancies)
(2 redundancies)
−VDC /2
(No redundancy)
the advent of the cascade converters for motor drives and utility applications.
The cascade converter is composed by a series connection of single-phase H-bridge
converter cells. Each converter cell can generate three voltage levels, +VDC , 0, and
−VDC . The output voltage is synthesized by the sum of the converter-cell voltages, i.e.,
vuM = vu1 + vu2 · · · + vuN , where N is the number of converter cells in the phase, also
called the cascade number.
Chapter 2 Trend of Medium-Voltage Power Converters
Q11
u
Q12
vu1 6
VDC
Q011
Q012
Q21
Q22
∗
vuM
(Reference)
2VDC
VDC
Q021
Q022
vuM
0
VDC
vu2 6
M
−VDC
−2VDC
(b)
(a)
Fig.
2.5:
22
A five-level cascade converter.
(a) One phase leg
schematic, and (b) Converter phase voltage.
Fig. 2.5 shows (a) one phase leg schematic and (b) phase voltage of a five-level cascade
converter. Table 2.3 lists all the possible combinations of five levels (2VDC , VDC , 0, −VDC ,
and −2VDC ) of converter voltage vuM and the corresponding switch states.
2.3.4
Comparison of Multilevel Converters
Table 2.4 compares the power component requirements per phase leg among the three
multilevel converters mentioned above. The comparison assumes the same voltage rating
for all devices, but not necessarily the same current rating. It also assumes that the
cascade converter uses a full bridge in each level as compared to the half-bridge version
used in the diode-clamped and flying-capacitor converters. It is seen that the cascade
converter requires the least number of components.
Chapter 2 Trend of Medium-Voltage Power Converters
23
Table 2.3: Possible combinations of voltage levels and corresponding switching states of a five-level cascade converter
Voltage
vuM
Q11
Q12
vu1
Q21
Q22
vu2
2VDC (No redundancy)
1
0
VDC
1
0
VDC
VDC (3 redundancies)
1
0
VDC
0
0
0
1
0
VDC
1
1
0
0
0
0
1
0
VDC
1
1
0
1
0
VDC
0
0
0
0
0
0
0
0
0
1
1
0
1
1
0
0
0
0
1
1
0
1
1
0
1
0
VDC
0
1
−VDC
0
1
−VDC
1
0
VDC
0
1
−VDC
1
1
0
0
1
−VDC
0
0
0
0
0
0
0
1
−VDC
1
1
0
0
1
−VDC
0
1
−VDC
0
1
−VDC
0 (5 redundancies)
−VDC (3 redundancies)
−2VDC (No redundancy)
2.4
2.4.1
Switch state
Emerging Multilevel Converters
Hybrid/Asymmetrical Converters
■ Asymmetrical Cascade Converter
Cascade converter having N identical dc
voltage sources per phase can offer 2N + 1 distinct voltage levels at the phase output.
It has been shown that the performance attributes of the output waveforms in terms of
number of levels can be further enhanced by using unequal dc voltage levels [61]–[65].
Manjrekar et al. [61] reported that it is possible to achieve 2N +1 − 1 distinct voltage
levels with dc voltage levels varying in binary fashion (V, 2V, 4V, · · · 2N −1 V ). Based
Chapter 2 Trend of Medium-Voltage Power Converters
24
Table 2.4: Comparison of power component requirements per phase
leg among three m-level converters
Converter type
Diode clamped
Flying capacitor
Cascade
Main switching devices
2 (m − 1)
2 (m − 1)
2 (m − 1)
Main diodes
2 (m − 1)
2 (m − 1)
2 (m − 1)
(m − 1)(m − 2)
0
(m − 1)
(m − 1)
0
1
(m − 1)(m − 2)
2
0
1
(m − 1)
2
0
Clamping diodes
DC capacitors
Balancing capacitors
M
2vDC
vDC
Fig. 2.6: A seven-level asymmetrical cascade converter.
on this approach, the authors have proposed a seven-level 4.5-kV 500-hp motor drive
shown in Fig. 2.6. The topology is a combination of a GTO converter cell with 3kV bus and an IGBT converter with 1.5-kV bus. In addition, the authors have used
hybrid modulation strategy in which the GTO converter is modulated to switch only at
fundamental frequency while the IGBT converter uses PWM.
The asymmetrical cascade converters reduce the size and cost of the converters, and
improve reliability, because fewer semiconductors and capacitors are used. An additional
advantage is that the converter can be controlled appropriately to reduce the switching
losses. The major drawback is the fact that the modularity of converter is lost.
Chapter 2 Trend of Medium-Voltage Power Converters
25
M
(a)
4VDC
Converter output
0
3VDC
NPC converter output
VDC
0
H
Y
H
H-bridge output
(b)
Fig. 2.7: Nine-level hybrid asymmetrical converter consisting of a
three-phase NPC converter, with a three-level H-bridge in series
with each phase. (a) Main circuit, and (b) Converter voltages.
■ Other Hybrid/Asymmetric Converters
Steimer et al. [71] presented a nine-
level hybrid asymmetrical converter for medium-voltage motor drives that consists of a
three-phase IGCT NPC converter (main converter), with a three-level IGBT H-bridge
(sub-converter) in series with each phase. Fig. 2.7 shows (a) the circuit diagram and (b)
Chapter 2 Trend of Medium-Voltage Power Converters
vDC
vDC
26
u
M
Fig. 2.8: A nine-level converter using a five-level full-bridge diodeclamped converter as the H-bridge in the cascade converter.
the corresponding output voltage as well as main-converter and sub-converter voltages.
To obtain a maximum of output voltage levels, the ratio of capacitor voltage of the main
converter and that of the sub-converter is three. Veenstra el al. [72] presented a control
method to stabilize the capacitor voltages of the non-supplied H-bridge sub converters
in Fig. 2.7(a).
For high-voltage high-power applications, it is possible to adopt multilevel diodeclamped or flying-capacitor converters to replace the full-bridge cell in the cascade converter [73]. Fig. 2.8 shows a nine-level converter using five-level full-bridge diode-clamped
converter cell as the building block of the cascade converter.
2.4.2
Modular Multilevel Converters
Fig. 2.9(a) shows a basic circuit configuration of a three-phase modular multilevel
converter (MMC) [74], [75]. Each phase leg consists of two stacks of multiple bidirectional
chopper cells and two non-coupled buffer inductors. Fig. 2.9 (b) shows the chopper cell.
The MMC is suitable for medium-/high-voltage high-power applications.
Chapter 2 Trend of Medium-Voltage Power Converters
Cell
u1
Cell
v1
Cell
w1
Cell
uN
Cell
vN
Cell
wN
27
Common
dc link
Cell
uN +1
Cell
vN +1
Cell
wN +1
Cell
u2N
Cell
v2N
Cell
w2N
(a)
(b)
Fig. 2.9: Modular multilevel converter. (a) Main circuit, and (b)
Chopper cell.
2.4.3
Multilevel Converters With Multiple Three-Phase Converters
Multiple low-power three-phase converters have been used in utility applications through
multipulse converter configurations. These converters achieve multilevel voltage output
through phase shifting of multiple two-level waveforms which are added together vectorially using series-connected transformer windings [56], [57], [76]. The approach, however,
becomes difficult as the number of levels increases due to the requirement of increased
number of multiple transformer windings.
Fig. 2.10(a) shows an alternative approach of combining three three-phase converters
to obtain a multilevel output [77]. The phase shifting is realized by using an output
transformer. Fig. 2.10(b) shows the vector diagram representing the complete converter
system. Each three-phase inverter generating balanced three-phase output voltages is
represented by a delta. For example, u1 , v1 , and w1 in Fig. 2.10(b) represent the inverter 1
in Fig. 2.10(a). Three transformers of 1:1 turn ratio are connected to the inverter output.
Chapter 2 Trend of Medium-Voltage Power Converters
Inv. 1 u
1
− 20◦
6
28
K
v1
w1
6
U
0◦
Inv. 2 u
2
1
v2
L
V
w2
W
6
3
Inv. 3 u
3
+ 20◦
M
2
v3
w3
M
(a)
K
w1
u1
Inv. 1
v1
u3
u2
w3
M
Inv. 3
Inv. 2
v3
w2
v2
L
(b)
Fig. 2.10: Multilevel converter using three standard three-phase
converter cells along with an output transformer. (a) System configuration, and (b) Vector diagram of the system with the fundamental voltages.
The purpose of the output transformer is to generate the vectors w1 u3 , v3 w2 , and u2 v1
from inverter output voltage vectors u2 w2 , w1 v1 , and v3 u3 , respectively. The output
transformer, therefore, increases the output voltage and also eliminates any circulating
current within the loop by ensuring that the addition of voltage vectors w1 v1 , v1 u2 , u2 w2 ,
w2 v3 , v3 u3 , and u3 w1 is zero at any switching instant.
Chapter 2 Trend of Medium-Voltage Power Converters
29
Multilevel
modulation
Fundamental
switching frequency
Space
vector
control
Selective
harmonic
elimination
High
switching frequency
Space
vector
PWM
Sinusoidal
PWM
Fig. 2.11: Classification of multilevel modulation methods.
2.4.4
Soft-Switched Multilevel Converters
There are numerous ways of implementing soft-switching methods to reduce the switching loss and increase efficiency of different multilevel converters [78]–[81].
For the cascade converter, because each converter cell is a two-level circuit, the implementation of soft switching is not at all different from that of conventional two-level
converters.
For flying capacitor and diode-clamped converters, the choices of soft-switching circuit
can be found with different circuit combinations. Most literatures proposed zero-voltageswitching types including auxiliary resonant commutated pole, coupled inductor with
zero-voltage transition, and their combinations.
2.5
Modulation Methods
The modulation methods in multilevel converters can be classified into two major categories according to the switching frequency, as shown in Fig. 2.11 [82], [83]. The method
with the highest industrial application is the classical carrier-based sinusoidal PWM with
triangular carriers. Another popular method is the space vector PWM. Methods with
low switching frequency include selective harmonic elimination [54], [73], [84] and space
vector control introduced in [82].
Chapter 2 Trend of Medium-Voltage Power Converters
2.5.1
30
Sinusoidal Pulsewidth Modulation
Sinusoidal pulsewidth modulation (SPWM) (also referred to as subharmonic PWM)
techniques are the most popular modulation methods in industrial applications and have
been reviewed extensively. This method involves a comparison of a reference input, which
is basically a sinusoidal waveform, against a triangular carrier waveform and detection
of crossover instances to determine switching events.
Several techniques have been developed based on the classical SPWM with triangular
carriers. Some use carrier disposition and the others use phase shifting of multiple carrier
signals [85]–[89].
Most carrier-based PWM methods for diode-clamped converters derive from the carrier
disposition strategy presented by Carrara et al. [85]. For an m-level diode-clamped
converter, this method arranges m − 1 triangular carriers with the same frequency and
amplitude so that they fully occupy contiguous bands over the range +VDC /2 to −VDC /2.
A single reference is then compared with each carrier to determine the switched output
voltages for the converter.
Three alternative carrier disposition PWM methods are commonly used, namely
• Alternative phase opposition disposition (APOD), where each carrier is phase
shifted by 180◦ out of phase with those below the zero point;
• Phase opposition disposition (POD), where the carriers above the sinusoidal reference zero point are 180◦ out of phase with those below the zero point;
• Phase disposition (PD), where all the carriers are in phase.
Fig. 2.12 illustrates the carrier and reference waveforms for PD modulation of a five-level
diode-clamped converter. The PD modulation has been well accepted as achieving the
lowest line-to-line harmonic voltage distortion.
For the cascade converter, the phase-shifted carrier PWM is the most common method
[88], with an improved harmonic performance being achieved when each single-phase
converter cell is controlled using three-level modulation [89]. Using this method, the
sinusoidal reference waveforms for the two phase legs of each converter cell are phase
shifted by 180◦ , while each converter-cell’s carrier is phase-shifted by 180◦ /N , where N
Chapter 2 Trend of Medium-Voltage Power Converters
31
∗
Reference vuM
VDC
2
Triangular carriers
Q4
VDC
4
Q3
Q2
Q1
u
M
VDC
2
Q04
Q03
Q02
−
VDC
4
−
VDC
2
Q01
(a)
Fig.
0
−
vuM
VDC
2
(b)
2.12: Phase-disposition modulation for a five-level diode-
clamped converter. (a) One phase leg schematic of the converter,
and (b) Phase-disposition modulation.
∗
Reference vun
Triangular carriers
u
vu1 6
VDC
2VDC
M
vu2 6
VDC
0
vuM
−2VDC
(a)
(b)
Fig. 2.13: Phase-shifted sinusoidal PWM for a five-level cascade
converter.
(a) One phase leg schematic of the converter, and
(b) Phase-shifted sinusoidal PWM.
is the cascade number. This method leads to cancelation of all carrier and associated
sideband harmonics up to the 2N -th carrier group. Fig. 2.13 illustrates the carrier and
reference waveforms for one phase leg of a five-level cascade converter.
Chapter 2 Trend of Medium-Voltage Power Converters
32
β
v
Vj+2
V∗
Vj Vj+1
u, α
w
Fig. 2.14: Space vector diagram for a five-level converter.
2.5.2
Space Vector PWM
Space vector modulation (SVM) has been extended to multilevel converters [83], [90],
[91]. The SVM identifies each switching state of a multilevel converter as a point in
complex (α, β) plane. Fig. 2.14 shows space vectors of a five-level converter. The voltage
reference vector rotating in the (α, β) plane at the fundamental frequency is sampled
within each switching period, and it is synthesized by selecting the nearest three vectors
(V̇j , V̇j+1 , V̇j+2 ) with corresponding duty cycles (dj , dj+1 , dj+2 ) computed to achieve the
same volt-second average as the sampled reference vector.
V̇ ∗ = dj V̇j + dj+1 V̇j+1 + dj+2 V̇j+2 ,
(2.1)
where dj + dj+1 + dj+2 = 1.
(2.2)
Space-vector PWM provides good utilization of dc voltage, low ripple current, and
relatively easy hardware implementation. However, as the number of level increases,
redundant switching states and the complexity of selecting switching states increase
dramatically. Celanovic et al. [83] have introduced a computationally efficient SVM
algorithm for a general m-level converter.
Chapter 2 Trend of Medium-Voltage Power Converters
33
v
···
N VDC
2VDC
VDC
2π
θ1 θ2 · · ·
π
θN 2
π
3π
2
t
Fig. 2.15: Generalized stepped-voltage waveform.
2.5.3
Selective Harmonic Elimination
Harmonic elimination methods are based on harmonic elimination theory developed
by Patel et al. [92], [93].
Fig. 2.15 shows a generalized quarter-wave symmetric stepped-voltage waveform synthesized by a (2N + 1)-level converter, where N is the number of switching angles. The
Fourier series expansion of the waveform is given by
v(ωt) =
∞
4VDC X 1
{cos(kθ1 ) + cos(kθ2 ) + · · · + cos(kθN )} sin(kωt),
π k=1 k
(2.3)
where k is uneven, and 0 ≤ θ1 < θ2 < · · · θN ≤ π/2.
To minimize harmonic distortion and to achieve adjustable amplitude of the fundamental component, up to N −1 harmonic contents can be removed from the voltage waveform.
In general, the most significant low-frequency harmonics are chosen for elimination by
properly selecting switching angles and the high-frequency harmonic components can be
readily removed by using additional filter circuits.
2.5.4
Space Vector Control
Rodriguez et al. [82] introduced a space-vector control for multilevel converters that
works with low switching frequencies. The control method does not generate the mean
value of the desired load voltage in every switching interval, which is the principle of
space-vector modulation. The main idea is to select a voltage vector that minimizes the
distance to the reference vector.
Chapter 2 Trend of Medium-Voltage Power Converters
vc
Reference
Output
β axis
β axis
v
∗
34
α axis
(a)
α axis
(b)
Fig. 2.16: Space vector control of an 11-level converter. (a) Load
voltage space vectors generated by the converter, and (b) Reference
and output voltage vectors.
Fig. 2.16(a) shows the 311 different space vectors generated by an 11-level converter.
The shaded hexagon shows the boundary of highest proximity, which means that when
the reference voltage v ∗ is located in this area, vector vc must be selected. The high density of vectors produced by the 11-level converter generates only small errors in relation
to the reference vector. Fig. 2.16(b) shows the reference vector and the vectors generated
by the converter using space vector control.
This method is simple and attractive for high number of levels. As the number of
levels decreases, the error in terms of the generated vectors with respect to the reference
will be higher, resulting in an increase of the load current ripple.
2.6
2.6.1
Applications of Multilevel Converters
Medium-Voltage Motor Drives
■ With Non-Regenerative Front Ends
Multilevel inverters have been widely used
in medium-voltage motor-drive applications such as fans, pumps, blowers, compressors
and conveyers [59], [94]–[97]. Multipulse rectifiers, as shown in Fig. 2.17, are generally
used as front ends in these applications requiring no regenerative braking [98].
Chapter 2 Trend of Medium-Voltage Power Converters
Utility
grid
0◦
iS
−
?
+
Utility
grid
+
iS
35
0◦
−20◦
?
+
−40◦
+30◦
−
+
−
+
−
−
iS
iS
(a)
Fig.
(b)
2.17: Power circuits and line currents of multipulse diode
rectifiers. (a) 12-pulse, and (b) 18-pulse.
+
0
−
M
Fig. 2.18: A typical medium-voltage motor drive based on an NPC
inverter with 12-pulse diode rectifier.
Fig. 2.18 shows a typical example of a medium-voltage motor drive based on a neutralclamped inverter with 12-pulse diode rectifier as a front end. Fig. 2.19 shows another
Chapter 2 Trend of Medium-Voltage Power Converters
36
Cell u1
◦
0
Cell
v1
Cell
w1
Cell
v2
Cell
w2
Cell
vN
Cell
wN
◦
+ 60
N
Cell u2
+ (k−1)60
N
◦
Cell uN
M
Fig. 2.19: A medium-voltage motor drive based on a cascade PWM
inverter with non-regenerative frond end [46].
medium-voltage motor drive based on a cascade PWM converter with non-regenerative
front end [46].
However, large phase-shifting transformers in the multipulse rectifiers, which are meant
for the reduction of harmonics in the line current, are bulky and costly. Today the trend
is towards the use of rectifiers based on multilevel topologies [97], [99].
■ With Regenerative Front Ends
Several industrial applications can generate en-
ergy back from the load to the power supply. The inverter must be able to deal with this
demand. Diode-clamped inverters with active front end are used in several applications
demanding energy regeneration, like laminators, rolling mills and downhill conveyor [100].
Fig. 2.20 shows a back-to-back (BTB) configuration of three-level diode-clamped converters for a medium-voltage adjustable-speed motor drive capable of energy regeneration.
Fig. 2.21 shows the NPC-converter based motor drive for Type N700 bullet trains
in Japan [22]. The 1850-V 1.1-MW motor drive consists of a single-phase full-bridge
five-level NPC rectifier and a three-phase three-level NPC inverter.
Chapter 2 Trend of Medium-Voltage Power Converters
NPC Rectifier
37
NPC Inverter
M
Fig. 2.20: A typical medium-voltage adjustable-speed motor drive
with NPC rectifier as an active front end.
AC 25 kV, 60 Hz, 1φ
DC 2400 V
275 kW, 1850 V
110 A, 102 Hz
3000 rpm
Max. 5700 rpm
M
Transformer
4160 kVA
M
NPC Converter
NPC Converter
M
M
Fig. 2.21: A neutral-point-clamped converter based motor drive of
Type N700 bullet train in Japan [22].
The diode rectifier in the cascade-converter-based motor drive in Fig. 2.19 can be
replaced by an active front end as shown in Fig. 2.22, thus allowing power flow to be
reversed [101]. Note that the transformer used in Fig. 2.22 is a multiphase, non phaseshifted transformer because the active front end converter corrects the power factor and
eliminates the harmonics. An alternative topology in which the three-phase active front
end is replaced by a single-phase active front end has been investigated in [102].
Chapter 2 Trend of Medium-Voltage Power Converters
38
Cell u1
Cell v1
Cell w1
Cell v2
Cell w2
Cell vN
Cell wN
Cell u2
Cell uN
M
Fig. 2.22: A medium-voltage motor drive based on a cascade PWM
inverter with regenerative three-phase active frond end [101].
Table 2.5 lists medium-voltage motor drives based on multilevel converters that are
commercially available today [22], [59], [103]–[107]. For each motor drive, details are
given of the converter configuration, switching device, power rating and manufacturer.
2.6.2
Applications in Power Systems
The diode-clamped converter has been widely investigated for harmonic and reactive
compensation. References [108]–[110] investigated the diode-clamped converter for active
power filters while [111]–[113] investigated it for STATCOMs. ABB has commercialized
the NPC-VSC based STATCOM with the trade name of “SVC Light” [114]. Fig. 2.23
shows NPC-VSC-based ±80-MVA STATCOM commissioned in 2004 at the Kanzaki
substation of Kansai Electric Power Co., Inc. [115].
The multilevel cascade converter is best suited for harmonic/reactive compensation
and other utility applications [45], [47], [48]. Alstom T&D commercialized the multilevel cascade converter for STATCOM [53], which is currently being supplied by Areva
Chapter 2 Trend of Medium-Voltage Power Converters
39
Table 2.5: Commercial medium-voltage motor drives based on multilevel converters
Switching
Converter
Configuration
device
Power Rating
Manufacturer
ABB
GCT
0.3 MVA - 5 MVA
(ACS 1000) [59]
GCT
3 MVA - 27 MVA
(ACS 6000) [103]
Siemens AG
NPC
IGBT
1 MVA - 10 MVA
GCT
10 MVA - 21 MVA
(SINAMICS GM150) [104]
TM GE Automation Systems
IGBT
0.3 MVA - 5.2 MVA
(Dura-Bilt5i MV) [105]
Converteam
IGBT
up to 33 MVA
(MV7000) [106]
Siemens AG
Cascade
H-bridge
IGBT
0.3 MVA - 31 MVA
(ROBICON Perfect Harmony)
[104]
TM GE Automation Systems
IGBT
0.15 MVA - 4.8 MVA
(TMdrive-MV) [105]
Fuji Electric Systems
IGBT
0.4 MVA - 7.5 MVA
(FRENIC4600FM5) [22]
Toshiba
NPC/H-bridge
IGBT
0.4 MVA - 4.8 MVA
(TOSVERT-300MVi) [107]
TM GE Automation Systems
IGBT
8 MVA
IEGT
20 MVA
GCT
20 MVA
(TMdrive-XL Series) [105]
Chapter 2 Trend of Medium-Voltage Power Converters
GCT converter cell
40
DC 6 kV
OV-GCT
77 kV
Fig. 2.23: The ±80-MVA GCT STATCOM using NPC converters
at Kanzaki substation, Japan [115].
T&D [116].
Siemens AG has commercialized modular multilevel converters with the trade name
of “HVDC PLUS” for a wide range of power system applications including STATCOM
and unified power flow controller (UPFC) [117].
2.7
Summary
This chapter has provided an overview of medium-voltage high-power converters with
focus on multilevel voltage-source converters including diode-clamped, flying-capacitor,
and cascade converters. Emerging multilevel topologies such as hybrid/asymmetrical
converters and modular multilevel converters have been presented. Modulation strategies
have been briefly reviewed. Finally, applications of multilevel converters in industries and
power distribution systems have been discussed.
41
Chapter 3
Battery Energy Storage Systems
This chapter reviews literatures on conventional and modern battery energy storage
systems. The conventional systems are based on a combination of a multipulse converter
and a complicated zigzag transformer, while the modern systems are based on multilevel
converters. The chapter presents a basic design concept of the 6.6-kV battery energy
storage system based on a multilevel cascade PWM converter, and discusses the practical
issues to be addressed for its realization.
3.1
Conventional Systems
Significant advances in battery technologies have spurred interests in energy storage
systems based on batteries. Table 3.1 shows some major battery energy storage system
installations throughout the world [42], [58], [118]–[123]. For each system, details are
given of the location, rated capacity, battery type, principle applications and the date of
installation.
Conventionally, battery energy storage systems are based on a combination of multipulse (12-, 18-, 24-pulse and so on) converter and a complicated zigzag transformer [42],
[58]. Lead-acid batteries, which represent an established and mature technology, are the
preferred choice in most of these systems.
Fig. 3.1 shows a 12-kV, 10-MW, 40-MWh battery energy storage system that was
placed in service at Southern California Edison’s Chino 230/69/12.5-kV substation in
early 1988 [42], [120]. At the time of its installation, it was the largest battery energy
storage system in the world. It was developed as a multi-purpose (load leveling, peak
Chapter 3 Battery Energy Storage Systems
Table 3.1:
42
Major battery energy storage system installations
throughout the world
Battery Energy
Storage System
Location
Battery
Rated
Capacity
Type
Principle
Application
Year
BEWAG AG [118]
Berlin,
Germany
17 MW/
14 MWh Lead acid
Spinning reserve,
frequency control
1986
Kansai Electric
Power Co., Inc. [119]
Tatsumi,
Japan
1 MW/
4 MWh
Multipurpose
demonstration
1986
South California
Edison (SCE)
[42][120]
Chino,
CA, USA
Multipurpose
10 MW/
demonstration
40 MWh Lead acid (load leveling, etc.) 1988
Puerto Rico Electric
Power Authority
(PREPA) [121]
San Juan,
PR, USA
Spinning reserve,
20 MW/
frequency
control,
14 MWh Lead acid
voltage regulation
GNB Technologies
[58]
Vernon,
CA, USA
5 MVA/
2.5 MWh Lead acid
AK, USA
40 MW/
14 MWh
Hitachi
Automotive
8 MW/
Systems
58 MWh
Factory,
Japan
Golden Valley
Electric Association
(GVEA) [122]
Tokyo Electric
Power Co., Inc.
(TEPCO) [123]
Lead acid
1994
UPS,
peak shaving
1995
NiCd
Spinning reserve,
frequency control,
voltage regulation
2003
NaS
Load leveling
2004
shaving, etc.) demonstration project. The energy storage system was based on an 18pulse voltage-source converter using GTOs. The battery consisted of 8256 lead-acid cells
configured in eight parallel strings of 1032 cells each. The dc voltage ranged from 1750
to 2860 V. It used complicated zigzag transformers in order to synthesize a staircase
Chapter 3 Battery Energy Storage Systems
43
T11
Battery
T13
T12
T21
T21
T33
T23
T31
T22
T23
T13
T11
T21 T32 T31 T22
T12
T31
T22
T33
T33
T32
T32
T23
Fig.
3.1: The 10-MW 40-MWh battery energy storage system
based on an 18-pulse power converter in Chino, CA, USA [42].
voltage waveform.
Fig. 3.2 shows another example of a conventional battery energy storage system [58].
This 4.16-kV, 5-MVA, 2.5-MWh system was installed at the GNB Battery Recycling
Plant in Vernon, California in 1995 for uninterruptible power supply (UPS) and peak
shaving. It used lead-acid batteries with a dc-voltage range from 660 to 900 V. The
system was based on a pair of six-pulse converters, forming a 12-pulse converter, and
three 12-pulse converters were paralleled to achieve the required power rating.
The transformers used in Figs. 3.1 and 3.2 would be expensive, bulky, lossy, and prone
to failure. Modern multilevel converters such as diode-clamped, flying capacitor, and
cascade converters are preferred to traditional transformer-based multipulse converters.
Chapter 3 Battery Energy Storage Systems
Phasor diagram
N
1A
1A
1B
2C
2A
44
2B
2A
1C
N
Battery
Fig.
3.2: The 5-MVA 2.5-MWh battery energy storage system
based on a 12-pulse power converter in Vernon, CA,USA [58].
3.2
Modern Systems
Battery energy storage systems based on the neutral-point clamped converter have
been reported in literatures [122], [124], [125]. Fig. 3.3 shows a simple schematic of the
600-kW 200-kWh battery energy storage system based on the neutral-point clamped
converter [125]. It was jointly developed by ABB and Saft, and was installed at an
11-kV radial distribution network operated by EDF Energy Networks, UK. The dc link
included a number of series-connected Li-ion batteries and had a voltage of 5.8-kV. It is
the world’s first high-voltage Li-ion battery system.
The 40-MW 14-MWh battery energy storage system in Table 3.1, which was jointly developed by ABB and Saft for Golden Valley Electric Association, Alaska, used full-bridge
neutral-point clamped converter as the building block of the cascade converter [122].
Chapter 3 Battery Energy Storage Systems
45
5.8 kV
Li-ion
batteries
Fig.
3.3: The 600-kW 200-kWh battery energy storage system
based on a neutral-point clamped converter in UK.
Although cascade converter has been primarily investigated for STATCOMs and motor
drives, its unique structure is suitable for battery energy storage systems and batterybased motor drives. Tolbert et al. [54] described a cascade SCM converter using battery
units for a motor drive.
As seen in Table 3.1, lead-acid batteries are the preferred choice in conventional battery
energy storage systems. NiCd batteries rank alongside lead-acid batteries in terms of
their maturity and have achieved significant prominence in terms of their application in
the world’s largest (in terms of power) 40-MW 14-MWh battery energy storage system
at Golden Valley, Alaska, USA.
There has been interest in NaS batteries for energy storage systems with most of the
research and development work carried out jointly by TEPCO and NGK Insulators in
Japan [40], [126]. In July 2004, NGK commissioned what is claimed to be the world’s
largest (in terms of energy) 8-MW 58-MWh NaS battery energy storage system at a
Hitachi automotive plant in Japan [123].
VRB systems, while not currently on the same scale as NaS, are nevertheless sizable
including the 4-MW 6-MWh system at Tomamae wind farm in Hokkaido, Japan [127].
In recent years, much development work has been carried out on the scaling up of
NiMH and Li-ion batteries [128], [129], in an attempt to replicate the success of these
Chapter 3 Battery Energy Storage Systems
46
technologies in portable equipments. The success of NiMH batteries has been more
evident, with its use in hybrid electric vehicles (HEVs) from Toyota, Honda and Ford.
Many experts in the auto industry acknowledge that the next generation of HEVs will be
equipped with Li-ion batteries. The eventual battery choice for HEVs will have a huge
impact on stationary battery systems of many types, including battery energy storage
system for power leveling of renewable energy resources like wind power.
3.3
3.3.1
Design Concept Based on a Cascade Converter
Transformer-Based System
Fig. 3.4 shows a feasible circuit configuration of the 6.6-kV battery energy storage
based on a cascade PWM converter using NiMH battery units. Careful assignment
of a cascade number and an operating voltage range of each battery unit are of vital
importance in the system design. A transformer is used to realize the system with a
suitable cascade number and a reasonable dc voltage. Note that it is a simple step-up
transformer that is easily available from the market at reasonable cost, compared to
a multi-winding transformer in a conventional multipulse converter. One of the major
advantages of using the transformer is the electrical isolation between the grid and the
battery energy storage system. The transformer also helps in reducing the battery-unit
voltage.
The asymmetrical cascade converter, characterized by battery units with different dc
voltages in multiple H-bridge converter cells, might be attractive in reducing harmonic
voltage/current and switching power loss [64], [65]. However, the author of this dissertation prefers the symmetrical cascade converter to the asymmetrical one, because the
use of the battery units and converter cells with the same voltage, current, and capacity
ratings brings the “modularity” to the energy storage system.
Fig. 3.5 shows charge and discharge characteristics of a typical NiMH battery cell [130].
A fully-charged NiMH battery cell measures 1.4 V and supplies a nominal voltage of 1.2 V
during discharge, down to about 1.0-1.1 V. The nominal voltage of a battery unit in the
6.6-kV system may be 288 V (= 1.2 V × 240 cells). The operating voltage of the battery
Chapter 3 Battery Energy Storage Systems
47
6.6 kV, 50 Hz
6.6 kV/1.6 kV
50 Hz
LAC
Converter cell 1
Cell 2
Converter cell 1
Cell 2
Converter cell 1
Cell 2
@
I
@
NiMH
battery unit
Cell 6
Cell 6
Cell 6
Fig. 3.4: Feasible circuit configuration of the 6.6-kV transformerbased battery energy storage system based on combination of a
cascade PWM converter with a cascade number N = 6, and 18
NiMH battery units with a nominal voltage of 288 V.
unit may range from 270 V to 330 V. Note that NiMH battery units with nominal voltage
at 200-300 V have already been used in HEVs [131]. If the cascade number is N = 6, a
6.6 kV/1.6 kV transformer is required to connect the energy storage system to the 6.6-kV
grid. Li-ion battery units with the same nominal voltage as 288 V(= 3.6 V × 80 cells)
are also applicable to the system.
General-purpose IGBTs rated at 600 V and 200 A can be used as power switching
devices. The 18 converter cells are controlled by the phase-shifted unipolar sinusoidal
Chapter 3 Battery Energy Storage Systems
48
1.7
Cell voltage [V]
1.5
Charge
1.3
Discharge
1.1
0.9
0.1
0.5
0
10
20
30
40
50
60
70
80
90
100
SOC [%]
Fig. 3.5: Charge/discharge characteristic of a typical NiMH battery
cell [130].
PWM [88], [89]. Even though the PWM carrier frequency is set as low as 1 kHz, the
equivalent carrier frequency is as high as 12 kHz (= 2 × 6 cells × 1 kHz). Moreover,
setting such a low carrier frequency as 1 kHz brings a significant reduction in switching
power loss to each converter cell. The ac voltage results in a 13-level waveform in lineto-neutral and a 25-level waveform in line-to-line, thus significantly improving voltage
and current THD.
3.3.2
Transformerless System
Today, a transformer-based system seems more practical compared to the one using
no transformer. Nevertheless, the transformerless system may also be viable in the next
5-10 years, in which the cascade number and the dc-link voltage would be higher than
those in the transformer-based system. Their optimization would be required to address
communication [132] and reliability issues as well as cost and life issues of battery units.
It has been shown that battery life tends to degrade almost exponentially as the number
of series-connected cells in a battery unit increases. Although cell balancing [133]–[137]
can enhance its life, it is accompanied by an additional cost of cell-balancing hardware.
Note that this dissertation does not address cell balancing in a battery unit. It discusses
the SOC balancing among the multiple battery units in chapter 5.
Fig. 3.6 shows a feasible circuit configuration of the 6.6-kV transformerless battery
Chapter 3 Battery Energy Storage Systems
49
6.6 kV, 50 Hz
LAC
Converter cell 1
Cell 2
Converter cell 1
Cell 2
Converter cell 1
Cell 2
@
I
@
NiMH
battery unit
Cell 10
Cell 10
Cell 10
Fig. 3.6: Feasible circuit configuration of the 6.6-kV transformerless
battery energy storage system based on combination of a cascade
PWM converter with a cascade number N = 10, and 30 NiMH
battery units with a nominal voltage of 660 V.
energy storage system based on a combination of a three-phase cascade PWM converter
with a cascade number N = 10 and 30 NiMH battery units. The nominal voltage of a
battery unit is 660 V (= 1.2 V × 550 cells). The operating voltage of the battery unit
may range from 605 V to 770 V. With nominal cell voltage at 3.6 V, Li-ion battery
unit can reach the same dc voltage with relatively lower number of battery cells in series
and therefore, may be more suitable for the 6.6-kV transformerless system. Generalpurpose IGBTs rated at 1.2-kV and 200-A may be used as power switching devices.
Chapter 3 Battery Energy Storage Systems
50
Using phase-shifted unipolar sinusoidal PWM with a carrier frequency of 1 kHz, the
equivalent carrier frequency would be 20 kHz and the ac voltage results in a 21-level
waveform in line-to-neutral.
The major advantage of the transformerless system over the transformer-based one
may be elimination of bulky and heavy line-frequency transformer. This, however, is
at the cost of losing electrical isolation. Energy densities of the latest batteries are so
high that the consequences of failure can be very dangerous. Adequate measures should
be taken to isolate the battery system from the grid in the event of a grounding fault.
Further research and development especially in the field of batteries would be needed in
order to realize the transformerless system.
3.4
Practical Issues for the 6.6-kV System
Although the cost and the life issues of battery units are the major hurdles at present,
several issues need to be addressed for the realization of the 6.6-kV battery energy storage
system based on a multilevel cascade converter.
■ SOC Balancing of Battery Units
Due to asymmetric battery units, unequal
converter-cell losses, and so on, SOC imbalance may occur among multiple battery units
in a battery energy storage system based on a cascade converter. This may result in
the reduction of total available capacity of the battery units, and may also cause overcharge/overdischarge of a particular battery unit. An SOC balancing control is indispensable for effective utilization of battery energy and stable operation of the system.
■ Fault Tolerance
Medium-voltage battery energy storage system is a high-power
equipment. When it fails, the downtime can be very expensive. Besides, the cascadeconverter-based structure employs a large number of power switching devices, which
increases the chances of failure. Therefore, reliability is a major issue. Fault tolerance is
desirable to maintain continuous operation during a converter-cell or battery-unit failure,
thus improving the reliability and availability of the system.
Chapter 3 Battery Energy Storage Systems
■ Active-Power Control of Individual Converter Cells
51
The active-power control
of individual converter cells is desirable for maximum utilization of battery energy when
power-handling capacities of battery units differ. The differences in the power-handling
capacities may be due to production tolerances and operating conditions or due to the
replacement of one or more battery units by the new ones.
■ Ride-Through Capability of Asymmetrical Power System Failures
This
is highly desirable in all medium-voltage high-power equipments. The multilevel cascade PWM converter based battery energy storage system can produce compensating
negative-sequence voltage in response to the system voltage imbalance caused by asymmetrical power system failures such as single-line-to-ground (SLG) fault, thereby suppressing the negative-sequence current.
■ Startup Method
A simple start up method without using external circuit is de-
sirable.
■ Cell Balancing
Cell balancing in a battery unit is an important issue to be con-
sidered. Manufacturing tolerances and operating conditions cause small differences between cells in a multi-cell battery unit. These differences tend to be magnified with each
charge/discharge cycle. For example, weaker cells become over-stressed during charging
causing them to become even weaker, until they eventually fail causing premature failure of the battery unit. Cell balancing is a method of compensating for weaker cells by
equalizing the charge on all the cells in the battery unit and thus extending battery life.
Cell balancing becomes more serious when the number of cells in a battery unit is higher,
which is the case in the 6.6-kV system, especially in the transformerless system.
■ Optimization Between Cascade Number and DC Voltage
Cascade number
affects communication and reliability issues while dc voltage affects cost and life issues
of battery units. Therefore, as discussed in section 3.3, optimization between cascade
number and dc voltage level would be a very important part of the design. The author
has suggested a cascade number of six and ten for a transformer-based system and a
transformerless one, respectively.
Chapter 3 Battery Energy Storage Systems
52
■ Safety Safety should be another major design consideration. Energy densities of
batteries are so high that the consequences of failure can be very dangerous. Electrical isolation from the grid would be desirable in many cases. The advantage of the
transformer-based system is that its 50-Hz transformer provides electrical isolation in addition to stepping down the grid voltage. In the case of transformerless system, enough
measures should be taken to isolate the battery system from the grid in the event of a
grounding fault.
The dissertation deals with the SOC balancing in chapter 5, the fault tolerance in
chapter 6, and the active-power control of individual converter cells in chapter 7.
3.5
Summary
This chapter has provided a review of some major battery energy storage system installations throughout the world. The chapter has discussed the drawbacks of conventional
systems and presented the 6.6-kV design concepts based on a multilevel cascade PWM
converter, both with and without a line-frequency transformer. It has also discussed in
brief the practical issues to be addressed for the realization of the 6.6-kV system.
53
Chapter 4
The 200-V, 10-kW, 3.6-KWh
Experimental System
This chapter describes a downscaled 200-V, 10-kW, 3.6-kWh experimental battery
energy storage system based on a combination of a three-phase multilevel cascade PWM
converter and NiMH battery units. It discusses the system configuration and gives an
overview of the control system including sampling method.
4.1
System Configuration
Fig. 4.1 shows the system configuration of an experimental battery energy storage
system based on a three-phase cascade PWM converter. It is rated at 200 V, 10 kW and
3.6 kWh. Table 4.1 summarizes the circuit parameters.
The system is star-configured and has a cascade number N = 3. Each of the nine
converter cells is equipped with a NiMH battery unit at its dc side. Each battery unit,
consisting of series connection of 60 battery cells, is rated at 72 V and 5.5 Ah. The dc
voltage ranges from 66 to 84 V and the total rated energy capacity is 13 MJ or 3.6 kWh
(= 72 V × 5.5 Ah × 9).
Fig. 4.2 shows the control system of the 200-V system. This is based on a fullydigital controller using a DSP and multiple FPGAs. Each battery unit is equipped with
a battery management system (BMS) that provides the functions of monitoring and
controlling the respective battery unit to protect it against abnormal conditions. The
BMS also provides the function of SOC estimation [138], the detail of which is beyond
Chapter 4 The 200-V, 10-kW, 3.6-KWh Experimental System
200 V
50 Hz
vS
R1
iu
54
-
iv -
O
iw LS
CB1
MC1
LAC
The u-phase cluster
CB2
6
C
-
vDCu1
iDCu2
-
6
6
Cell 2
C
vwM
MC2
R2
vu2
vvM
iDCu1
vDCu2
R2
The w-phase cluster
6
vu1
R2
The v-phase cluster
vuM
iDCu3
-
6
vu3
Cell 3
C
6
vDCu3
M
Fig. 4.1: Experimental system configuration of the 200-V, 10-kW,
3.6-kWh down-scaled battery energy storage system based on combination of a three-phase cascade PWM converter with a cascade
number N = 3, and nine NiMH battery units with a nominal voltage
of 72 V.
the scope of this dissertation.
The nine H-bridge converter cells are controlled by phase-shifted unipolar sinusoidal
PWM with a carrier frequency of 800 Hz. The resulting line-to-neutral voltage is a sevenlevel waveform with an equivalent carrier frequency of 4.8 kHz (= 2 × 3 cells × 800 Hz).
Chapter 4 The 200-V, 10-kW, 3.6-KWh Experimental System
55
Table 4.1: Circuit parameters of the experimental battery energy
storage system
Nominal line-to-line rms voltage
VS
200 V
Power rating
P
10 kW
Cascade number
N
3
AC inductor
Background system inductance
Starting Resistors
LAC
1.2 mH (10%)
LS
48 µH (0.4%)
R1 , R 2
Nominal DC voltage
VDC
10 Ω, 20 Ω
72 V
DC capacitor
C
16.4 mF
Unit capacitance constant
H
38 ms at 72 V
NiMH battery unit
72 V, 5.5 Ah × 9
PWM carrier frequency
800 Hz
Equivalent carrier frequency
4.8 kHz
on a three-phase, 200-V, 10-kW, 50-Hz base
An ac indcutor LAC (= 10%) in each phase supports the difference between the ac
grid voltage and the seven-level PWM voltage. It also helps in filtering out switching
voltage/current ripples caused by PWM.
Fig. 4.3 shows the snapshots of the cascade converter used in the experiment, where
(a) shows the front view and (b) shows the rear view.
The experimental system requires no external startup circuit. Fig. 4.1 includes a simple
startup circuit consisting of two sub-circuits:
• ac startup circuit consisting of the three-phase circuit breaker CB1, the threephase magnetic contactor MC1, and the current-limiting resistor R1 in each phase,
and
• dc startup circuit consisting of the circuit breaker CB2, the magnetic contactor
MC2, and the current limiting resistor R2 in each converter cell.
Chapter 4 The 200-V, 10-kW, 3.6-KWh Experimental System
LAC
i
DCCTs
200 V
50 Hz
PT
BMS
BMS
BMS
2
3
PLL
3
36
PWM
(FPGAs)
A/D
6
Fiber optics
LS vS
Nine
converter cells
SOC,
Temp.,
etc
56
v∗
FPGA
18
Control
(DSP)
p∗
Fig. 4.2: Control system for the battery energy storage system.
The startup procedure is based on the method presented in [88] for a cascade-converterbased STATCOM. It is explained in chapter 5.
4.2
Overview of the Control System
Fig. 4.4 shows the control block diagram of the battery energy storage system. The
whole control system is divided into the following three sub-controls:
1. active-power control
2. SOC-balancing control
3. fault-tolerant control.
The active-power control is based on decoupled current control, which is the same in
control method and parameters as that presented in [139]. The SOC-balancing control
is divided into;
• clustered SOC-balancing control, and
Chapter 4 The 200-V, 10-kW, 3.6-KWh Experimental System
57
• individual SOC-balancing control.
The aim of the clustered SOC-balancing control is to keep the mean SOC value of a
cluster or phase equal to the mean SOC value of the three clusters. This means,

 

∆SOCu
SOC − SOCu
 ∆SOCv  =  SOC − SOCv  ≈ 0,
SOC − SOCw
∆SOCw
(4.1)
where
1
SOC = (SOCu + SOCv + SOCw )
3
(4.2)




SOCu
SOCu1 + SOCu2 + SOCu3
 SOCv  = 1  SOCv1 + SOCv2 + SOCv3  .
3
SOCw1 + SOCw2 + SOCw3
SOCw
(4.3)
Similarly, the aim of the individual SOC-balancing control is to keep each of the three
SOC values in a cluster equal to the mean SOC value of the corresponding cluster. That
OV/OC
Hall-effect
voltage sensors
Gate drives
DSP/FPGA
boards
AC inductors
(a)
(b)
Fig. 4.3: Snapshot of the cascade converter. (a) Front view, and
(b) Rear view.
Chapter 4 The 200-V, 10-kW, 3.6-KWh Experimental System
9
SOCu1 , SOCu2 , · · · , SOCw3
Individual
SOC-balancing
control
(Fig. 5.8)
Averaging SOCu , SOCv , SOCw
Eq. (4.3)
58
3
Averaging
p∗
q∗
vSuO
vSvO
vSwO
iu
iv
iw
v0∗
1
N
∗
0
00
vuM
vun
Fault- vun
Active∗
0
00
vvM
1 vvn tolerant vvn
power
∗
0
control v 00
N vwn
control vwM
wn
(Fig. 6.6)
(Fig. 5.1)
vBwn
Clustered
SOC-balancing
control
(Fig. 5.4)
vBvn
SOC
id
iq
vBun
Eq. (4.2)
∗
vun
∗
vvn
∗
vwn
(n = 1, 2, and 3)
Fig. 4.4: Control block diagram for the 200-V system with a cascade
number N = 3.
means, taking u-phase as an example,
∆SOCun = SOCu − SOCun ≈ 0.
(4.4)
Both the clustered and individual balancing controls are based on feedback control.
The fault-tolerant control is based on feedforward control and achieves the following
two functions during a converter-cell or battery-unit fault;
• one is to maintain continuous operation at the rated voltage and power, producing
a three-phase balanced line-to-line ac voltage, and
• the other is to achieve SOC balancing of the remaining 3N − 1 healthy battery
units.
The active-power control and the SOC-balancing control are described in detail in chapter 5, while chapter 6 explains the fault-tolerant control.
Chapter 4 The 200-V, 10-kW, 3.6-KWh Experimental System
59
Sampling for converter cell 1
Reference renewal for converter cell 1
Voltage reference
Carrier signal
? ?
?
?
Converter
cell 1
0
Converter
cell 2
0
Converter
cell 3
0
-
208.3 µs
Fig. 4.5: Sampling method showing three phase-shifted carriers
and three reference signals for a cluster of three converter cells of
one phase.
Besides, the dissertation presents an active-power control of individual converter cells
(not shown in Fig. 4.4) in chapter 7. It is different from the active-power control mentioned above because it regulates the power of each converter cell. The allows the 3N
battery units in the cascade converter to operate at different power levels. This is particularly advantageous when the power-handling capacities of the 3N battery units differ.
4.3
Sampling Method
Fig. 4.5 illustrates the sampling method used in the experiment. For the sake of
simplicity, attention is paid to one of the three clusters. Although each cluster has three
carrier signals with the same carrier frequency as 800 Hz, they are phase-shifted by 2π/3.
Chapter 4 The 200-V, 10-kW, 3.6-KWh Experimental System
60
Data sampling, for example, for converter cell 1 is carried out at every peak or trough of
the carrier signal for converter cell 2. The corresponding voltage reference is renewed at
the following peak or trough of the carrier signal for converter cell 1 with a time delay of
208.3 µs. It is held for 625 µs in order to avoid multi-switching. The equivalent carrier
frequency results in 4.8 kHz (= 800 Hz × 2 × 3).
4.4
Summary
This chapter has described the downscaled 200-V, 10-kW, 3.6-kWh experimental battery energy storage system. The system is based on a cascade PWM converter with a
cascade number of 3 and nine NiMH battery units with nominal dc voltage of 72 V. The
chapter has also presented an overview of the control system consisting of active-power
control, SOC-balancing control, and fault-tolerant control, which will described in detail
in the following chapters.
61
Chapter 5
Active-Power Control and
SOC-Balancing Control
This chapter describes the active-power control and the state-of-charge balancing control of the battery energy storage system based on a cascade PWM converter. Theoretical
analysis is done and experimental waveforms are presented to verify the effectiveness of
the control methods. Experimental results also show the battery energy storage system’s
ride-through capability of an SLG fault.
5.1
Active-Power Control
The active-power control is based on the synchronous dq reference frame [140]. The
synchronous frame controller can eliminate steady-state error and has fast transient
response by decoupling control. The control method is explained here.
Referring to Fig. 4.1 and neglecting the resistance components, the following set of
voltage-current equations are obtained:

 



vuM
vSuO
iu
 vSvO  −  vvM  = LAC d  iv  ,
dt
vwM
vSwO
iw
(5.1)
where


sin
ωt
r
vSuO

2π 
sin(ωt
−
) .
 vSvO  = 2 VS 

3 
3

2π 
vSwO
sin(ωt +
)
3


(5.2)
Chapter 5 Active-Power Control and SOC-Balancing Control
Applying the dq transformation leads to


" # "
#
d
vSd − vd
LAC dt −ωLAC  id

d  iq = vSq − vq ,
ωLAC LAC
dt
62
(5.3)
where vd and vq are the d -axis and q-axis components of ~v , while id and iq are those of
~i. Likewise, vSd and vSq are the d-axis and q-axis components of ~vS . The instantaneous
active power p and the instantaneous reactive power q [141], [142] can be expressed as
id
p
vSd vSq
.
=
(5.4)
−vSq vSd
iq
q
When the three-phase source voltages are balanced on the grid, vSq is always zero because
~vS is aligned with the d -axis.
p = vSd id
q = vSd iq .
(5.5)
(5.6)
Equations (5.5) and (5.6) imply that p and q can be controlled independently as a result
of controlling id and iq respectively. The d-axis current command i∗d and the q-axis
current command i∗q are given by
i∗d =
p∗
vSd
(5.7)
i∗q =
q∗
= 0,
vSd
(5.8)
where p∗ is the active-power command, while the reactive power command of q ∗ = 0
ensures unity power-factor operation. Let the ac voltage commands in the d -axis and
the q-axis be
#" #
" # " # "
vd∗
0
−ωLAC id
vSd
−
=
vq∗
ωLAC
0
iq
vSq
#
#
"
Z "∗
id − id
i∗d − id
K
dt.
−
−K ∗
T
i∗q − iq
iq − iq
(5.9)
(5.10)
Fig. 5.1 shows the active-power control resulted from 5.10. The first and second terms
on the right-hand side of (5.10) are introduced to cancel out the effect of the source
voltage and the steady-state voltage appearing across the ac inductor LAC . The third
Chapter 5 Active-Power Control and SOC-Balancing Control
p∗
q∗
iu
iv
iw
1
vSd
i∗d +
1
vSd
i∗q
K+
−
dq
trans.
+
K
sT
K+
−
id
K
sT
−
+
ωLAC
iq
dq
trans.
vd∗
+ − v∗
q
−
ωLAC
+
vSd
vSuO
vSvO
vSwO
63
Inverse
dq
trans.
∗
vuM
∗
vvM
∗
vwM
vSq
Fig. 5.1: Active-power control.
and fourth terms form a PI controller with a proportional gain K and an integral time
constant T . Substituting (5.10) into (5.3) results in


KR ∗
" #
∗
K(i
−
i
)
+
(i
−
i
)dt
d
d
i
d
d
d d
1 

T
=

.
R
dt iq
LAC
K
∗
∗
(iq − iq )dt
K(iq − iq ) +
T
(5.11)
Equation (5.11) signifies that id and iq can be controlled independent of each other. The
∗
∗
∗
three-phase reference signals vuM
, vvM
and vwM
are obtained by applying the inverse dq
transformation to (5.10).
Fig. 5.2 shows the block diagram of the d-axis current control obtained by taking the
VSd + ωLAC Iq
Id∗
+
−
K+
K
sT
−
+
VSd + ωLAC Iq
Converter −
(gain ' 1)
+
1
sLAC
Id
Fig. 5.2: Block diagram of the d-axis current control, excluding the
effect of a one-sampling delay.
Chapter 5 Active-Power Control and SOC-Balancing Control
64
Laplace transformation of (5.3) and (5.10). The transfer function can be determined as
Id (s)
K(sT + 1)
=
.
∗
Id (s)
LAC T s2 + KT s + K
(5.12)
Note that the one-sampling delay is neglected from (5.12). The damping ratio ζ is given
by
1
ζ=
2
r
KT
.
LAC
(5.13)
Setting ζ = 1 leads to a critically-damped response,
K=
4LAC
= 0.5 V/A at T = 10 ms.
T
(5.14)
The time constant T should be assigned to be much longer than the control delay from
the viewpoint of control stability.
5.2
SOC-Balancing Control
■ Battery SOC
The SOC of a battery is its available capacity expressed as a per-
centage of the rated capacity.
SOC =
available capacity [Ah]
× 100%.
rated capacity [Ah]
(5.15)
The battery management system plays an important part in estimating the SOC, which is
often called the “fuel gauge” function. The SOC estimation may be based on measuring
some convenient parameters such as voltage, current or internal impedance, which vary
with the SOC [138].
■ SOC Imbalance
Due to asymmetric battery units, unequal converter-cell losses,
and so on, SOC imbalance may occur among multiple battery units in a battery energy
storage system based on a cascade converter. This may result in the reduction of total
available capacity of the battery units, and may also cause overcharge/overdischarge of
a particular battery unit.
■ SOC Balancing in Literature
Tolbert et al. [54] proposed a switching-pattern-
swapping scheme for achieving SOC balancing of multiple battery units in a cascadeconverter-based motor drive. Fig. 5.3 illustrates the scheme for an 11-level converter
Chapter 5 Active-Power Control and SOC-Balancing Control
5VDC
65
vuM
0
vu
vu5 6
vu4 6
vu3 6
vu2 6
M
vu1 6
VDC
P
5
VDC
VDC
P5
P3
P4
P1
P2
P3
vu3
P4
P5
P1
P2
vu2
P2
P2
vu4
P3
VDC
P1
P4
VDC
vu5
P3
P4
P5
P1
vu1
P1
P2
P3
P4
P5
Fig. 5.3: Switching-pattern swapping scheme for SOC balancing of
multiple battery units in an 11-level cascade SCM converter.
in which the switching pattern is swapped among the various levels every half cycle,
resulting in equal loading of all the battery units. However, the scheme may be confined
to multilevel cascade converters using staircase modulation. Moreover, it assumed that
the battery units were identical and that their initial SOC values were balanced.
■ SOC Balancing Control
This dissertation presents a new SOC-balancing control
for a battery energy storage system based on a cascade PWM converter. It is divided
into;
• clustered SOC-balancing control, and
• individual SOC-balancing control.
Let us recall (4.1), (4.2), and (4.3) from chapter 4 as follows;

 

SOC − SOCu
∆SOCu
 ∆SOCv  =  SOC − SOCv 
SOC − SOCw
∆SOCw
(5.16)
Chapter 5 Active-Power Control and SOC-Balancing Control
1
SOC = (SOCu + SOCv + SOCw )
3



SOCu
SOCu1 + SOCu2 + SOCu3

 1

 SOCv  =  SOCv1 + SOCv2 + SOCv3  .
3
SOCw
SOCw1 + SOCw2 + SOCw3
66
(5.17)

(5.18)
Here ∆SOCu , ∆SOCv , and ∆SOCw are the respective differences between the mean SOC
value of the nine battery units in the three clusters and the mean SOC value of the three
battery units in the u-cluster, v-cluster, and w-cluster.
The aim of the clustered SOC-balancing control is to keep the mean SOC value of
a cluster (SOCu , SOCv and SOCw ) equal to the mean SOC value of the three clusters (SOC). Similarly, the aim of the individual SOC-balancing control is to keep each
of the three SOC values in a cluster (for example, SOCu1 , SOCu2 and SOCu3 ) equal to
the mean SOC value of the corresponding cluster (SOCu ).
The individual SOC-balancing control presented in the dissertation resembles in structure the individual voltage-balancing control presented in [50] 1 and [139]. However, the
clustered SOC-balancing control is different in form and function from the clustered
voltage-balancing control in [50] and [139]. The clustered SOC-balancing control is based
on zero-sequence-voltage injection while the clustered voltage-balancing control is based
on negative-sequence current injection.
5.2.1
Clustered SOC-Balancing Control
The clustered SOC-balancing control is based on “neutral shift.” The neutral shift
implies shifting the floating (ungrounded) neutral point of the star-configured cascade
converter away from the neutral point of the source or the ac mains.
The idea is to inject a fundamental-frequency zero-sequence voltage v0 to the threephase ac voltages vuM , vvM , and vwM of the cascade converter [143]. This allows each of
the three clusters to draw or release an unequal active power without drawing negativesequence current. Here, v0 is the potential of point ‘O’ with respect to point ‘M’ in
1
Reference [50] paid attention to a STATCOM, with focus on voltage balancing of dc capacitors.
Chapter 5 Active-Power Control and SOC-Balancing Control
67
Fig. 4.1. Since the zero-sequence-voltage injection does not cause any change in the lineto-line voltages, the clustered SOC-balancing control produces no effect on the threephase line currents and the total power.
If the cascade converter voltage is assumed not to contain any negative-sequence voltage, it can be expressed as

 
  
V̇uM
V̇f uM
V̇0
 V̇vM  =  V̇f vM  + V̇0 
V̇wM
V̇f wM
V̇0

 

1
1
2π
= Vf M ejφf e−j 3  + V0 ejφ0 1 ,
2π
1
ej 3
(5.19)
where the first term on the right-hand side represents the positive-sequence voltage with
an rms magnitude of Vf M and a phase angle of φf with respect to the u-phase voltage.
The second term represents the fundamental-frequency zero-sequence voltage with an
rms magnitude of V0 and a phase angle of φ0 . Both V0 and φ0 can be adjusted by the
clustered SOC-balancing control.
The line currents are assumed to contain only positive-sequence currents.
 


1
I˙u
 I˙v  = Iejθ e−j 2π3  ,
2π
I˙w
ej 3
where
(5.20)
s
Id2 + Iq2
3

Iq


tan−1
if Id 6= 0


Id

π
θ=
if Id = 0 and Iq > 0)

2



− π if Id = 0 and Iq < 0).
2
I=
(5.21)
(5.22)
In a sinusoidal steady-state condition, Id and Iq are equal to the d-axis current id and
the q-axis current iq . The u-phase power can be expressed as
i
h
i
h
˙
˙
˙
Pu = Re V̇uM · I u = Re V̇f uM · I u + V̇0 · I u .
(5.23)
The first term on the right-hand side is the active power related to the positive-sequence
voltage included in the u-phase ac voltage of the cascade converter, while the second
Chapter 5 Active-Power Control and SOC-Balancing Control
68
term is the active power coming from the zero-sequence-voltage injection, which can be
expressed as
h
Pu0
= Re V˙0 · I¯˙u
i
(5.24)
= Re [(V0 (cos φ0 + j sin φ0 ) · I(cos θ + j sin θ)]
(5.25)
= V0 I cos(φ0 − θ).
(5.26)
Similarly, the v- and w-phase powers due to zero-sequence voltage can be calculated.


cos(φ0 − θ)




Pu0

2π 
 Pv0  = V0 I cos(φ0 − θ +
) .
(5.27)

3 


Pw0
2π
cos(φ0 − θ −
)
3
Equation (5.27) makes it clear that Pu0 + Pv0 + Pw0 = 0. This means the zero-sequencevoltage injection produces no effect on the overall three-phase power transfer. Taking
3-phase to 2-phase transformation of (5.27) yields

  r 
cos γ
Pα0
Pβ0  = 3  sin γ 
2
0
P00
(5.28)
where
γ = θ − φ0 .
(5.29)
Fig. 5.4 shows the block diagram of the clustered SOC-balancing control. The SOC
differences (∆SOCu , ∆SOCv , and ∆SOCw ) correspond to an amount of active power to
be drawn or released by each of the three clusters to maintain SOC balancing among the
clusters. Performing three-phase to two-phase transformation of (5.16) gives 2


3
∆SOCu


∆SOCα
2




∆SOCβ  = 1
 √ (∆SOCv − ∆SOCw ) .
 2

∆SOC0
0

2
r

(5.30)
The vector [SOCα , SOCβ ]T is not a rotating vector, but a stationary vector in alliance with the
cluster having the largest SOC error.
Chapter 5 Active-Power Control and SOC-Balancing Control
SOCu
SOCv
SOCw
−
+
69
∆SOCu
−
+
∆SOCv
− ∆SOCw
+
3-phase to
2-phase
∆SOCα
transform.
∆SOCβ
SOC
∆SOC2α +∆SOC2β
tan−1
id
tan−1
iq
Iq
Id
q
K0
∆SOCβ
∆SOCα
γ
−
+
θ
∆SOC
v0∗
φ0
√
2 sin(ωt+φ0 )
Fig. 5.4: Clustered SOC-balancing control based on zero-sequence
voltage injection.
v
β
∆SOCv
∆SOCβ
∆SOC
γ
O
u, α
∆SOCα ∆SOCu
∆SOCw
(∆SOCu > ∆SOCv > ∆SOCw )
w
Fig. 5.5: Three-phase to two-phase transformation of SOC errors
in the u-, v-, and w-clusters.
Let ∆SOC be defined as
q
∆SOC =
=
q
∆SOC2α + ∆SOC2β
∆SOC2u + ∆SOC2v + ∆SOC2w .
(5.31)
Here, ∆SOC is a parameter representing a degree of SOC imbalance among the three
Chapter 5 Active-Power Control and SOC-Balancing Control
70
clusters. The parameter γ (= tan−1 (Pβ0 /Pα0 )) in (5.29), which represents the distribution of Pu0 , Pv0 , and Pw0 in αβ axes, should be equal to the phase angle representing the
distribution of SOC imbalance in the αβ axes.

∆SOCβ

tan−1
if ∆SOCα 6= 0



∆SOCα
π
γ=
(5.32)
if ∆SOCα = 0 and ∆SOCβ > 0

2


− π if ∆SOC = 0 and ∆SOC < 0.
α
β
2
Fig. 5.5 shows an example of phasor representation of the 3-phase to 2-phase transformation of SOC errors in u-, v-, and w-clusters (∆SOCu , ∆SOCv , and, ∆SOCw ) to calculate
∆SOC and γ, where ∆SOCu > ∆SOCv > ∆SOCw .
The zero-sequence-voltage reference is determined as
√
v0∗ = 2 · K0 · ∆SOC · sin(ωt + φ0 ),
(5.33)
where K0 is a proportional gain, and φ0 is given by
φ0 = θ − γ.
(5.34)
V̇0∗ = K0 · ∆SOC · ejφ0 .
(5.35)
Phasor representation leads to
Fig. 5.6 illustrates an example of phasor representation of the injection of zero sequence
voltage and the resulting neutral shift. Fig. 5.6(a) shows the phasor diagram before
injecting the zero-sequence voltage where the neutral point of the cascade converter (M)
coincides with the neutral point of the source (O). Fig. 5.6(b) shows the phasor diagram
after the injection of the zero-sequence voltage which is determined by (5.35). The
injection results in the shift of the neutral point of the cascade converter away from the
neutral point of the source. This causes the three clusters draw or release an unequal
active power that helps balance the mean SOC values (SOCu , SOCv , and SOCw ) of the
three clusters.
Fig. 5.7 shows the control block diagram of clustered SOC-balancing control, taking
the u-phase as an example. The coefficient (3/W )·100 converts a cluster battery energy [J]
to SOC [%], where W = 13 × 106 J. The closed-loop transfer function is given by
r
2 1
∆SOCu (s)
3 K0 Iu
r
=
.
(5.36)
Du (s)
1
2W 1
1+s
3 3 K0 Iu 100
Chapter 5 Active-Power Control and SOC-Balancing Control
jωLAC Iw
VwO
VSwO
Iw
Iu
O, M
VSuO
VuO
jωLAC Iu
Iv
VvO
VSvO
(a)
jωLAC Iv
jωLAC Iw
VSwO
VwO
VwM I
w
M
V0 O
φ0
VSuO
VuO
jωLAC Iu
VuM
Iv
VvM
Iu
VvO
VSvO
(b)
jωLAC Iv
Fig. 5.6: Illustration of the injection of zero-sequence voltage and
the resulting neutral shift. (a) Phasor diagram before the injection
of zero-sequence voltage, and (b) Phasor diagram after the injection
of zero-sequence voltage.
71
Chapter 5 Active-Power Control and SOC-Balancing Control
Iu
SOC
+
−
r
Du (s)
−
+
3
K0
2
Pu0
72
SOC
−1 3
. .100
s W
+
−
SOCu
Fig. 5.7: Clustered SOC-balancing control, taking the u-phase as
an example.
This transfer function has a time constant given by
r
2W 1
1
T0 =
,
3 3 K0 Iu 100
(5.37)
where the gain K0 was designed as
K0 = 3.5 V/% at T0 = 6 min.
5.2.2
(5.38)
Individual SOC-Balancing Control
Fig. 5.8 shows the individual SOC-balancing control paying attention to the n-th
converter cells of the three clusters. In order to determine the transfer function, let us
redraw the block diagram of the individual SOC-balancing control as shown in Fig. 5.9,
taking the u-phase n-th converter cell as an example, where N = 3 and W = 13 × 106 J.
Let ∆SOCun be a difference between the mean SOC value of the u-cluster and the
SOC value of the n-th converter cell in the u-cluster.
∆SOCun = SOCu − SOCun ,
(5.39)
where n = 1, 2, and 3. The difference ∆SOCun is minimized by appropriately charging
or discharging the respective battery unit in the u-cluster. The superimposed ac voltage
to minimize the difference is determined as
√
vBun = 2 · K1 · ∆SOCun · sin(ωt + θ),
(5.40)
where K1 is a proportional gain. Unity power-factor operation makes the power-factor
angle θ equal to zero for charging operation, or π for discharging operation.
Chapter 5 Active-Power Control and SOC-Balancing Control
+
SOCu
(n = 1, 2, and 3)
vBun
K1
−
√
2 sin(ωt + θ)
SOCun
+
SOCv
vBvn
K1
−
√
2 sin(ωt + θ − 2π/3)
SOCvn
+
SOCw
73
vBwn
K1
−
√
2 sin(ωt + θ + 2π/3)
SOCwn
Fig. 5.8: Individual SOC-balancing control between three cascaded
converter cells inside each cluster, paying attention to the n-th converter cells.
Iu
SOCu
+
−
+
K1
VBun
−
SOCu
Dun
−1 3N
·
·100
s W
−
+
SOCun
PBun
(n = 1, 2, and 3)
Fig. 5.9: Individual SOC-balancing control, taking the u-phase n-th
converter cell as an example.
The sum of the superimposed voltages in a cluster is equal to zero.
N
X
n=1
vBun =
√
2 · K1 · sin(ωt + θ) ·
N
X
∆SOCun = 0.
(5.41)
n=1
This shows that the individual SOC-balancing control does not interfere with the activepower control and the clustered SOC-balancing control.
The active power for achieving the SOC balancing of the u-phase n-th converter cell
is given by
PBun = K1 · Iu · ∆SOCun − Dun ,
(5.42)
Chapter 5 Active-Power Control and SOC-Balancing Control
74
where Dun represents a loss or disturbance in the u-phase n-th converter cell. An amount
of active power equal to PBun is drawn into, or released from, the u-phase n-th converter
cell to increase or decrease the SOCun value so that ∆SOCun = 0.
Z
W
PBun dt.
∆SOCun = −
3N
(5.43)
Note that (5.43) discards a 100-Hz component 3 from pBun (= vBun · iu ). Equations (5.39),
(5.42) and (5.43) result in Fig. 5.9. The closed-loop transfer function is given by
1
∆SOCun (s)
K1 Iu
=
.
W
1
1
Dun (s)
1+s
3N K1 Iu 100
(5.44)
This transfer function has a time constant given by
T1 =
W 1
1
.
3N K1 Iu 100
(5.45)
Finally, the gain K1 was designed as
K1 = 0.7 V/% at T1 = 12 min.
5.3
(5.46)
Experimental Results
5.3.1
Startup Waveforms
The battery energy storage system requires no external startup circuit. The startup
procedure is similar to the one presented in [88].
Fig. 5.10 shows the waveforms during startup. At time t = 0, CB1 was switched
on, whereas MC1 as well as CB2 and MC2 in each converter cell remained switched off.
Each of the nine capacitors started charging through R1 and the respective converter cell
started operating as a diode rectifier. The inrush ac current was limited to 12 A (peak),
which was below the rated current of 30 A. At the time of t = 30 s, when the starting ac
current decayed to zero, the MC1 as well as nine CB2s were turned on sequentially. The
3
The 100-Hz component included in pBun makes no contribution to charging or discharging the
battery unit, because its mean value is zero over one fundamental-frequency cycle (20 ms). Moreover, a high-energy density of the battery unit makes the effect of the 100-Hz component on the
SOC negligible.
Chapter 5 Active-Power Control and SOC-Balancing Control
75
12 A
20
iu [A]
0
46 V
@
R
@
CB1 was turned on
50
Nine traces
vDC [V]
0
t=0
20
iu [A]
vDC [V]
0
(a)
CB2 was turned on
Nine traces
46.5 V
@
R
@
t = 30 s
78 V
@
R
@
2s
-
(b)
20 ms
-
60
0
90
vDC [V]
-
0
100
iu [A]
200 ms
80
78 V
@
R
@
Controller was started
Nine traces
70
60
12
10 kW
p [kW]
0
t = 2 min
(c)
Fig. 5.10: Experimental waveforms when the battery energy storage system was started. (a) CB1 was turned on at t = 0, (b) CB2
was turned on at t = 30 s, and (c) Controller was started at t = 2 min.
dc-link voltages then reached the battery-unit voltages of 78 V, as shown in Fig. 5.10(b).
The nine starting resistors R2 limit the inrush dc currents when the nine battery units
Chapter 5 Active-Power Control and SOC-Balancing Control
76
200
vSuO [V]
0
60
iu [A]
0
12
p [kW]
0
90
vDC [V]
80
10 ms
Nine traces
70
60
Fig. 5.11: Experimental waveforms when the battery bank was
charged at 10 kW with a mean SOC window between 40 and 45%.
are connected to the dc links and are bypassed by the nine magnetic contactors MC2s in
5 s. At t = 2 min, the controller was started and the gate signals were provided to the
nine converter cells, along with the active-power command p∗ . The system thus came to
normal operation.
5.3.2
Charging and Discharging Waveforms
Fig. 5.11 shows the experimental waveforms when the battery energy storage system
was charged up at the rated power of 10 kW. The waveforms of vSuO and iu were in
phase because this system was operated with a condition of q ∗ = 0. The u-phase current
was slightly distorted with a current THD of 3.5% at a battery-unit voltage of 78 V.
Fig. 5.12 shows the experimental waveforms when the battery energy storage system
was discharged down at the rated power of 10 kW. The waveforms of vSuO and iu were
out of phase by 180◦ . The u-phase current had a THD of 5.4%. The THD value is
expected to be lower in the 6.6-kV system because a saturation/forward voltage ('2 V)
Chapter 5 Active-Power Control and SOC-Balancing Control
77
200
vSuO [V]
0
60
iu [A]
p [kW]
0
0
−12
90
vDC [V]
80
10 ms
-
Nine traces
70
60
Fig. 5.12: Experimental waveforms when the battery bank was
discharged at 10 kW with a mean SOC window between 40 and
45%.
of 1.2-kV IGBTs/diodes is much lower than a battery-unit voltage ranging from 600 to
750 V with a higher equivalent carrier frequency. The mean SOC window was in between
40 and 45% when these charge-discharge waveforms were observed.
Fig. 5.13 shows the experimental waveforms when the battery energy storage system
was repetitively charged up to a mean SOC of 75% and discharged down to a mean
SOC of 25%. Although the experiment used a mean SOC window between 25% and
75%, a wider window may be used in an actual system. Note, however, that NiMH
batteries show extended cycle life with a lower depth-of-discharge (DOD) 4 value [129].
Here, îDC , v̂DC , and SOC were obtained from a battery management system (BMS)
with a sampling rate of 1 s−1 . Since the power was set at p = ±10 kW, the charging
or discharging battery current was observed to be around 15 A. This is equivalent to a
4
DOD is a measure of energy withdrawn from a battery, expressed as a percentage of the full
capacity.
Chapter 5 Active-Power Control and SOC-Balancing Control
20
îDC [A]
750 s
v̂DC
Nine traces
-
0
-
500 s
555 s
100
90
[V] 80
70
60
Nine traces
80
SOC [%]
78
60
75%
Nine traces
40
20
25%
Fig. 5.13: Experimental waveforms with repetitive charging and
discharging of the battery bank, where a mean SOC window was
kept between 25 and 75%.
C-rate 5 of 2.7 C (= 15 A/5.5 Ah).
5.3.3
Battery-Unit Voltage and Current Waveforms
Fig. 5.14 shows the voltage and current waveforms of a battery unit in the u-cluster,
where (a) corresponds to those during charging (p = 10 kW), while (b) to those during
discharging (p = −10 kW) both at a mean SOC value of 65%. The waveform of vDCu1
contained a 100-Hz component of 2 V (peak-to-peak), and the waveform of iDCu1 contained a 100-Hz component of 17.5 A (peak-to-peak) during charging. They are in phase
so that the internal impedance of the battery-unit can be considered purely resistive.
The internal resistance is estimated to be 115 mΩ (= 2 V/17.5 A). The dc internal
resistance of a standalone battery unit was measured to be 133 mΩ at an SOC value of
65% and a battery temperature of 30◦ C.
5
The term “C-rate” is a charging or discharging rate of a battery expressed in terms of its total
storage capacity in Ah. A rate of 1 C means a complete transfer of the stored energy in 1 h.
Chapter 5 Active-Power Control and SOC-Balancing Control
79
100
vDCu1 [V]
90
80
70
5 ms
30
iDCu1 [A]
0
(a)
vDCu1 [V]
90
80
70
60
iDCu1 [A]
5 ms
0
−30
(b)
Fig.
5.14: Battery voltage and current waveforms.
(a) During
charging at 10 kW, and (b) During discharging at 10 kW. The mean
SOC value was 65%.
5.3.4
Transient Waveforms
Fig. 5.15 shows transient waveforms from charging to discharging operation with a
ramp change in active power from 10 kW to −10 kW in 30 ms with a mean SOC value of
around 70%. Fig. 5.16 shows transient waveforms from discharging to charging operation
with a ramp change in active power from −10 kW to 10 kW in 30 ms with a mean SOC
value of around 30%. These waveforms confirmed stable operation even in the transient
states.
Chapter 5 Active-Power Control and SOC-Balancing Control
80
200
vSuO [V]
0
60
iu [A]
0
12
p [kW]
10 kW
0
−10 kW
-
90
vDC [V]
20 ms
-
Nine traces
85
80
75
Fig.
5.15: Experimental waveforms when p∗ was changed from
10 kW to −10 kW in 30 ms with a mean SOC value of 70%.
5.3.5
Effectiveness of the SOC-Balancing Control
The SOC-balancing control is introduced to make equal all the SOC values of the nine
battery units for the effective utilization of the battery energy. In Fig. 5.17, the upper
part shows all the nine SOC values of the battery units, the middle part shows the three
mean SOC values of the u-, v- and w-clusters, and the lower part shows the value of
∆SOC defined in (5.31).
Before starting the experiment (t = 0), the SOC values of the nine battery units had
a maximal imbalance of 5% between the lowest and highest ones. However, when the
SOC-balancing control was started along with p∗ = ±10 kW at t = 0, the nine SOC
values gradually started to converge together. In about 15 mins, all the SOC values were
effectively balanced. The value of ∆SOC was reduced to one-third of its initial value in
about 7 min. This fact agreed well with T0 = 6 min in (5.38).
Chapter 5 Active-Power Control and SOC-Balancing Control
200
vSuO [V]
0
60
iu [A]
0
12
p [kW]
10 kW
-
0
−10 kW
Nine traces
80
vDC [V]
20 ms
75
70
65
Fig.
5.16: Experimental waveforms when p∗ was changed from
−10 kW to 10 kW in 30 ms with a mean SOC value of 30%.
SOCun
SOCvn
SOCwn
[%]
SOCu
SOCv
SOCw
[%]
∆SOC
[%]
Experiment started
80
Nine traces
60
40
20
80
SOCu and SOCw
60
?
40
20
@
I
@
Three traces
SOCv
4
3
2
1
0
t=0
5 min
Fig. 5.17: Experimental waveforms to verify the effectiveness of the
SOC-balancing control, where a mean SOC value was kept between
30 and 70% with p∗ = 10 kW and q ∗ = 0.
81
Chapter 5 Active-Power Control and SOC-Balancing Control
82
AC switch
vSu
Autotransformer
To ac mains
To energy storage
system
vSv
vSw
Fig. 5.18: Voltage-sag generator used to simulate a single-phase
voltage sag in the laboratory.
5.3.6
Ride-Through Capability of Voltage Sags
When the battery energy storage system is connected to a power distribution system,
it must deal with the voltage imbalance due to asymmetrical power system failure. The
active-power control in Fig. 5.1 is capable of suppressing the negative-sequence current
during a voltage sag, thereby allowing the battery energy storage system to maintain
continuous operation.
Fig. 5.18 shows voltage-sag generator used to simulate a single-phase voltage sag in the
laboratory. It consists of a three-phase autotransformer and ac switches using IGBTs.
Experiment is carried out to test the energy storage system for the ride-through capability
of voltage sags.
Figs. 5.19 shows experimental waveforms when a u-phase voltage sag of 25% occurred
and lasted for 100 ms during charging at 10 kW. Fig. 5.20 shows those during discharging at 10 kW. The mean SOC value of the nine battery units was 75% during both
experiments.
Although the negative-sequence currents were not completely eliminated from the line
currents, the results showed the capability of the battery energy storage system of riding
through voltage sags. Note that the presence of 100 Hz component in id and p is caused
by the negative-sequence current.
The six traces of vDC in Figs. 5.19 and 5.20 include vDCu1 , vDCu2 , vDCv1 , vDCv2 , vDCw1 ,
Chapter 5 Active-Power Control and SOC-Balancing Control
200
vSuO [V]
Voltage sag
-
83
20 ms
-
0
60
i [A]
0
15
p [kW]
0
75
50
id , iq [A] 25
0
-25
90
vDC [V]
85
80
i
) d
) iq
vDCu1 , vDCu2 , vDCv1 , vDCv2
Six traces
vDCw1 , vDCw2
75
30
iDC [A]
Fig.
iDCu1 , iDCv1 and iDCw1
Three traces
0
5.19: Experimental waveforms when a voltage sag of 25%
occurred in the u-phase and lasted for 100 ms during charging at
10 kW with a mean SOC value of 75%.
and vDCw2 , which showed that the fluctuation of dc voltage during the voltage sag is
not serious in the battery energy storage system. The three traces of iDC include iDCu1 ,
iDCv1 , and iDCw1 .
5.4
Summary
This chapter has provided detailed analysis of the active-power control of the converter
and the SOC-balancing control of the multiple battery units for the battery energy
Chapter 5 Active-Power Control and SOC-Balancing Control
200
vSuO [V]
Voltage sag
84
20 ms
-
-
0
60
i [A]
0
15
p [kW]
0
25
0
id , iq [A] -25
-50
-75
80
vDC [V]
75
70
i
) d
) iq
vDCu1 , vDCu2 , vDCv1 , vDCv2 ,
Six traces
vDCw1 , and vDCw2
65
30
iDC [A]
Three traces
0
iDCu1 , iDCv1 and iDCw1
Fig.
5.20: Experimental waveforms when a voltage sag of 25%
occurred in the u-phase and lasted for 100 ms during discharging
at 10 kW with a mean SOC value of 75%.
storage system based on a cascade PWM converter. Experimental results obtained from
a 200-V, 10-kW, 3.6-kWh laboratory model have verified the effectiveness of the control
methods. A simple startup procedure without using external circuit has been explained.
Experimental results demonstrating the ride-through capability of the battery energy
storage system against a voltage sag have also been provided.
85
Chapter 6
Fault-Tolerant Control
This chapter presents a fault-tolerant control to improve the reliability and availability
of the battery energy storage system based on a cascade PWM converter. During a
converter-cell or battery-unit failure, it enables continuous operation at rated power,
producing a three-phase balanced line-to-line voltage while maintaining SOC balancing
of the remaining healthy battery units. Experimental results are presented to verify the
effectiveness of the control method.
6.1
Reliability
Medium-voltage converters are high-power equipments. When they fail, the downtime
can be very expensive. For this reason, reliability is a very important issue in this family
of converters [144]–[146].
However, medium-voltage converters based on multilevel topologies require a large
number of power switching devices. Each of these switching devices is a potential failure
point. For this reason it may considered that the medium-voltage multilevel converters
are less reliable.
6.2
Fault Tolerance
Reliability can be improved by a fault-tolerant design. In traditional two-level converters, the fault tolerance is achieved by series connection of one extra power switching
device per arm. This strategy, known as “N +1 redundancy,” was originated in LCI drive
Chapter 6 Fault-Tolerant Control
86
design. It requires no additional control and the converter operation is not affected when
one device fails because the failed device acts like a short circuit. By this method, the
reliability is greatly improved. However, the number of power switching devices doubles
when this strategy is applied to the multilevel converters, thus increasing cost, size and
complexity of the system.
Multilevel converters, nevertheless, offer more possibilities in the power circuit to allow
for operation even during faulty condition. Fault tolerance for the multilevel converters has been investigated in literatures [147]–[159]. For a cascade converter, the fault
tolerance can be achieved;
1. by providing a redundant converter cell in each phase, and bypassing the faulty
converter cell as well as two healthy converter cells in the other two phases, or
2. by providing no redundant converter cells, and bypassing the faulty converter cell
only.
The first category can ride through a fault in at least one converter cell at the rated
voltage and power. This approach is often used in critical applications at the expense of
cost and efficiency.
The second category can tolerate faults in a few converter cells with a reduced voltage
and power. Although a tolerable degree of reduction in voltage and power depends on
the application, it is preferred over the complete shutdown in most cases. Neutral shift
is used to make the available voltage and power maximal in the second category.
6.3
Literature Review
Song et al. [155] discussed a fault-tolerant control belonging to the first category for
a 4.16-kV 7.2-MVA STATCOM based on a cascade converter. The five-level cascade
converter has a dc voltage of 2.175 kV. In order to improve reliability, one redundant
converter cell is added in each phase, resulting in a seven-level converter with dc voltage
of 1.45 kV.
Fig. 6.1 shows the cascade converter with redundant converter cells. During normal operation with three converter cells in each phase, the STATCOM operates as the
Chapter 6 Fault-Tolerant Control
87
4.16 kV
50 Hz
Fig.
Cell
u1
Cell
v1
Cell
w1
Cell
u2
Cell
v2
Cell
w2
Cell
u3
Cell
v3
Cell
w3
1450 V for normal operation
6
2170 V for fault-tolerant operation
Redundant
converter cells
6.1: A 4.16-kV 7.2-MVA STATCOM based on a five-level
cascade converter with one redundant converter cell in each phase.
seven-level converter with dc voltage at 2.175 kV. When a converter cell fails, the faulty
converter cell as well as two healthy converter cells in the other two phases are bypassed
and the STATCOM is operated as the five-level converter with dc voltage at 1.45 kV.
Wei et al. [151] described a fault-tolerant control belonging to the second category for
a seven-level cascade SVM converter intended for a motor drive. Fig. 6.2(a) shows the
space vector diagram. When a converter cell fails, it results in a layer of invalid space
vectors, as shown in Fig. 6.2(b) for a converter-cell failure in the u-phase. The invalid
space vectors are represented by the dots with a circle around. With one faulty converter
cell, there still exists a large number of healthy space vectors. Therefore, it is possible
to make use of redundant switching states of each healthy vector in order to produce a
three-phase balanced line-to-line voltage with minimum harmonic distortion.
Rodriguez et al. [154] used another fault-tolerant control belonging to the second category for a 4.16-kV motor drive based on a cascade PWM converter. The 11-level converter
is shown in Fig. 6.3(a). During normal operation with no faulty converter cells, the ac
voltages of converter cells have a phase displacement of 120◦ as shown in Fig. 6.3(b).
When a converter cell fails, the phase angles (α, β, and γ) of ac voltages of healthy con-
Chapter 6 Fault-Tolerant Control
6
6
4
4
2
2
0
0
−2
−2
−4
−4
−6
−6
−6 −4 −2
0
(a)
2
4
6
88
vv
vu
vw
−6 −4 −2
0
2
(b)
4
6
Fig. 6.2: Space vector diagram of a seven-level cascade converter.
(a) Normal condition, and (b) With one faulty cell in the u-phase.
Dots with a circle around represent faulty space vectors.
verter cells are modified to achieve neutral shift producing a three-phase balanced line-toline voltage. Fig. 6.3(c) shows the neutral shift (α = 126.4◦ , β = 107.2◦ , and γ = 126.4◦ )
for the 11-level cascade converter to produce a three-phase balanced line-to-line voltage
during one converter-cell failure in the u-phase.
Lezana et al. [158] controlled the dc voltages of healthy converter cells in addition to
the neutral-shift method discussed in [154], so as to keep a cascade inverter operated
at the rated voltage and power during a converter-cell fault. However, most literatures
have been limited to theoretical analysis and/or computer simulation.
6.4
SOC Balancing During Fault-Tolerant Operation
Chapter 5 presented an SOC-balancing control for the battery energy storage system
based on a cascade PWM converter. However, SOC balancing should be maintained
not only in normal operation but also in fault-tolerant operation for effective utilization
of battery energy. No literature has addressed SOC balancing of healthy battery units
during the occurrence of a converter-cell fault in a cascade converter.
The fault-tolerant control presented in this dissertation belongs to the second category
and executes an appropriate neutral shift based on fundamental-frequency zero-sequence
Chapter 6 Fault-Tolerant Control
Cell u1
89
M
◦
0
6
vu1 Cell
v1
6
vv1 Cell
w1
6
vw1
6
vu2 Cell
v2
6
vv2 Cell
w2
6
vw2
Cell
v5
Cell
6
vv5 w5
6
vw5
12◦
Cell u2
48◦
6
vu5
Cell u5
M
(a)
w
vw5
w
vw5
vw4
vw4
vw3
vw3
vw2
γ = 120◦
v u1 v u2 vu3 vu4 vu5
vw1
β = O,M
120◦
vv1
vv2
vw2
α = 120◦
vv2
vv3
α=
126.4◦
vv4
vv4
v
vw1
v u2 v u3 vu4 vu5
β= O
u
107.2◦ vv1 M
u
vv3
γ
= 126.4◦
vv5
vv5
(b)
v
(c)
Fig. 6.3: A 4.16-kV motor drive based on a cascade PWM inverter [154]. (a) Power circuit, (b) Normal operation with no faulty
converter cell, and (c) Balanced operation with one faulty converter
cell in u-phase.
voltage injection to allow the cascade converter produce a three-phase balanced lineto-line voltage at the ac side and achieve SOC balancing of all the remaining healthy
battery units during a converter-cell failure.
Chapter 6 Fault-Tolerant Control
Q1
Q3
Q2
Q4
90
(a)
Q1
Q3
Q2
Q4
(b)
Fig. 6.4: Methods for bypassing a faulty converter cell. (a) Using
thyristor switches, and (b) Using a bypass contactor.
6.5
Methods of Bypassing a Faulty Converter Cell
In a battery energy storage system as shown in Fig. 4.1, when a power switching device
or a battery unit is detected to be faulty or the fuse in series with the battery unit (not
shown in Fig. 4.1) blows, the corresponding converter cell is bypassed immediately by
short-circuiting its ac terminals.
Fig. 6.4 shows two methods for bypassing the faulty converter cell, where (a) uses a set
of two thyristor switches [151] while (b) uses a bypass contactor [154] to short-circuit its
ac terminals. Note that it does not matter which power switching device in the converter
cell gets faulty, as long as the faulty converter cell can be detected.
Fig. 6.5 shows another method of bypassing the faulty converter cell, which is used in
the dissertation. It requires no additional bypass switch and exploits the failure state of
a power switching device to bypass the faulty converter cell [155]. For example, if Q1
fails in short mode, Q3 is given the on-signal, while the two bottom switches Q2 and Q4
are given the off-signal, thus effectively bypassing the faulty converter cell.
Chapter 6 Fault-Tolerant Control
on
91
on
Q1
Q3
Q2
Q4
off
off
Fig. 6.5: Method for bypassing a faulty converter cell used in the
dissertation, which exploits the failure state of the power switching
device.
6.6
Fault-Tolerant Control
This section describes the proposed fault-tolerant control. During a converter-cell or
battery-unit failure, the fault tolerant control
• maintains continuous operation producing a three-phase balanced line-to-line ac
voltage, and
• achieves SOC balancing of the remaining 3N − 1 healthy battery units.
Fig. 6.6 shows the detailed block diagram of the fault-tolerant control in Fig. 4.4,
considering a single-converter-cell fault. During normal operation, switches SW1 and
SW2 are closed at position 1. When the converter-cell fault occurs, the switches move
to position 2, enabling the fault-tolerant control. The core of the control is the injection
of fundamental-frequency zero-sequence voltage v0f to achieve neutral shift.
Let us assume for simplicity that the dc voltages and SOC values of the 3N battery
units be balanced. Because the modulation indices of the 3N converter cells get equal
for normal operation, the ac voltages of the n-th converter cells in the three clusters can
be represented as
vun = mi vDC sin ωt
vvn
vwn
2π
= mi vDC sin(ωt −
)
3
2π
= mi vDC sin(ωt +
),
3
where mi is the modulation index, and n = 1, 2, · · · N .
(6.1)
(6.2)
(6.3)
Chapter 6 Fault-Tolerant Control
0
vun
Position 1
Position 1
2
92
00
vun
2
0
vvn
00
vvn
0
vwn
00
vwn
SW1
SW2
Unity gain for healthy phase
Gain of
v0f
N
N −1
for faulty phase
Unity gain for healthy phase
×
Gain of

sin ωt
sin(ωt −

sin(ωt +
2π
3 )
2π
3 )
N
N −1
for faulty phase
for u-phase fault
for v-phase fault
for w-phase fault
Fig. 6.6: Block diagram of the fault-tolerant control riding through
a single-converter-cell fault.
Fig. 6.7(a) shows the phasor diagram of (6.1), (6.2), and (6.3) for N = 3. In the
following, it is assumed that the u-phase converter cell numbered 1 is out of order.
Therefore, it is bypassed.
vu1 = 0.
■ Without Neutral Shift
(6.4)
Since the value of vDC in (6.1)–(6.3) depends on the
battery-unit dc voltage, the modulation index mi of the N − 1 healthy converter cells in
the u-phase should be increased by a factor of N/(N − 1) so as to maintain a three-phase
balanced line-to-line voltage.
N
mi vDC sin ωt
N −1
2π
)
= mi vDC sin(ωt −
3
2π
),
= mi vDC sin(ωt +
3
vun =
(6.5)
vvn
(6.6)
vwn
(6.7)
Chapter 6 Fault-Tolerant Control
w
w
vw3
vw3
vw2
vw2
vw1
vv1
v u1
v u2
vu3
O (M)
vv1
vu2
O (M)
vu3
u
vv2
vv2
vv3
vv3
v
(vu1 = 0)
vw1
u
93
v
(a)
w
(b)
vw3
vw2
Injection of
zero-sequence voltage
vw1
O
M
(vu1 = 0)
vu2
vu3
u
vv1
O: Neutral point of the source
vv2
v
M: Neutral point of the cascade converter
vv3
(c)
Fig. 6.7: Phasor diagrams of converter-cell voltages with a cascade
number N = 3. (a) During normal operation, (b) During a fault
in the u-phase converter cell numbered 1 without zero-sequence
voltage injection, and (c) During a fault in the u-phase converter cell
numbered 1 with the injection of zero-sequence voltage. Note that
the modulation indices of the u-phase converter cells were increased
by a factor of 1.5 in (b) and (c). They, however, got reduced in (c)
due to the injection of zero-sequence voltage.
where n = 2, 3, · · · N for the u-phase, while n = 1, 2, · · · N for the v-and w-phases.
Fig. 6.7(b) shows the phasor diagram of (6.5), (6.6), and (6.7) for N = 3. The increase
in ac voltages in the u-phase puts an additional burden on the N − 1 healthy battery
units in the u-phase, resulting in a non-negligible degree of SOC imbalance between the
N − 1 battery units in that phase and 2N battery units in the other two phases.
Chapter 6 Fault-Tolerant Control
■ With Neutral Shift
94
This subsection describes a neutral shift to share the burden
of the 3N − 1 healthy battery units equally, balancing their SOC values. The neutral
shift is based on the injection of a fundamental-frequency zero-sequence voltage to each
ac voltage of the healthy converter cells. The zero-sequence voltage is chosen to be out of
phase by 180◦ with the u-phase cluster voltage where a single-converter-cell fault occurs.
Note that the idea of zero-sequence voltage injection itself is not new. For example,
Betz et al. [143] investigated the injection of zero-sequence voltage/current for capacitorvoltage balancing in a cascade-converter-based STATCOM intended for negative-sequence
compensation of three-phase line currents. Moreover, the author has used zero-sequence
voltage injection for the clustered SOC-balancing control in chapter 5.
The ac voltages of the healthy converter cells can then be expressed as
N
N
vun =
mi vDC sin ωt −
v0f sin ωt
N −1
N −1
2π
vvn = mi vDC sin(ωt −
) − v0f sin ωt
3
2π
vwn = mi vDC sin(ωt +
) − v0f sin ωt,
3
(6.8)
(6.9)
(6.10)
where the second term on the right-hand side of each equation is the zero-sequence
voltage injected.
Fig. 6.7(c) shows the phasor diagram of (6.8), (6.9), and (6.10) for N = 3. Let the
three-phase line currents be balanced as
√
iu = 2 I sin ωt
√
2π
iv = 2 I sin(ωt −
)
3
√
2π
iw = 2 I sin(ωt +
).
3
(6.11)
(6.12)
(6.13)
The input electric power to each converter cell is given by
pu1 = 0
Z
pun =
(6.14)
2π
ω
vun iu dt
0
√
π 2 N
(mi vDC − v0f )I; for n = 2, 3, · · · N
=
ω N −1
Z 2π
ω
pvn =
vvn iv dt
0
√
v0f
π 2
(mi vDC +
)I; for n = 1, 2, · · · N
=
ω
2
(6.15)
(6.16)
Chapter 6 Fault-Tolerant Control
Z
2π
ω
pwn =
95
vwn iw dt
0
√
π 2
v0f
=
(mi vDC +
)I; for n = 1, 2, · · · N.
ω
2
(6.17)
These powers (pu2 , pu3 , · · · pw3 ) absorbed by the 3N − 1 healthy battery units should be
equal to achieve SOC balancing during the converter-cell fault.
pun = pvn = pwn .
(6.18)
From (6.15) to (6.18), the following equation can be derived.
v0f =
2
mi vDC .
3N − 1
(6.19)
This indicates that in spite of the existence of the single faulty and bypassed converter
cell in the u-phase, the 3N − 1 powers would be equal if the fundamental-frequency
zero-sequence voltage, given by (6.19) and being out of phase by 180◦ with the u-phase
voltage, is injected. Although the injection of zero-sequence voltage causes such a neutral
shift as shown in Fig. 6.7(c), the fundamental components of the three-phase line-to-line
voltages produced by the cascade converter remain balanced.
From (6.19), for a cascade number N = 3, the zero-sequence voltage is given by
v0f =
1
mi vDC .
4
(6.20)
Substituting (6.20) into (6.8), (6.9) and (6.10) yields
vun = 1.125 mi vDC sin ωt
(6.21)
vvn = 1.145 mi vDC sin(ωt − 130.9◦ )
(6.22)
vwn = 1.145 mi vDC sin(ωt + 130.9◦ ).
(6.23)
This means that the modulation index mi is increased by a factor of 1.125 in the u-phase
and 1.145 in the v- and w-phases during the single-converter-cell fault in the u-phase.
Without neutral shift, it would have to be increased by a factor of 1.5 in the u-phase in
order to maintain a three-phase balanced line-to-line voltage.
When the cascade converter is used for a medium-voltage battery energy storage system, the cascade number may be as high as six or more. If N = 10, for example, the
modulation index is increased by a factor of less than 1.05 during a converter-cell fault
Chapter 6 Fault-Tolerant Control
96
if the neutral shift described in this subsection is used. This concludes that such a small
voltage margin of the battery units and converter cells allows the battery energy storage
system to be operated at the rated voltage and power even during the occurrence of a
single-converter-cell fault.
Note that if the single-converter-cell fault occurs in the v-phase, the zero-sequence
voltage given by (6.19) is chosen to be out of phase by 180◦ with the v-phase cluster
voltage.
2π
)
3
N
2π
N
2π
=
mi vDC sin(ωt −
)−
v0f sin(ωt −
)
N −1
3
N −1
3
2π
2π
= mi vDC sin(ωt +
) − v0f sin(ωt −
).
3
3
vun = mi vDC sin ωt − v0f sin(ωt −
(6.24)
vvn
(6.25)
vwn
(6.26)
For N = 3, the resulting ac voltages of the healthy converter cells would then be
vun = 1.145 mi vDC sin(ωt + 10.9◦ )
(6.27)
vvn = 1.125 mi vDC sin(ωt − 120◦ )
(6.28)
vwn = 1.145 mi vDC sin(ωt + 109.1◦ ).
(6.29)
Similarly, if the single-converter-cell fault occurs in the w-phase, the zero-sequence
voltage given by (6.19) is chosen to be out of phase by 180◦ with the w-phase cluster
voltage.
vun = mi vDC sin ωt − v0f sin(ωt +
2π
)
3
2π
2π
) − v0f sin(ωt +
)
3
3
N
2π
N
2π
=
mi vDC sin(ωt +
)−
v0f sin(ωt +
).
N −1
3
N −1
3
(6.30)
vvn = mi vDC sin(ωt −
(6.31)
vwn
(6.32)
For N = 3, the resulting ac voltages of the healthy converter cells would then be
vun = 1.145 mi vDC sin(ωt − 10.9◦ )
(6.33)
vvn = 1.145 mi vDC sin(ωt − 109.1◦ )
(6.34)
vwn = 1.125 mi vDC sin(ωt + 120◦ ).
(6.35)
Multilevel cascade converters are, thus, capable of maintaining continuous operation
even during the converter-cell fault. To take advantage of this property, however, it is
Chapter 6 Fault-Tolerant Control
97
important to detect the faulty converter cell as soon as possible. Fault detection in multilevel converters has been investigated in literatures [149], [150], [160]–[162]. Turpin et
al. [149] and Richardeau et al. [150] have used switching frequency analysis of phase
voltage in order to identify the fault in a flying-capacitor converter. The technique could
detect the fault in few sample times. Son et al. [160] compared the current-vector pattern of faulty operation with that of normal operation in order to identify the fault in a
neutral-point clamped converter. Khomfoi et al. [161] proposed a neural-network-based
method that identified the type and location of fault in a cascade-converter-based drive
from its voltage measurement. Recently, Lezana et al. [162] have used the frequency
analysis technique described in [149] and [150] for accurate and faster detection of the
fault in the cascade PWM converter.
6.7
Experimental Results
Fig. 6.8 shows experimental waveforms during fault-tolerant operation, in which the
u-phase converter cell numbered 1 was bypassed by turning on the two upper IGBTs
and turning off the two bottom IGBTs. The remaining eight battery units were charged
at 10 kW with a mean SOC value of 65% in Fig. 6.8(a), while they were discharged
at 10 kW with a mean SOC value of 69% in Fig. 6.8(b). Losing the converter cell in
the u-phase brought an increase in switching ripples to the line currents iu , iv , and iw .
This can be observed by comparing the line current waveforms in Fig. 6.8 with those in
Figs. 5.11 and 5.12. Generally, the fault-tolerant operation would last for a short period
of time until the converter cell is repaired.
Fig. 6.9(a) shows transient waveforms during charging before and after the u-phase
converter cell numbered 1 was bypassed. The mean SOC value was 67%. Fig. 6.9(b)
shows those before and after it was restored to the normal operation. The mean SOC
value was 69%. These experimental waveforms verify smooth transition from the normal
operation to the fault-tolerant operation, and vice versa.
Fig. 6.10 shows various voltage waveforms at the ac side of the cascade converter
during normal discharging operation, while Fig. 6.11 shows those during fault-tolerant
operation both at the rated power of 10 kW. The three u-phase converter-cell ac voltages
Chapter 6 Fault-Tolerant Control
200
vSO [V]
0
60
i [A]
vDC [V]
vDCu1 [V]
iu
iv
iw
0
Eight traces
90
80
70
60
90
80
70
60
10 ms
(a)
200
vSuO [V]
0
60
iu [A]
vDC [V]
vDCu1 [V]
iu
iv
iw
0
90
80
Eight traces
70
60
90
80
70
60
10 ms
(b)
Fig. 6.8: Experimental waveforms when the u-phase converter cell
numbered 1 was bypassed while the remaining eight battery units
were being charged or discharged. (a) Charged at 10 kW with a
mean SOC value at 65 %, and (b) Discharged at 10 kW with a mean
SOC value at 69%.
98
Chapter 6 Fault-Tolerant Control
99
The u-phase converter cell
numbered 1 was bypassed
200
vSO [V]
0
60
i [A]
0
90
vDC [V]
10 ms
-
iv iw iu
Nine traces
85
80
vDCu1
75
(a)
The u-phase converter cell
numbered 1 was restored
200
vSO [V]
0
60
i [A]
10 ms
-
iu iv iw
0
90
vDC [V]
Nine traces
85
80
vDCu1
75
(b)
Fig. 6.9: Transient waveforms during charging at 10 kW. (a) When
the u-phase converter cell numbered 1 was bypassed with a mean
SOC value of 67%, and (b) When the u-phase converter cell numbered 1 was restored with a mean SOC value of 69%.
(vu1 , vu2 and vu3 ) and the v-phase converter-cell ac voltage (vv1 ) were picked up as representatives. These as well as the other five ac converter-cell voltages (vv2 , vv3 , · · · vw3 )
were three-level waveforms during normal operation. Note that the ac voltage vu1 was
Chapter 6 Fault-Tolerant Control
300
vu1 [V]
0
20 ms
300
vu2 [V]
0
300
vu3 [V]
0
300
vv1 [V]
0
(a)
20 ms -
300
vuM [V]
0
300
vvM [V]
0
300
vwM [V]
0
KA
A
A
A
A
Z
}A
A Seven-level waveforms
Z
(b)
20 ms -
600
vuv [V]
0
600
vvw [V]
0
600
vwu [V]
0
(c)
Fig. 6.10: Experimental voltage waveforms at the ac side of the
cascade converter during normal operation at 10 kW in discharging. (a) Four converter-cell ac voltages, (b) Three line-to-neutral
voltages, and (c) Three line-to-line voltages.
100
Chapter 6 Fault-Tolerant Control
300
vu1 [V]
0
300
vu2 [V]
0
20 ms
300
vu3 [V]
0
300
vv1 [V]
0
(a)
Five-level waveform
300
vuM [V]
0
20 ms -
300
vvM [V]
0
300
vwM [V]
@
I
@ Seven-level waveforms
0
(b)
20 ms -
600
vuv [V]
0
600
vvw [V]
0
600
vwu [V]
0
(c)
Fig. 6.11: Experimental voltage waveforms at the ac side of the cascade converter during fault-tolerant operation at 10 kW in discharging. (a) Four converter-cell ac voltages, (b) Three line-to-neutral
voltages, and (c) Three line-to-line voltages.
101
Chapter 6 Fault-Tolerant Control
102
zero in Fig. 6.11(a). The three line-to-neutral voltages were seven-level waveforms in the
normal operation, whereas the u-phase voltage was degraded to a five-level waveform
in the fault-tolerant operation. Although the fundamental components of the line-toneutral voltages are not balanced, those of the line-to-line voltages vuv , vvw , and vwu in
Fig. 6.11(c) were well balanced.
6.8
SOC Balancing During Fault-Tolerant Operation
Figs. 6.12 and 6.13 were taken to verify the effectiveness of the fault-tolerant control in
achieving SOC balancing of the eight healthy battery units during a single-converter-cell
fault. Fig. 6.12 shows SOC waveforms without fault-tolerant control. Initially, all the
nine SOC waveforms were balanced. At t = 0, the u-phase converter cell numbered 1 was
bypassed and the modulation indices of the remaining two converter cells in the u-phase
were increased by a factor of 1.5 so as to produce a three-phase balancing line-to-line
voltage. This made the two battery units numbered 2 and 3 in the u-phase charged and
discharged faster than the other six battery units in the v- and w- phases. As a result,
a serious SOC imbalance was created between the two battery units in the u-phase and
the six battery units in the other two phases. As explained earlier, the SOC imbalance
is undesirable because it reduces the total available capacity of the remaining healthy
battery units. The waveforms were observed at 10 kW with a mean SOC window between
50 and 70%.
Fig. 6.13 shows SOC waveforms when the fault-tolerant control was enabled. Initially,
all the nine battery units were operating at 10 kW with a mean SOC window between
50 and 70%. At t = 0, the u-phase converter cell numbered 1 was bypassed and the
fault-tolerant control was enabled. The remaining eight converter cells were repetitively
charged and discharged at 10 kW. It is clear from the waveforms that the fault-tolerant
control is effective in balancing the SOC values of all the 3N − 1 healthy battery units
during a single-converter-cell fault.
Chapter 6 Fault-Tolerant Control
80
SOCun
SOCvn
SOCwn
[%]
60
50
@
I
@
40
Fig.
The u-phase converter cell numbered 1
was bypassed
SOCu2 and SOCu3
@
@
R
70
103
t=0
SOCu1
Six traces
1 min
6.12: Experimental SOC waveforms with no fault-tolerant
control, when the u-phase converter cell numbered 1 was bypassed
while the remaining eight battery units were charged at 10 kW.
80
SOCun
SOCvn
SOCwn
[%]
The u-phase converter cell numbered 1 was
bypassed
Eight traces
70
60
50
40
@
I
@
t=0
SOCu1
5 min
Fig. 6.13: Experimental SOC waveforms with the fault-tolerant
control, when the u-phase converter cell numbered 1 was bypassed
while the remaining eight battery units were repetitively charged
and discharged at 10 kW.
6.9
Simulation Results
Figs. 6.14-6.16 show EMTDC/PSCAD simulation results. Simulation was carried out
under the same operating conditions as the experiment. Fig. 6.14(a) shows simulation
waveforms during charging at 10 kW before and after the u-phase converter cell numbered 1 was bypassed, while Fig. 6.14(b) shows those before and after the converter cell
was restored to the normal operation. Losing the converter cell in the u-phase brought
an increase in switching ripples to the line currents iu , iv , and iw , which is similar to the
experimental results in Fig. 6.9.
Chapter 6 Fault-Tolerant Control
104
The u-phase converter cell
numbered 1 was bypassed
200
vSO [V]
0
60
i [A]
0
90
vDC [V]
10 ms
-
iv iw iu
85
Nine traces
80
vDCu1
75
(a)
The u-phase converter cell
numbered 1 was restored
200
vSO [V]
0
60
i [A]
10 ms
-
iu iv iw
0
90
vDC [V]
Nine traces
85
80
vDCu1
75
(b)
Fig. 6.14: Simulation waveforms during charging at 10 kW. (a)
When the u-phase converter cell numbered 1 was bypassed, and (b)
When the u-phase converter cell numbered 1 was restored.
Fig. 6.15 shows simulation waveforms of various voltages at the ac side of the cascade
converter during normal operation, while Fig. 6.16 shows those during fault-tolerant
operation. The simulation waveforms in Figs. 6.15 and 6.16 matched the experimental
waveforms in Figs. 6.10 and 6.11, respectively.
Chapter 6 Fault-Tolerant Control
300
vu1 [V]
0
20 ms
300
vu2 [V]
0
300
vu3 [V]
0
300
vv1 [V]
0
(a)
20 ms -
300
vuM [V]
0
300
vvM [V]
0
300
vwM [V]
0
KA
A
A
A
A
ZA
}
ZA Seven-level waveforms
(b)
20 ms -
600
vuv [V]
0
600
vvw [V]
0
600
vwu [V]
0
(c)
Fig. 6.15: Simulation voltage waveforms at the ac side of the cascade converter during normal operation at 10 kW in discharging.
(a) Four converter-cell ac voltages, (b) Three line-to-neutral voltages, and (c) Three line-to-line voltages.
105
Chapter 6 Fault-Tolerant Control
300
vu1 [V]
0
300
vu2 [V]
0
20 ms
300
vu3 [V]
0
300
vv1 [V]
0
(a)
300
vuM [V]
0
20 ms -
300
vvM [V]
0
300
vwM [V]
Five-level waveform
0
@
I
@ Seven-level waveforms
(b)
20 ms -
600
vuv [V]
0
600
vvw [V]
0
600
vwu [V]
0
(c)
Fig. 6.16: Simulation voltage waveforms at the ac side of the cascade converter during fault-tolerant operation at 10 kW in discharging. (a) Four converter-cell ac voltages, (b) Three line-to-neutral
voltages, and (c) Three line-to-line voltages.
106
Chapter 6 Fault-Tolerant Control
6.10
107
Summary
This chapter has described fault-tolerant control for a battery energy storage system
based on a cascade PWM converter with star configuration. It is based on a combination of converter-cell bypass and neutral shift. During a converter-cell or battery-unit
failure, it enables the cascade converter to maintain continuous operation, producing a
three-phase balanced line-to-line voltage and achieving SOC balancing of the remaining
healthy battery units. Experimental results based on a 200-V system have verified the
effectiveness of the proposed fault-tolerant control.
108
Chapter 7
Active-Power Control of Individual
Converter Cells
This chapter presents an active-power control of individual converter cells for the
cascade-converter-based battery energy storage system. The control is based on neutral
shift and enables the multiple battery units in the cascade converter to operate at different power levels while producing a three-phase balanced line-to-line voltage. Theoretical
analysis is done and experimental results are presented to verify the effectiveness of the
control method.
7.1
Background
Production tolerances, uneven temperature conditions and differences in ageing characteristics may eventually lead to different power-handling capacities of the multiple
battery units in a cascade-converter-based battery energy storage system. Differences in
power-handling capacities may also occur when, for example, one of the 3N battery units
in the cascade converter is replaced by a new one. For maximum utilization of battery
energy, it would then be necessary to operate one or more battery units at reduced or
increased power levels.
Chapter 7 Active-Power Control of Individual Converter Cells
7.2
109
Control Method
Fig. 7.1 shows the block diagram of two active-power controls for the battery energy
storage system based on a cascade PWM converter:
1. active-power control of the whole converter cells (represented by dashed lines),
and
2. active-power control of individual converter cells (represented by solid lines).
The first one controls the total active power and has been explained in chapter 5. The
active-power control of individual converter cells, on the other hand, regulates the power
of each converter cell (Pun , Pvn , and Pwn ). Its main function is to calculate the amplitude
∗
∗
∗
, · · · , Pw3
, Pu2
Pu1
9
∗
Pun
P
P
id
∗
p
iq
q∗
(=0)
vSvO
vSwO
iu
iv
Calculation of
zero-sequence
voltage
÷
∗
vuM
Activepower
control
(Fig. 5.1)
∗
vvM
∗
vwM
iw
Active-power control of
the whole converter cells
×
∗
Pwn
P
P
Pw∗
Pv∗
Pu∗
∗
v0a
vSuO
∗
Pvn
÷
÷
∗
Pun
Pu∗
∗
vun
∗
Pvn
Pv∗
×
∗
Pwn
Pw∗
×
∗
vvn
∗
vwn
(n = 1, 2, and 3)
Active-power control of
individual converter cells
Fig. 7.1: Block diagram of the active-power control of individual
converter cells (represented by solid lines). The part represented by
dashed lines is the active-power control of the whole converter cells.
For simplicity, the SOC-balancing control and the fault-tolerant
control are not included.
Chapter 7 Active-Power Control of Individual Converter Cells
110
√
∗
) so that its injection
( 2 V0a ) and phase angle (φ0a ) of the zero-sequence voltage (v0a
produces a three-phase balanced line-to-line voltage in spite of operating the 3N converter
cells at different power levels. For simplicity, the SOC-balancing control and the faulttolerant control are not included in Fig. 7.1.
∗
∗
∗
Let Pun
, Pvn
, and Pwn
be the power commands to the 3N converter cells, where
n = 1, 2, · · · N . The three cluster power commands (Pu∗ , Pv∗ , and Pw∗ ) are given by

 ∗  ∗
∗
∗
Pu1 + Pu2
+ · · · + PuN
Pu
 ∗  ∗
∗
∗ 
+ · · · + PvN
(7.1)
Pv  =  Pv1 + Pv2
.
∗
∗
∗
Pw∗
Pw1
+ Pw2
+ · · · + PwN
Each of the cluster power command can be considered as a sum of two components as
follows:




∗
Pu∗
∆P
u
 ∗ P ∗ 

+ ∆Pv∗  ,
Pv  =
3
Pw∗
∆Pw∗
(7.2)
where P ∗ = Pu∗ + Pv∗ + Pw∗ . The first term on the right-hand side of (7.2) is the active
power due to positive-sequence voltage. The second term is the active power due to
zero-sequence voltage and, from (5.27), it is given by



cos(φ0a − θ)
∗
∆Pu



cos(φ − θ + 2π )
∗
0a
.
∆Pv  = V0a I 
3 


2π
∗
∆Pw
cos(φ0a − θ −
)
3
Solving (7.3) for V0a and φ0a results

1 ∆Pv∗
2

−1 √

+
if ∆Pu∗ 6= 0
tan



2 ∆Pu∗
3



π
φ0a − θ =
if ∆Pu∗ = 0 and ∆Pv∗ > 0

2





π

−
if ∆Pu∗ = 0 and ∆Pv∗ < 0
2
V0a =
∆Pu∗
.
I cos(φ0a − θ)
The zero-sequence-voltage reference is determined as
√
∗
= 2 V0a sin(ωt + φ0a ).
v0a
(7.3)
(7.4)
(7.5)
(7.6)
Chapter 7 Active-Power Control of Individual Converter Cells
∗ 0
Pun
∗
Pun
K2 +
Control
(Fig. 7.1)
∗
vun
u-phase n-th
converter cell
111
Pun
K2
sT2
Fig. 7.2: Feedback loop (taking u-phase as an example) used in the
experiment to make the converter-cell powers at the dc side (Pun )
∗
equal to the respective commands at the ac side (Pun
) regardless of
the converter-cell losses.
Finally, the modulating signals to the 3N converter cells are determined as
P∗
∗
∗
∗
vun
= (vuM
+ v0a
) un
Pu∗
P∗
∗
∗
∗
vvn
= (vvM
+ v0a
) vn
Pv∗
P∗
∗
∗
∗
vwn
= (vwM
+ v0a
) wn
.
Pw∗
(7.7)
(7.8)
(7.9)
Note that when the power-handling capacities of all the 3N battery units are equal,
∗
∗
∗
their active-power commands are also equal (Pun
= Pvn
= Pwn
), and therefore, the modu-
lating signals would be solely determined by the active-power control of whole converter
cells as follows:
∗
vuM
N
v∗
= vM
N
∗
vwM
=
.
N
∗
vun
=
(7.10)
∗
vvn
(7.11)
∗
vwn
(7.12)
The active-power control of individual converter cells is basically a feedforward control.
However, a feedback loop, as shown in Fig. 7.2, is used in the experiment to make the 3N
converter-cell powers at the dc side (Pun , Pvn , and Pwn ) equal to the respective commands
∗
∗
∗
) regardless of the converter-cell losses. The proportional
, and Pwn
, Pvn
at the ac side (Pun
gain K2 and the integral time constant T2 of the PI controller in the feedback loop are
set as follows:
K2 = 0.1 W/W, T2 = 10 s.
For simplicity, the feedback loop is neglected from the above analysis.
(7.13)
Chapter 7 Active-Power Control of Individual Converter Cells
7.3
112
Experimental Results
Table 7.1 summarizes five modes of operation of the experimental system. For each
mode, it gives the nine converter-cell power commands, and shows the theoretical values
of amplitude and phase angle of the corresponding zero-sequence voltage (v0a ). The
zero-sequence voltage is determined in such a way as to produce a three-phase balanced
line-to-line voltage in spite of operating the nine converter cells at different power levels.
Table 7.1: Five modes of operation, each of which has a different
set of converter-cell power commands, and its corresponding theoretical zero-sequence voltage
Converter-cell power commands [kW]
Mode
∗
Pu1
∗
Pu2
∗
Pu3
∗
Pv1
∗
Pv2
∗
Pv3
∗
Pw1
∗
Pw2
∗
Pw3
I
1
1
1
1
1
1
1
1
II
0.5
1
1
1
1
1
1
III
0.5
1
1
0.5
1
1
IV
0.5
1
1
0.5
1
V
0.25
1
1
0.5
1
Zero-sequence
voltage (v0a )
√
2 V0a
φ0a
[V]
[rad]
1
0
-
1
1
19.2
−π
1
1
1
20.4
2π/3
1
0.5
1
1
0
-
1
0.5
1
1
11.3
−π
Fig. 7.3 shows experimental power waveforms of nine converter cells for the five modes
of operation in Table 7.1. The nine powers were measured at the dc sides by the respective battery management systems. Mode I represents the condition when the power
commands to all the nine converter cells were equal (1 kW each). From mode II to
mode V, one of the nine converter-cell power commands was reduced to 50% of its previous value in a ramp of 50 W/s.
Fig. 7.4 shows experimental waveforms for mode I. With equal power commands to
all the nine converter cells, the zero-sequence voltage should be theoretically zero as in
indicated in Table 7.1. However, due to the feedback loop of power in Fig. 7.2, a small
amount of zero-sequence voltage was observed. The zero-sequence voltage had a peak of
Chapter 7 Active-Power Control of Individual Converter Cells
1250
113
Mode I Mode II
Mode III
Mode IV
Mode V
-
-
-
-
-
1000
pun
pvn 750
pwn
[W] 500
Six traces
pu1
pv1
pw1
pu1
250
0
50 s
Fig. 7.3: Experimental power waveforms of the nine battery units
during five modes of operation of Table 7.1.
200
vSO [V]
0
50
i [A]
iu
iv
iw
0
20
v0 [V]
vSuO vSvO vSwO
10 ms
0
Fig. 7.4: Experimental waveforms during mode I.
2 V and was in phase with the u-phase current, which caused the u-cluster to draw an
additional power of 30 W. The THD of u-phase current iu was 4.0%.
Fig. 7.5 shows the experimental waveforms for mode II. With the power command
of u-phase converter-cell numbered 1 reduced to 0.5 kW, the zero-sequence voltage was
17 V in amplitude and out of phase by 180◦ with the u-phase voltage. A small difference
between experimental and theoretical values was caused again by the power feedback
Chapter 7 Active-Power Control of Individual Converter Cells
114
loop. The current THD was 4.8% in this case due to increased 1.6-kHz ripple.
Fig. 7.6 shows the experimental waveforms for mode III. The power command of vphase converter-cell numbered 1 was reduced to 0.5 kW while those of u-phase converter
cell numbered 1 and other seven converter cells were kept at 0.5 kW and 1 kW respectively. The resulting zero-sequence voltage was 18 V in amplitude and in phase with the
w-phase voltage. The current THD was 5% in this case.
200
vSO [V]
0
50
i [A]
vSuO vSvO vSwO
iu
iv
iw
0
20
v0 [V]
0
10 ms
Fig. 7.5: Experimental waveforms during mode II.
200
vSO [V]
0
50
i [A]
iu
iv
iw
0
20
v0 [V]
vSuO vSvO vSwO
10 ms
0
Fig. 7.6: Experimental waveforms during mode III.
Chapter 7 Active-Power Control of Individual Converter Cells
115
Fig. 7.7 shows the experimental waveforms for mode IV. With equal power commands
in the u-, v- and w-clusters (2.5 kW each), the resulting zero-sequence voltage should
theoretically be zero. A small amount of zero sequence voltage was, however, observed
as in mode I. The current THD was 4.6%.
Fig. 7.8 shows the experimental waveforms for mode V. The power command of uphase converter-cell numbered 1 was reduced to 0.25 kW while those of v- and w-phase
200
vSO [V]
0
50
i [A]
vSuO vSvO vSwO
iu
iv
iw
0
10 ms
20
v0 [V]
0
Fig. 7.7: Experimental waveforms during mode IV.
200
vSO [V]
0
50
i [A]
vSuO vSvO vSwO
iu
iv
iw
0
20
v0 [V]
0
10 ms
Fig. 7.8: Experimental waveforms during mode V.
Chapter 7 Active-Power Control of Individual Converter Cells
116
converter cells numbered 1 were kept at 0.5 kW and those of other six converter cells
were kept at 1 kW. The resulting zero-sequence voltage was 9 V in amplitude and out
of phase by 180◦ with the u-phase voltage. The current THD was 6%.
Since the same ac current flows through the three converter cells in a cluster, the
desired sharing of power between the three converter cells in the cluster is obtained by
proportionally controlling the ac voltages of the three converter cells. That means, taking
u-phase as an example, the following relation exists as indicated in (7.7):
Vu1
Vu2
Vu3
=
=
.
Pu1
Pu2
Pu3
(7.14)
∗
∗
vu1
and vu3
1
10 ms-
∗
vun
0
(a)
∗
vu3
1
∗
vun
0
∗
vu1
(b)
∗
vu3
1
∗
vun
0
∗
vu1
(c)
∗
vu3
1
∗
vun
0
(d)
1
∗
vun
∗
vu1
∗
vu3
0
∗
vu1
(e)
Fig. 7.9: Modulating signals (normalized by respective battery-unit
voltages) of u-phase converter cells numbered 1 and 3. (a) Mode I,
(b) Mode II, (c) Mode III, (d) Mode IV, and (e) Mode V.
Chapter 7 Active-Power Control of Individual Converter Cells
117
Fig. 7.9 shows modulating signals (normalized by respective battery-unit voltages that
were assumed equal) of u-phase converter cells numbered 1 and 3 for the five modes of
∗
operation. The power command (Pu3
) to the u-phase converter cell numbered 3 was kept
constant at 1 kW throughout the five modes of operation. Then, as the power command
∗
(Pu1
) to the u-phase converter cell numbered 1 was changed from 1 kW to 0.5 kW in
∗
∗
mode II, and again from 0.5 kW to 0.25 kW in mode V, the ratio of Vu1
to Vu3
changed
from 1 to 0.5 in mode II and from 0.5 to 0.25 in mode V, as expected.
10 ms-
20
iDCu1 [A]
0
(a)
20
iBu1 [A]
0
(b)
20
iDCu1 [A]
0
(c)
20
iDCu1 [A]
0
(d)
20
iDCu1 [A]
0
(e)
Fig. 7.10: Experimental waveforms of the battery current in the
u-phase converter-cell numbered 1. (a) Mode I, (b) Mode II, (c)
Mode III, (d) Mode IV, and (e) Mode V.
Chapter 7 Active-Power Control of Individual Converter Cells
118
Fig. 7.10 shows the battery-unit current iDCu1 of the u-phase converter cell numbered 1
for the five modes of operation. The battery current contains the 100-Hz component as
well as the 1.6-KHz component due to PWM.
7.4
Summary
This chapter has described an active-power control of individual converter cells for
the cascade-converter-based battery energy storage system. The control, which is based
on the neutral shift, has enabled the multiple battery units in the cascade converter
to operate at different power levels while producing a three-phase balanced line-to-line
voltage. The control method is particularly advantageous when production tolerances
and operating conditions result in different power-handling capacities of the multiple
battery units. It is also advantageous in cases when one or more battery units in the
cascade converter are replaced by the new ones. Experimental results have been provided
to verify the effectiveness of the proposed control method.
119
Chapter 8
Conclusion and Future Research
8.1
Conclusion
The dissertation has discussed a battery energy storage system based on a cascade
PWM converter with star configuration. Basic design concepts, with and without a linefrequency transformer, have been presented for the 6.6-kV system. The dissertation has
addressed three important issues, namely state-of-charge balancing control, fault-tolerant
control, and active-power control of individual converter cells, which are indispensable for
practical use of the battery energy storage system. A 200-V, 10-kW, 3.6-kWh laboratory
system based on a combination of a cascade PWM converter and NiMH battery units
has been designed, constructed and tested to verify the validity and effectiveness of the
proposed control methods.
■ Experimental Verification of SOC-Balancing Control
The SOC balancing
control, discussed in detail in chapter 5, helps to balance the state-of-charges of the
multiple battery units. The control is realized by dividing it into clustered SOC-balancing
control between the three phases and individual SOC-balancing control between the
converter cells in a phase. The clustered SOC-balancing control is based on neutral shift.
The neutral shift is achieved by injecting fundamental-frequency zero-sequence voltage
to the three clusters. The amplitude of zero-sequence voltages represents the degree of
SOC imbalance among the three clusters while its phase angle represents the distribution
of the SOC imbalance among the three clusters. The individual SOC-balancing control
regulates the power of converter cells in a phase without interfering with the active-power
Chapter 8 Conclusion and Future Research
120
control and the clustered SOC-balancing control. Theoretical analysis has been provided
and experimental results have been provided to verify the effectiveness of the proposed
SOC-balancing control.
■ Experimental Verification of Fault-Tolerant Control
The fault-tolerant con-
trol, discussed in detail in chapter 6, helps to enhance the reliability and availability
of the battery energy storage system. The control method is based on a combination
of converter-cell bypass and neutral shift. During a converter-cell or battery unit failure, it enables to maintain continuous operation of the system, producing a three-phase
balanced line-to-line voltage and achieving SOC balancing of remaining healthy battery
units. Moreover, with a small voltage margin of the battery units and converter cell, it
allows the battery energy storage system to be operated at the rated voltage and power
even during a single-converter-cell fault. As in clustered SOC-balancing control, the
neutral shift is based on the injection of fundamental-frequency zero-sequence voltage to
the three phases. Theoretical analysis has been provided to determine the magnitude
and phase of the zero-sequence voltage when a converter-cell fault occurs in the u-, v-,
or w-phase. Experimental results have verified the effectiveness of the control method.
■ Experimental Verification of Active-Power Control of Individual Converter
Cells The active-power control of individual converter cells, discussed in detail in chapter 7, enables the multiple battery units to operate at different power levels while producing a three-phase balanced line-to-line voltage. It is particularly advantageous when
power-handling capacities of multiple battery units differ due to manufacturing tolerances and operating conditions or due to the replacement of one or more battery units
by the new ones. Similar to the clustered SOC-balancing control and the fault-tolerant
control, it is also based on the neutral shift. Theoretical analysis has been provided
to determine the magnitude and phase of the zero-sequence voltage to be injected to
achieve the appropriate neutral shift. Experimental results have verified the validity of
the control method.
The dissertation has addressed three important issues of the battery energy storage
system based on a cascade PWM converter for its practical use. At present, the major
hurdle in developing a large-scale battery energy storage system is, however, the high
Chapter 8 Conclusion and Future Research
121
cost of the battery. Therefore, for the battery energy storage system to be economically
feasible, it need to be used for a number of applications (e.g. backup power, peak shaving,
frequency control, etc.) to generate sufficient revenue. Moreover, utility regulators need
to be educated on the economic and social benefits that the battery energy storage
systems can provide.
8.2
Future Research
■ Efficiency Estimation
The dissertation has not covered efficiency estimation of
the battery energy storage system. Future work is needed in this direction.
■ Li-ion Battery Based Systems
The battery energy storage system presented in
the dissertation is based on NiMH batteries. The NiMH batteries have energy densities
in the range of 30-80 Wh/kg and are currently being used in HEVs. However, Li-ion
batteries, with energy densities in the range of 50-130 Wh/kg, are being considered to be
promising alternatives to NiMH batteries for the next generation of HEVs. The eventual
choice of batteries for HEVs will have a huge impact on stationary battery systems of
many types, including battery energy storage system for power leveling of renewable
energy resources. Experimental verification of Li-ion based system is required.
■ Operation Under More Than One Converter-Cell Failures
The fault-tolerant
control presented in the dissertation can be extended to include the cases when more
than one converter cells fail. This enables the battery energy storage system to maintain
continuous operation producing a three-phase balanced line-to-line voltage in spite of
more than one converter-cell failures, thus significantly improving the reliability.
122
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List of Publications
Journals
[1] L. Maharjan, S. Inoue, and H. Akagi, “A transformerless energy storage system
based on a cascade multilevel PWM converter with star configuration,” IEEE
Transactions on Industry Applications, vol. 44, no. 5, pp. 1621-1630, Sep./Oct. 2008.
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control of a battery energy storage system based on a cascade PWM converter,”
IEEE Transactions on Power Electronics, vol. 24, no. 6, pp. 1628-1636, Jun. 2009.
[3] L. Maharjan, T. Yamagishi, H. Akagi, and J. Asakura, “Fault-tolerant operation
of a battery energy storage system based on a multilevel cascade PWM converter
with star configuration,” IEEE Transactions on Power Electronics (recommended
for publication with minor revisions)
International Conferences
[1] L. Maharjan, T. Yoshii, S. Inoue, and H. Akagi, “A transformerless energy storage
system based on a cascade PWM converter with star-configuration,” in Proc.
Power Conversion Conference (PCC’07), Nagoya, Japan, Apr. 2-5, 2007, pp.751757.
[2] L. Maharjan, S. Inoue, H. Akagi, and J. Asakura, “A transformerless battery energy storage system based on a multilevel cascade PWM converter,” in Proc. IEEE
Power Electronics Specialists Conference (PESC’08), Rhodes, Greece, Jun. 15-19,
2008, pp. 4798-4804.
[3] L. Maharjan, T. Yamagishi, H. Akagi, and J. Asakura, “Fault-tolerant control
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Proc. IEEE 6th International Power Electronics and Motion Control Conference
(IPEMC’09), Wuhan, China, May 17-20, 2009, pp. 945-950.
[4] L. Maharjan, T. Yamgishi, and H. Akagi, “Discussions on a battery energy storage
system based on a cascade PWM converter with star configuration,” in Proc.
International Power Electronics Conference (IPEC’10), Sapporo, Japan, Jun. 2124, 2010 (accepted)
Domestic Conference
[1] L. Maharjan, S. Inoue, and H. Akagi, “The next-generation 6.6-kV BTB (backto-back) system based on bi-directional isolated dc-dc converters,” in Proc. IEE
Japan Industry Applications Society Conference (JIASC’06), Nagoya, Aug. 21-23,
2006, vol. 1, pp. I.327-I.332.