MANIPULATION OF BOOLEAN FUNCTIONS
BASED ON DECISION DIAGRAMS
SIM POH CHING
A thesis submitted
in fulfillment ofthe requirements for the degree of
Master of Engineering
Faculty of Engineering
UNlVERSlTl MALAYSIA SARAWAK
2003
Dedicated to my Beloved Family and Friends
Thanks,foreverything ...
ACKNOWLEDGEMENTS
I would like to acknowledge the contribution of the following person that enabled me to
complete my thesis. I would like to thank my supervisor, Associate Professor
Dr. Mohamad Kadim Suaidi for the helpful comments and suggestions. I appreciate the
help, guidance and supervision on the project that he has given.
Also I would like to thank in particular the Ministry of Science, Technology and
Environment of Malaysia's National Science Fellowship (NSF) Grant and Universiti
Malaysia Sarawak in supporting this research work. Thanks to Dr. Lim Thiong Hieng
for his guide in getting the useful information and materials for my research studies.
Also, I am appreciative of the help and cooperation given by Miss Chin Kui Fern.
Last but not least, I would like to express my gratitude to my family and friends for their
help, support and encouragement.
TABLE OF CONTENTS
Page
...
ACKNOWLEDGEMENTS
111
TABLE OF CONTENTS
iv
LIST OF TABLES
vii
LIST OF FIGURES
Vlll
...
LIST OF ABBREVIATIONS
ix
LIST OF SYMBOLS
X
ABSTRAK
xi
ABSTRACT
xii
CHAPTER
1
INTRODUCTION
An Introduction to Digital System Design
1. I
1.1.I
Digital System
1.1.2 Digital System Design
1.1.3
A History of Digital System Design
1.1.4 A View of Modem Design Process
1.2
Representation Techniques
l ..i Manipulatio~i1cchniqur.s
ilypo~hcsisand Ob;cc~ivcsof Kcsrarch
1 .-I
1.5
Research Methodology
1.6
Chapter Summary
2
LITERATURE REVIEW
2.1
The Theory of Binary Switching Circuits
Boolean Algebra and Boolean Functions
2.1.1
2.1.2
Basic Switching Elements
2.2
Graph Theory and Decision Trees
2.2.1
The Mathematical Notion of a Graph
2.2.2
Decision Tree and Decision Diagrams
2.3
Binay Decision Diagrams
2.3.1
Binary Decision Tree and Its Properties
Reduced Ordered Binary Decision Diagrams
2.3.2
Deriving the Binary Decision Diagrams
2.3.2.1
2.3.2.2
Reducing the Binary Decision
Diagrams
Ordering of Binary Decision Diagrams
2.3.2.3
2.3.2.4
2.4
Complexity Characteristics of Binary
Decision Diagrams
Ternary Decision Diagrams
2.4.1
General Ternary Decision Diagrams
2.4.2
Kleene Ternary Decision Diagrams
2.4.2.1
The Properties of Kleene Ternary
Decision Diagrams
2.4.2.2
Evaluation of Logic Functions in the
Presence of Unknown Inputs
3
BDD SOFTWARE PACKAGE
3.1
Programmable Logic Array (PLA)
3.1 .I
Programmable Logic Device
3.1.2
Programmable Logic Array
3.1.3
Format of a PLA File
3.2
An Introduction to Visual C++ 6 Programming Language
3.3
Developed BDD Software Package
3.3.1
Tree Data Structure
3.3.2
Traversal
3.3.3
Composition
3.3.4
Reduction
4
RESULTS AND DISCUSSIONS
4.1
Performance of the BDD Software Package
4.1.1
Layout of the BDD Software Package
4.1.2
Computation Results
4.2
Observations and Discussions
4.2.1
Computation Results
4.2.2
Comparisons Between BDDs and Traditional
Methods
4.2.3
Limitations and Problems Arising
5
CONCLUSIONS AND RECOMMENDATIONS
5.1
Conclusions
5.2
Recommendations
BIBLIOGRAPHY
APPENDIX
A
PLA FILE COMMANDSIKEYWORDS DESCRIPTIONS
B
SOURCE CODE OF THE BDD SOVTWARE PACKAGE
B.1
String.h
8.2
Linked List.h
8.3
Tree.h
8.4
Decision DiagramView.cpp
B.5
PLADlg.cpp
C
PLA FILES FOR THE COMPUTATIONS
C.l
col4.pla
C.?
conlmin.pla
C.3
max46.pla
C.4
newill.pla
C.5
newtag.pla
D
THE BDD SOFTWARE PACKAGE
E
PUBLICATIONS
LIST OF TABLES
Page
Table
2.1
3.1
4.1
4.2
A
Behaviors and symbols of the switching elements
Field values for non-terminal and tenninal nodes
Sizes of the generated ROBDDs
Comparisons o f various representation techniques
Command directives
LIST OF FIGURES
Page
Figure
An example of a digital system
General process flow in current logic synthesis systems
General structure of a truth table
Karnaugh map for n = 1 , 2 , 3 , and 4
The logical operations of AND, OR and NOT
Block diagrams of combinational and sequential circuits
Graph mathematical notion
Rooted tree
Binary Decision Diagram (BDD)
The truth table and corresponding BDT with an example function
The process of deriving BDD using example function %I + %3X2
BDD reduction rule set
Reduction of decision tree to ROBDD
Example of argument ordering dependence
Ternary Decision Diagram (TDD)
Representation of a three-valued function
Kleene-TDD and ternary Alignment operation
Construction of Kleene-TDD with example function ~ 3 %+ XZXI
AND-OR network for example function x3t2+ xzxl
PLA array structure
Description of a .pla file
.pla file sample
Record for each node of the graph
Implementation of ordered tree traversal
The sequence of the node visited
The procedure clearMark
The process of generating nodes using a given .pla example file
The BDD composition process using a given .pla example file
Sketch ofthe code for BDD reduction procedure
Procedures IabelNode
Procedures composeTree
Laheling process with example
Reduction process following the labelling work
The developed BDD program interface
The "PLA File Import" dialog
PLA file
The result ROBDD
ROBDD for xor5.pla and the content of the tile
ROBDD for life.pla
ROBDD for max46.pla
ROBDD for newill.pla
ROBDD for syml0.pla
ROBDD for z9sym.pla
LIST OF ABBREVIATIONS
BDD
BDT
CAD
CPLD
DA
DAG
DCF
DD
EDA
EEPROM
EPROM
FLASH
FPlC
FPGA
GAL
HDL
MDD
MFC
OBDD
PAL
PLA
PLD
PROM
ROBDD
SBDD
SOP
SPLD
TDD
TTL
VLSl
Binary decision diagram
Binary decision tree
Computer aided design
Complex programmable logic device
Design automation
Directed acyclic graph
Disjunctive canonical form
Decision diagram
Electronic design automation
Electrically-erasable programmable read-only memory
Electrically programmable read-only memory
Flash-erased electrically-erasable programmable read-only memory
Field programmable inter connect
Field programmable gate array
Generic array logic
Hardware description language
Multiple-valued decision diagram
Microsofi foundation classes
Ordered binary decision diagram
Programmable array logic
Programmable logic array
Programmable logic device
~rogrammableread-only memory
Reduced ordered binary decision diagram
Shared binary decision diagram
Sum-of-product
Simple programmable logic device
Ternary decision diagram
Transistor-transistor logic
Very large scale integration
LIST OF SYMBOLS
-
-
-
-
-
-
-
Intersection (AND) operation
Union (OR) operation
Complementation (NOT) operation
EXOR operation
Alignment operation
Ternary vector
Arbitrary two-valued of a function
Minterm coefficient
Edge between two vertices
Shannon's expansion of the Boolean function
Graph function
Height of a complete binary tree
Index of a node in a tree
Mintermiproduct term
The number of input variables of a Boolean function
Tree graph
ArbiRary three-valued of a function
The truth value showing an unknown input
Vertex or node of a graph or tree
Node set
Input variable
ABSTRAK
Dalam rekaan sistem digit, perwakilan fungsi Boolean yang cekap merupakan aspek yang
diutamakan. Pengurusan persnmaan Boolean yang besar ialah suatu kerja yang merumitkan dari
segi ruangan fizikal dan kekompleksan masa. Maka, pengesahan, pemeriksaan dan teknologi
pemetaan memerlukan bukan sahaja penvakilan fungsi yang memadatkan, bahkan kehadiran
sesuatu algoritma yang berkesan bagi proses manipulasinya. Simplifikasi memainkan peranan
yang utama dalam usaha manipulasi fungsi Boolean. Teknik ini telah menjadi proses reka hentuk
yang penting dalam pelbagai aplikasi bagi reka bentuk terbantu komputer (CAD). Teknik-teknik
tradisional, misalnya jadual kebenaran, peta Karnaugh dan persamaan algebra, menemui
kegagalan apabila berhadapan dengan fungsi yang rumit. Ini disebabkan setiap penamhahan unit
masukan akan menghasilkan perwakilan saiz fungsi ydng mendadak.
Oleh yang demikian, satu penvakilan simbol yang dikenali sebagai decision diagram (DD) telah
dioerkenalkan. DD meruoakan teknik oerwakilan vana biasanva digunakan dalam oerisian CAD
mkmandangkan kemamiuannya uniuk mewakilkan fun& kompleks yang' mempunyai
oembolehubah vane
. -banvak.
. Idea untuk oerwakilan funesi Boolean sebaeai DD tersebar luas oada
gkhir dekad, dengan pengenalan ~ i n a ; Decision ~ i a b m
(BDD) olei Lee (1959) dan ~ k e r s
(1978). Bryant (1986) kemudian memperbaiki teknik perwakilan secara graf dengan
mengehadkan susunan pembolehubah masukan. DD telah mengatasi teknik-teknik penvakilan
lama dalam usaha mengurangkan penggunaan masa pengkomputeran dan ruang penyimpanan.
Pengunaan idea asas BDD berlanjutan. Pelbagai DD yang mempunyai peranan berbeza
dicadangkan, misalnya Ordered Binary Decision Diagram, Function Binary Ilecision Diagram,
Edge-valued Binary Decision Diagram, Shared Binary Decision Diagram, Mulfiple-valued
Decision Diagram, dan Ternary Decision Diagram.
Tesis ini memperihalkan sejarah ringkas rekaan sistem digit, pengajian fungsi Boolean, analisi
tentang haluan teknik penvakilan dan manipulasi, serta laporan tekoikal berkenaan perisian yang
dihasilkan. Selain itu, tesis ini menerangkan kerja-kerja mentakrif, menganalisis, dan
melaksanakan fungsi Boolean dengan penggunaan Dl). Teknik penvakilan berajah ini
membolehkan penaksiran fungsi Boolean secara brrkesan dalam komputer. Ciri-ciri pelbagai jenis
DD telah dikaji sebelum menghasilkan satu perisian bersamaan algoritma manipulasi yang cekap,
supaya memperolehi fungsi yang lebih ringkas. Struktur data dan algoritma penurunan perisian
turut dibincangkan. Perlaksanaan pcrisian dikaji dan ditunjukkan dengan penggunaan litar praktis,
LGSynth93 tandaan piawai. Keputusan yang diperolehi diperhati dan dibincang.
ABSTRACT
In digital system design, the major concern is the eflcient representation of a Boolean function.
Handling large Boolean equations is a complicated problem in lerms ofphysical space and time
complexirv.
testinp and technolow mapuina usually require that the
.
. Thus, the need of. verification,
.
function representation should not only be compact but also%ave-dn eSficientalg&-ithm for its
manioulation. Simolification
has been "justified
as an effective
maniuulation techniaue
of" Boolean
"
"
..
,
functions. I t became an essential design process in various application of computer-aided design
(CAD). The traditional methods, such as truth tables, Karnaugh maps and algebraic equations
have been proven to be quite impractical due to the fact that every increment of the Boolean
function input size couldyield afiinction with exponential representation.
.
Therefore, a symbolic representation known as decision diagram (DD) has been proposed. N is
commonly used as the representation techniques employed by CAD sofiare since they can
represent complex functions with many variables. The idea of representing Boolean functions as
decision diagrams has been widespread in the last decade, where Binary Decision Diagram
(BDD) has been introduced by Lee (1959) and Akers (1978). This graph-based function
repre.sentation is then developed by
~.Bryant (1986) with further restriction on the orderinp
- of
decision variables. Decision Diagram has advantage over the classical representation methods in
Over the vears, the basic
reducing the consummation of comuutation time and storage
. suace.
.
ideas of BDDs have been extended and a number ofvarieties of decision diagranrs have been
proposed, for example, Ordered Binary Decision Diagram, Function Binary Decision Diagram,
Edge-valued Binary Decision Diagram, Shared Binary Decision Diagram, Multiple-valued
Decision Diagram, and Ternary Decision Diagram.
~
This thesis provides a brief history of digital system design, an overview of the Boolean functions,
an analysis of the trends in representation and manipulation techniques, and a technical report on
the developed sofmare packaaes. I n addition, it describes a method of. definina,
.
., analvzina,
.
- and
implementing the Boolean function by decision diagram. This diagram representation enables the
evaluation o f a Boolearr function in a comoriter The characteristics ofdifferent
tvues of decision
"
diagrams are investigated in order to develop an eflcient general sopware package associated
with eflcient manipulation algorithms that can lead to simpler Boolean functions. The data
structure as well as the reduction algorithms of the developed package arc then defined and
discussed. The performance of this package is finally demonstrated by subjecting it to the
practical circuits, LGSynth93 standard benchmarks. The obtained computation results are
observed and discussed.
<-
..
.
CHAPTER 1
INTRODUCTION
1.1
An Introduction to Digital System Design
1.1.
Digital System
A system can be defined mathematically as a unique transformation or operator that
maps or transforms a given input condition into a specific output. A system that
processes analog signal (continuous) is termed as an analog system and a system that
processes digital signal (discrete) is termed as digital system. In recent years, hybrid
systems that are capable of processing mixed signals, that are both analog and digital
signals, are increasingly popular.
An analog signal can be converted into a digital signal by using analog-to-digital
converters (ADCs). The processed signal can then be converted back to its original form
by using the digital-to-analog converters (DACs). Due to these conversion stages,
digital systems cannot process analog signal as fast as an analog system could.
However, digital systems have several advantages over the analog system, which
includes non-degradable transmission and storage. Some signals that are digital in
nature, for example from switches keyboard, can be easily handled by digital systems.
A digital system is made up of a few to many digital circuits. It exhibits a hansforming
property on sequences of quantized data. Some examples of digital systems are
calculators, digital clocks, microprocessors, digital signal processors, personal
computers, high-fidelity (hi-fi) audio systems, hand-phones and so on. Figure 1.1 shows
a simple example of a special digital system, the binary-coded-decimal 7-segment
decoder driver.
Monsanto MANI, MANIA
"cc
A
PILIB
4-lc
~d
Decoder Driver
D
I
Vc.
a
b
c
d
BCD Input
Figure 1.1 An example of a digital system.
Lamp Ground
test
1.1.2
Digital System Design
Digital design, as treated in this text, is the field of study relating the adaptation of logic
concepts to the design of recognizable, realizable, and reliable digital hardware. Digital
design underpins the creation of the myriad of imaginative digital devices that surround
us. Such devices as digital computers, hand-held calculators, digital watches,
microprocessors, microwave oven controllers, and the host of others are all products of
digital design. The very basic digital design can be defined as the science of organizing
arrays of simple switches into what is called a discrete system that performs
transformations on two-level (binary) information in a meaningful and predictable way.
Combinations of switches form the basis of all of today's digital hardware. An
interconnected collection of switches is referred as a circuit. The designer's job is to
choose the right components to solve a design problem. Constraints in logic design are
often related to some combination of size, cost, performance, and power consumption.
Cost and size are very closely related. A component's complexity is determined not only
from all the switches it contains but more and more importantly from all the wire used
to connect the switches together. A component's size usually has a direct relationship to
the cost of manufacturing the component. Performance and power consumption are
determined by the particular arrangement of switches, the underlying materials from
which they are constructed, their size, and how fast they are switched on and off.
In digital design, the changes have been quite dramatic. Several important trends are
still at work. Firstly, the systems are becoming ever more complex as more functions are
integrated into a device and computations are performed over larger quantities of data.
Secondly, the design of today's digital system is happening in a much faster time frame
as the demands of consumer market place inexorable pressure on products to have a
wide range of features appropriate for different uses and situations. Third, and finally,
the cost of digital hardware has become so low and its performance so high that there is
no longer a need to be concerned with engineering the absolutely lowest cost solution. It
is becoming more and more impottant to design quickly and getting it right the first
time.
The field of digital system design has made great progress over the past decades. From
the early days of simple switching circuits to the present time of sophisticated very large
scale integration (VLSI) circuits, the designing of a today's digital system is advancing
to become a complex and multi-stage process. The techniques and algorithms of
representing, manipulating, simulating, placing, routing, manufacturing and testing are
continuously introduced and modified. Meanwhile, the number of devices and
technologies based on different logic families keep on growing.
As the size and complexity of digital system increase, more computer aided design
(CAD) tools are introduced into hardware design process. The early paper-and-pencil
design methods have given way to sophisticated design enhy, verification, and
automatic hardware generation tools. The use of interactive and automatic design tools
significantly increased the designer's productivity with an efficient management of the
design project and by automatically performing a huge amount of time-extensive tasks.
The designer heavily relies on software tools for nearly every aspect of the development
cycle, from the circuit specification and design entry to the performance analyses, layout
generation and verification.
The design process of today's digital system is becoming more complicated. It is
becoming less possible to design a system in a single step using a single design tool. It
is necessary to break the design process into several stages and each stage employs a
different design tool. Such multi-staged design processes may introduce the undesired
effect of requiring a system designer to learn and master the various design tools. Thus,
a highly automated design environment becomes less achievable. This is because the
design tool developers have to shive to increase the level of design automation without
compromising the final solution, whereas a design automation (DA) or computer aided
design (CAD) researcher can only focus his study on a specific area. Nevertheless,
researchers should try to keep abreast of the development of the entire design process, if
possible also the simulation, manufacturing and testing processes (which come after the
design process), so as to have a complete idea of developing an entire system.
1.1.3
A History of Digital System Design
In the mid Isthcentury, a mathematician named George Boole devised an alternative
algebra for describing logical statements in language and philosophy. This very abstract
form of mathematics is later known as the Boolean algebra, which takes its name from
the mathematician. However, no practical application was made of Boolean algebra
until the late 1930's due to its sophistication. In 1938, Claude Shannon, at the
Massachusetts Institute of Technology, applied the switching algebra, a special form of
Boolean algebra, to the analysis of networks of relays and established it in his master's
thesis. This was an important step in moving Boolean algebra from the realm of abstract
mathematical logic to physical devices. Digital design since that time has been pretty
much standard, following Boole's and Shannon's fundamentals, with added refinements
here and there as new knowledge has been unearthed and more exotic logic devices
have been developed.
The theory was then extended to cover both the combinational and sequential circuits in
the following one and half decades. Combinational switching networks are those
dependent only on the current inputs and it is without a memory. In sequential networks,
the outputs respond to both current inputs and the history of all previous inputs. The
system must remember the entire history of input patterns.
In the 19503, further development on the theory led to the finite-state machine theory
and then the automata theory; meanwhile simplification of switching functions became
an active area of research. This was because of the logic gates were then very expensive.
Also, Reed and Muller introduced Reed-Muller algebra. This form of expression has
now become very popular and useful in the study of AND-EXOR implementation of
Boolean functions.
The concept of design automation that allows larger and more complex digital system to
be designed wholly by computer became popular in the early 1960's. However, the
results obtained by design automation tools were not always satisfactory. Therefore, the
computer aided design (CAD) concept is then introduced. This allows designer to
intervene with the computerization process. Also in the 1960's, Quine and McCluskey
devised the tabulation method for simplifying Boolean function. In the late 1960's,
simplification became less essential than before because of a reduction in the cost of
logic gates.
Programmable logic arrays (PLAs) were introduced in the early 1970's and became very
desirable for implementing switching functions due to the fact that PLAs reduce design
time and can be designed automatically. PLAs are integrated circuit devices that have
very regular structures. An array of AND-gates and an array of OR-gates that exist in
the PLAs made possible with the advent of large scale integration (LSI) technology.
Hence, two-level implementation became popular. The physical area requirement of
PLAs to synthesise switching functions is directly linked to the size of the Boolean
functions, thus two-level simplification became an important area of research again.
1.1.4
A View of Modern Logic Design Process
In current logic synthesis system, the design process can be broken down into three
simpler independent design stages, the functional, structural and physical stages. Figure
1.2 depicts the general process flow in current logic synthesis systems.
Functional Design:
Physical Design:
realising the design
+
Manufacturing
and
Testing
I
I
Figure 1.2 General process flow in logic synthesis systems.
The first representation of a design is called specification, though it could also be called
a model. A switching circuit design is specified in the functional design stage using
tools such as hardware description language (HDL) or schematic capture. In recent
years, there has been a trend of moving towards the use of hardware description
language. The most prominent and widely use HDLs are Very High Speed Integrated
Circuit Hardware Description Language (VHDL) and Verilog. HDL allows a design to
be described in text form while schematic capture allows a design to be described in
graphic form. Once the specification has been written, the design is converted into a
mathematical description and passed on to the next design stage.
In the logic design stage, the mathematical representation of the design is manipulated
without modifying its functionality. Two major manipulation techniques are
simplification and partitioning techniques. The simplification techniques aim to produce
a simpler representation while partitioning techniques aim to break a large
representation into a set of smaller but equivalent representations.
A pre-layout simulation (with ideal consideration) may be run after the manipulation is
completed. If the results of the simulation are not satisfactory, the previous design
stages will have to be redone or the original specification may have to be changed.
However, if the results are satisfactory, the process will be continued by passing on the
representation to the final stage that is physical design stage.
In designing application specific integrated circuits (ASIC), the physical design stage
includes floor planning, placing and routing. Whereas, this stage includes defining the
various programmable logic blocks (placing) and programming the interconnections
(routing) in designing field programmable gate arrays (FPGAs) and complex
programmable logic devices (CPLDs). This stage only involves programming the
interconnections (routing) in designing programmable logic arrays (PLAs).
When the physical design stage is completed, a post-layout simulation (with practical
consideration) may be run. If the results are not satisfactory, a part of or the entire
design process will have to be redone. If the results are satisfactory, the design will be
sent for manufacturing. Following the manufacturing process comes the testing of
devices, which includes the testing of manufacturing faults and the design faults.
1.2
Representation Techniques
Various methods exist for representing the logic functions. In designing digital systems,
switching circuits are often represented using truth tables, algebraic expressions or
Karnaugh maps (K-maps). The efficiency of Boolean functions manipulation depends
on the form of representation techniques. Unfortunately, these haditional methods of
representation have been proven to be quite impractical in designing larger switching
circuits. This is because every increment of the Boolean function input size could yield
a function with exponential representation.
Truth table is the most fundamental concept and classical way of defining the operation
of'a switching circuit. This representation technique specifies every Boolean function
uniquely and completely. It is a listing of output values of the circuit for all possible
combinations of input values, as shown in Figure 1.3. The huth table of a function of n
variables has N = 2" rows. Each row contains a possible combination of input variables
and an assigned output value of the combination. The variable is denoted by logic 0 if it
is in complemented form and logic 1 if it is in hue form. If the number of inputs to the
circuit is increased by one, the number of possible combination doubles. This
exponential increase in storage requirement limits the truth table method of
representation from being used for defining large designs. However, due to its clarity, it
is often used to describe small circuits.
Figure 1.3 General structure of a truth table.
The algebraic equivalent of the truth table is the canonical form of expression. For an
algebraic function of n variables, there are N = 2" basic product terms called the
minterms m, = X&+~...X~,where x, (1 < i 5 N ) is a literal which can be either in true or
complemented form. By summing the minterms corresponding to the row of the truth
table for which the particular function or minterm coefficient d, is logic I, a unique sumof-product (SOP) algebraic expression known as the disjunctive canonical form (DCF)
is obtained. The corresponding DCF expansion for a function n variables is given by
Equation 1.1, where the summation X is the logical OR operation. Algebraic method of
representing switching circuits specifies a design completely without the storage
problem. However, when an algebraic representation is subjected to manipulation, the
intermediate storage and computation time requirements may present problems.
[Equation 1.11
Kamaugh map (K-map), is an alternative way of defining the operation of a switching
circuit. It is an arrangement of output values in a graphical form. The Karnaugh map of
n variables is a cellular structure contains 2" cells. Each cell holds an output value,
which corresponds to one row of the truth table and one minterm of the DCF. Labeling
the edges of the map identifies the cells. This done in such a way as to give a unique
combination of variables and their inverses for each cell. Figure 1.4 shows the K-map of
n = 1, 2, 3 and 4 input variables. The K-map method is not use in practice because the
number of output values grows quickly as the number of inputs increases. Furthermore,
its simplitication algorithms are not suitable for implementing on a computer.
Figure 1.4 Karnaugh map for n = 1,2,3, and 4.
The size and complexity of digital systems are ever increasing, relying on the growth
pace of computing power to process current large circuits is not a satisfactory solution.
Thus, a more efficient method of representing switching circuits is required. An
alternative method of representation has been available for some time but its popularity
has only grown rapidly in the last decade. This modern representing technique, known
as decision diagram (DD), utilizes graph theory for representation. It allows the
operation of the circuits to be described more efficiently in a computer in the
consummation of computation time and storage space. DD provides multi-level
implementations, which in the recent years have been increasingly used in very large
scale integration (VLSI) synthesis systems.
Recently, a new form of graph-based representation, called the Ternary Decision
Diagram (TDD) has been developed as an alternative representation of logic functions.
This newly developed technique has caught some attention among the decision
researchers. Its potential has yet to be explored.
The evolution of the techniques from classical to decision diagrams has led to faster and
more compact solutions of many problems expressed using discrete functions and
combinational sets. Various types of DDs were introduced with different properties for
different purposes of representation.
1.3
Manipulation Techniques
Boolean functions manipulation is the art of exploiting simplification opportunities that
exist inherently in logical structures by using the identities within that algebra or
reducing the number of terms used. Many problems in electronic CAD can be solved by
using Boolean function manipulation techniques. Solving large systems of Boolean
equations is a hard combinational problem. It can be greatly facilitated by preliminary
reducing the number of roots in separate equations, which in turn, leads to decreasing
the number of variables in a considered system, the number of equations and time
complexity. This can have a significant effect upon the physical space and connectivity
of electronic logic circuits when these are implemented using actual electronic devices
or components. Thus, any logical function will be expressed in as simplified a manner
as possible because this leads inevitably to a reduced usage of resources when that same
function is implemented physically.
Logic minimization uses a variety of techniques to obtain the simplest gate-levelimplementation of a Boolean function. But the simplicity depends on the used metric.
One way of measuring the complexity of a Boolean function is to count the literals it
contains. Literals measure the amount of wiring required to implement a function. For
electrical and packaging reasons, gates in a given technology will have a limited number
of inputs. While two, three and four-inputs are common, gates with more than eight or
nine inputs are rare. Thus, one of the primary reasons for performing Boolean function
minimization is to reduce the number of literals in the expression of the functions, thus
reducing the number of gate inputs. An alternative metric is the number of gates, which
measures circuit area. There is a shong correlation between the number of gates in a
design and the number of components needed for its implementation. The simplest
design to manufacture is often the one with the fewest gates, not the fewest literals. A
third metric is the number of cascaded levels of gates. Reducing the number of logic
levels reduced overall delay, as there are fewer gate delays on the path from inputs to
outputs. However, putting a circuit in a form suitable for minimum delay rarely yields
an implementation with the fewest gates or the simplest gates. It is not possible to
minimize all three metrics at the same time. The minimization techniques emphasize
reducing delay at the expense of adding more gates.
The study of simplification techniques for Boolean functions began in the 1950's. At the
beginning, simplification of switching circuits was motivated by high cost of gates. In
the late 1960's, the cost of gates was reduced and hence simplification became less
essential. Simplification then has gained its importance with the increasing demand on
more compact system. Nowadays, simpler circuits have recognized to have various
advantages, which includes lower power consumption, smaller silicon area, shorter
delay, higher frequency of operation and lower cost for high volume production.
The Quine-McCluskey tabulation method and PLAs led to the extensive study and
usage of AND-OR implementation of switching functions. The study of AND-OR
implementation has become very well established by mid-1980's. At the same time,
various multi-level simplification techniques were introduced. Multi-level
implementation has become relatively easier to realize than before with the introduction
of decision diagrams.
However, this has not been the case for two-level AND-EXOR implementation of
switching hctions. There are two reasons for the slow development in this area. First,
there was no concrete proof for the conjecture that AND-EXOR implementation is more
compact than AND-OR implementation until early 1990's. Second, simplifying ANDEXOR switching functions are not as straightforward as AND-OR switching functions.
Nevertheless, there are two very attractive benefits of using AND-EXOR that are ANDEXOR switching circuit has lesser gates and can be tested easily.
1.4
Hypothesis and Objectives of Research
Since the early days of designing digital circuits, simplification has already been
justified to be an effective method in reducing cost of circuits. It has now become an
essential design process. Unfortunately, the traditional method for simplification is
costly in terms of computer time and storage space.
In recent years, decision diagrams have become the most popular representation
techniques employed by computer-aided-design (CAD) software to represent Boolean
functions. It has various advantages over the traditional representation techniques. Two
most distinctive advantages are its time complexity and space complexity that are nonexponential, i.e. as the input size of Boolean functions grow linearly, computer time and
storage space requirements of algorithms to represent and manipulate DDs do not
necessarily grow exponentially (as is the case for traditional representation techniques).
Over the years, the knowledge in decision diagrams has deepened much and a number
of varieties of decision diagrams have been proposed. However, it has essentially been
developed and employed solely for representation purpose. Few algorithms exist for
manipulating Boolean functions based on decision diagrams. Such algorithms are
desirable because it harnesses the advantages of decision diagrams when performing
manipulation.
This research aims to develop manipulation algorithms that will lead to simpler Boolean
functions by representing and simplifying Boolean functions in decision diagram form
of representation and returning simpler Boolean functions in normal Boolean form.
Other objectives of this research include:
1. To determine one or more types of decision diagrams that are suitable to be
employed for manipulating Boolean functions based on their representation
characteristics.
2. To implement software packages that employ DDs for representing Boolean
functions.
3. To develop manipulation algorithms for DDs that will lead to simpler Boolean
functions.
1.5
Research Methodology
This research into the Boolean hnction manipulation based on decision diagrams is
divided into four stages: literature survey, development of manipulation algorithms,
implementation of a software package, and an analysis of the algorithm's performance.
Literature survey is performed to familiarize with the current work done in Universiti
Malaysia Sarawak as well as to distinguish the characteristics of various types of
decision diagrams. From the survey, the most suitable type of decision diagrams is
identified for manipulating Boolean functions. The manipulation algorithms that can be
transformed to apply onto decision diagrams are analyzed and developed in order to
achieve simplification. A basic DD software package will be implemented with
incorporation of the newly developed manipulation algorithms. This new developed
software package is subjected to practical circuits and the results obtained are then
compared to that provided by traditional methods.
1.6
Chapter Summary
Chapter I of this thesis consists of a brief introduction of digital system design and its
history. This chapter also provides the concepts as well as the analysis of trends in
representation techniques and manipulation techniques. The research hypothesis,
objectives and methodology are outlined as well.
Chapter 2 documents the literature review performed. It first reviews the Boolean
algebra. The decision trees and decision diagrams are introduced in this chapter. It also
focuses on a particular type of binary decision diagrams (BDDs) and ternary decision
diagrams (TDDs) that are suitable for representation purpose.
Chapter 3 presents a new developed software package that performs manipulation of
Boolean functions represented as BDDs. It introduces the PLA file, which is used as the
input modules to the developed BDD software package, at the beginning of the chapter.
The operations on the Boolean function utilizing the graph theory is discussed in detail.
Chapter 4 discusses the performance of the software package, which is demonstrated by
subjecting to it the practical circuits, LGSynth93 standard benchmarks. This presents the
layout of the developed application program. This chapter also compares the symbolic
representation technique with traditional methods.
Chapter 5 concludes the thesis and proposes future research directions
CHAPTER 2
LITERATURE REVIEW
In this chapter, the theory of the binary switching circuits as well as the Boolean algebra
and Boolean functions will be presented. Both binary and ternary graph representation
techniques will also been discussed in a details, where ROBDD and Kleene-TDD are
the main concerns of this chapter.
2.I
The Theory of Binary Switching Circuits
2, I. 1
Boolean Algebra and Boolean Functions
Algebra is a system of mathematics or logic in which abstract entities are represented in
symbolic form and used in operations similar to arithmetic. It is a collection of a set of
symbols, a set of unproven rules or postulates, and a set of operations. Postulates are the
basic assumptions on which the rest of the algebra is based. In the normal algebra, the
set of symbols are (0, 1,2, ... , 9 ) and the set of operations are {+, -,x, +).
Boolean algebra is a system of mathematics developed by George Boole in the 1850s. It
is an algebra dealing with binary variables and logic operations. Boolean algebra uses
the set operations intersection (AND), union (OR), and complementation (NOT);
operations are carried out on variables that are designated by letters of the alphabets.
Combinations of AND, OR, and NOT are used to construct the additional functions of
XOR, NAND, and NOR. The logical operation of the AND (-), OR (+) and NOT (')
operators are defined in Figure 2.1. Boolean algebra is important to digital system
designer because it allows the compact specification and simplification of logic
formulas. Physical devices can perform the AND and OR functions, and it is this fact
that raises Boolean algebra from the realm of interesting theory to the role of a vital
design tool.
1
AND
operation
OR
operation
NOT
operation
I
Figure 2.1 The logical operations of AND, O R and NOT.
A Boolean algebra is an algebraic structure <B, +, -, '> where B is a set of numerical
elements, + and are binary operators, and ' is a unary negation operator. This
collection of Boolean algebra elements must satisfy a set of unproven rules known as
the Huntington’s postulates (or axioms).
I.
2.
3.
4.
5.
6.
I.
8.
x+x=x
x+y=y+x
(x+y)+z=x+(y+z)
n*ly+z)=x~y+x*z
1+x=1
0+x=x
n+n’=l
(x+y)‘=n’.y’
9 . (x’)’ =x
x.x=x
ldempotent Law
Commutative Law
n.y=y.x
(x.y).z=x.cy.z)
Associative Law
x + (Y ?? z) = (x + y) . (x + I) Dishibutive Law
0*x=0
Null Element
I .X’X
Identity Element
Complementary Law
x*x’=0
(x*y)‘=x’+y’
Duality Law
(de Morgan’s Law)
Involution Law
Each of the elements of Boolean algebra is called a Boolean function. A Boolean
function is a relationship involving a finite number of binary valued variables connected
by the binary operations of AND, OR and NOT. If there are n different variables
involved, the expression is a Boolean function of n variables. Boolean functions are
used as models for changes in discrete, signal edges, errors, and binary coded systems
such as cryptosystems for information authentication as well as data encryption. An
important Boolean problem is that of designing Boolean functions satisfying
simultaneously more than one crucial criteria just as dependence and independence,
linearity, monotonicity, high nonlinearity, high degree of propagation, O-I balancedness
and high algebraic degree.
2.1.2
Basic Swilching Elements
In 1938, American mathematician Claude Shannon systemized the earlier theoretical
work of George Book (I 854) and realized that Boolean algebra could play a part in
electronics design by allowing to model logic gates. When Boolean algebra is applied
onto binary valued variables, it is also known as switching algebra. The variables used
in the switching algebra are called switching variables. However the word ‘Boolean’ is
often used in place for the word ‘switching’. Nevertheless, it is not wrong to use the
word ‘Boolean’ since it is the superset of the word ‘switching’ in algebra sense.
Binary switching circuit, or logic circuit, is any arrangement of basic switching elements
or gates. The most common types of basic elements are those given the names ANDgate, OR-gate and NOT-gate (also called the INVERTER). These logic gates are the
physical realization of operation in hvo-element Boolean algebra. The inputs and
outputs of these elements are constrained to take only two voltage levels, which used to
represent the two binary symbols 0 and I respectively. A circuit designer can
systematically think in terms of Boolean logic with the confidence that any network he
designs in this way is immediately hxnslatable into a working circuit requiring only
well-understood, readily available components. There is now a number of electronic
technologies available for the synthesis of these elements as either discrete gates, small
scale integrated (SSI) circuits, medium scale integrated (MSI) circuits, large scale
integrated (LSI) circuits; or very large scale integrated (VLSI) circuits.
12