Oxide
Passivation, Diffusion, Glassivation
Passivation
Passivation Fault rejection criteria:
Either multiple lines or a complete absence of passivation visible at the edge and continuing under the metallization. Double or triple lines indicate that it can have sufficient depth to
penetrate down to bare silicon. However, should the absence of glassivation in the defect area or the characteristics of the glassivation present allow verification of the presence or
absence of passivation by color or color comparisons, then these techniques may be used. The multiple line criteria can be excluded when a second passivation layer is applied in a
separate operation prior to metallization deposition.
An active junction line not covered by passivation, unless by design.
Contact window that extends across a junction line, unless by design.
Image at right shows multiple passivation faults existing in both the open oxidation field
and under the metallization.
Diffusion
Diffusion Fault rejection criteria:
Diffusion fault that allows bridging between diffused areas.
Any isolation diffusion that is discontinuous (except isolation walls around unused
areas or unused bonding pads) or any other diffused area with < 25% (50% for resistors)
of the original diffusion width remaining.
Glassivation
Glassivation rejection criteria:
Glass crazing that prohibits the detection of visual criteria contained herein.
Any lifting or peeling of the glassivation.
Two or more adjacent active metallization paths not covered by glassivation, excluding
bonding pad cutouts. For MOS structures there shall be no void(s) in the glassivation
which exposes dielectric.
Unglassivated areas > 5.0 mils in any dimension unless by design. In the case of peripheral ground metal only, exposure of metal at the die edge is allowable due to normal etching and
alignment, and shall be considered "by design". The maximum width allowed to be exposed is 50% of the metal path width at its narrowest point, or 5.0 mils, whichever is less.
For MOS structures there shall be no void(s) in the glassivation which exposes dielectric.
Unglassivated areas at the edge of bonding pad exposing silicon. For MOS structures the bonding pad window must lie 100% on the bonding pad metallization.
Glassivation covering > 25% of the bonding pad area.
Scratches in the glassivation that disturb metal and bridge metallization paths.
Cracks (not crazing) in the glassivation that form a closed loop over adjacent metallization paths.
Glassivation voids that expose any portion of a thin film resistor or fusible link except for polycrystalline silicon links where the glassivation is opened by design.