TEST 2-ANSWER SCHEME
Computer Architecture EKT 422
Question 1
a) List TWO (2) types of ROM and briefly explain the ROM that you listed.
Programmable (once)
a. PROM
b. Needs special equipment to program
Read “mostly” – another variation on ROM
c. Erasable Programmable (EPROM)
i. Erased by UV (ultraviolet radiation)
ii. Like PROM it is read and written electrically
d. Electrically Erasable (EEPROM)
i. Takes much longer to write than read
ii. Only addressed byte(s) are updated
e. Flash memory
i. Erase whole memory electrically, cells are erased in a “flash” or single
action,1/2 cost and functionality of EPROM and EEPROM,
ii. Erase blocks
iii. Not erase at the byte level, use single transistor per bit.
[2 Marks]
b) List THREE (3) difference between Constant Angular Velocity (CAV) and
Constant Linear Velocity (CLV)
For the constant angular velocity (CAV) system, the number of bits per track is constant. At
a constant linear velocity (CLV), the disk rotates more slowly for accesses near the outer
edge than for those near the center. Thus, the capacity of a track and the rotational delay
both increase for positions nearer the outer edge of the disk
[3 Marks]
c) List TWO (2) share common characteristic for RAID (Redundant Array of
Independent Disks)
1) Set of physical disks viewed as single logical drive by O/S
2) Data distributed across physical drives
3) Can use redundant capacity to store parity information
[2 Marks]
d) A 128 Mbit chip can be organized as a 4096 x 4096 x 1 byte array. Give the
array configuration of the chips on the memory board showing all requirement
input and output signals for assigning this memory
Refresh
counter
A11-A0 @ 11bit
mux
Row
decoder
4k x 4k x 8bit
8bit
Row
add
buffer
Refresh Circuit
Col.
add
buffer
Column Decoder
[8 Marks]
Question 2
a) Briefly explain three techniques for performing I/O.
i.
Programmed I/O
Programmed I/O: The processor issues an I/O command, on behalf of a process, to
an I/O module; that process then busy-waits for the operation to be completed
before proceeding
[1 Marks]
ii.
Interrupt driven
Interrupt-driven I/O: The processor issues an I/O command on behalf of a process,
continues to execute subsequent instructions, and is interrupted by the I/O module
when the latter has completed its work. The subsequent instructions may be in the
same process, if it is not necessary for that process to wait for the completion of the
I/O. Otherwise, the process is suspended pending the interrupt and other work is
performed.
[1 Marks]
iii.
Direct memory access (DMA)
2
Memory
register
buffer
8bit
Direct memory access (DMA): A DMA module controls the exchange of data
between main memory and an I/O module. The processor sends a request for the
transfer of a block of data to the DMA module and is interrupted only after the
entire block has been transferred.
[1 Marks]
b) The DMA mechanism can be configured in a variety of ways. Some
possibilities are single-bus-detached DMA, single bus-integrated DMA-I/O
and by using I/O bus. Sketch and briefly explain the advantages of each
configuration.
3
[6 Marks]
c) List and briefly define the major types of operating system (OS) scheduling
i.
Long-term scheduling: The decision to add to the pool of processes to be executed.
ii.
Medium-term scheduling: The decision to add to the number of processes that are
partially or fully in main memory.
iii.
Short-term scheduling: The decision as to which available process will be executed
by the processor
[6 Marks]
4