JOINT-STOCK COMPANY
«ELECTROVIPRYAMITEL»
www.elvpr.ru
Development and Investigations of Light Triggered Thyristors for
Pulse Application
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V.V. Chibirkin , V.A. Martynenko , A.A. Khapugin , A.V. Konuchov , S.A. Tundykov , A.V.
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Grishanin , R.Sh. Enikeev , R.A. Serebrov
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Electrovypriamitel JSC, Proletarskaya str., 126, 430001, Saransk, Russia, Tel: +7-8342-480-733
Fax: +7-8342-480-733, Email: [email protected]
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The V.I. Lenin All-Russian Electrotechnical Institute, Krasnokazarmennaya str., 12, 111250,
Moscow, Russia, Tel. +7-495-3619567, Fax: +7-495-3619407, Email: [email protected]
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The D.V. Efremov Scientific Research Institute of Electrophysical Apparatus, Metallostroy str., 3,
196641, Saint Petersburg, Russia, Tel. +7-812-4644470, Fax: +7-812-4644623, Email:
[email protected]
Abstract
This report presents the results of development and investigations of power LTT (Light Triggered
Thyristor) for pulse applications. LTTs are often used in high voltage applications where a series
connection of devices is required. Light triggered thyristors should be preferred as solid-state
switches because of the advantage of high voltage blocking and the easy way of light triggering. LLTs
allow simple and reliable circuits in power transmissions and super-high power pulse commutation
units [1,2]. This work continues power LTT developments in JSC Electrovypriamitel and All-Russian
Electrotechnical Institute [3]. The design of power fast LTT with 4” basic unit for pulse commutation
up to 100 kA 700 μs is presented.
1.
Introduction
2
The reliable switches for commutation of short pulses more than 10 kA are highly demanded in
modern power pulse technique. Solid state switches are very attractive for this purpose because of
long term reliability, low operating costs and ecological safety. These devices may be used in
equipment for ultra-high electromagnetic fields creation, in power laser supply and other pulse
circuits. Our tests have shown that power light triggered thyristors are suitable as solid-state switches
for super-high power commutation in sub-millisecond range and work reliably without degradations of
electrical parameters.
A thyristor in pulse application should commutate the single or seldom current pulses with near
maximal permissible surge amplitude. Very large power dissipation restricts the commutation
capability as well as on-state spreading velocity. The total turn-on time depends on silicon structure
electro-physical properties, cathode emitter shorts density, gate structure layout, current amplitude
and other factors. Simulation and experimental studies were carried out for increasing maximum
current amplitude and total turn-on time minimization.
The LTT cathode layout is similar to traditional electrically-triggered thyristors (ETT). The main
difference between ETTs and LTTs is the light sensitive gate area, which is used for triggering of LTT
by the optical signal delivered from the fiber optical cable. The optimized design of LTT gate permits
high diT/dt-capability, low turn-on power losses and high optical sensibility. Special care in power light
triggered thyristors optimization is taken with respect to switching ruggedness.
2.
LTT layout
Fig.1 shows the basic unit layout of LTT for pulse applications. A light-sensible region is at the centre
of semiconductor structure. The characteristic features of LTT layout are high degree interdigitated
gate and four stage amplifying gate. The interdigitated gate improves a turn-on spreading time and
losses. The auxiliary thyristors amplify low gate current, arising due to charge carrier generation by
optical irradiation of the light-sensible region.
Fig. 1: Silicon structure layout of LTT
The silicon structure layout and the diffusion layer parameters have been optimally designed for
optical sensibility improving, turn-on losses minimization and high diT/dt capability. A high diT/dt
capability was reached owing to the special amplifying gate design and two integrated in LTT
structure resistors for current limitation at turn-on beginning.
3.
Simulations and design
Performance and reliability of thyristors for pulse commutation with high diT/dt depend on the dynamic
temperature distribution in a semiconductor structure. The high current density during turn-on leads to
the overheating in amplifying gate region and at inner rand of main cathode. The simulation was
carried out to define overheating locations in the LTT central region. The simulation results are shown
on fig. 2. The red curve is the temperature distribution in the optimized current limiting resistors. The
blue curve corresponds to LTT structure without current limiting resistors.
Fig. 2: Simulation of LTT central region and radial temperature distribution at maximum power
dissipation moment
As can be seen from the simulation results, the main diT/dt limiting factor is a significant overheating
of gate region at turn-on beginning instant. The first amplifying gate stage is the most overheated.
The temperature of this region can rise at high diT/dt up to the critical value, leading to current
filaments and thyristor destruction. A current filament arises when the thermal generation becomes
main conductivity modulation mechanism. The critical temperature for a current filament arising is
400-600ºC.
Overheating of the first amplifying stage depends on the integrated current limiting resistors. The
resistance values can be adjusted by means of trench mesa-etching in p-base. From fig. 2 can be
seen that the resistor R1 is warmed up to near 120ºC. The increase of current limiting resistor value
allows 30ºC temperature reducing. Fig. 3 shows experimental trade-off between resistance value and
etching depth. Fig. 4 shows the experimental trade-off between minimum anode voltage and current
limiting resistor.
Fig. 3: Trade-off between value of current
limiting resistors and etching depth in p-base
Fig. 4: Experimental trade-off between
minimum anode voltage and current
limiting resistor
As a result of investigations the optimum resistance values have been defined for high di/dt capability
and stable turn-on with low anode voltage (VA min ≤ 20V). Fig. 5 shows the current and voltage curves
during LTT turn-on for unoptimazed and optimized LTT layout. It can be seen that the turn-on delay
time increases slightly.
Fig. 5: Turn-on simulation of LTT central
region
Fig. 6: Calculated trade-off between LTT turnon delay time and laser diode wave length
LTTs are triggered with IR light pulses. The correct choice of wave lenght is very important for proper
LTT operation. It depends on a blocking p-n junction depth. Fig. 6 shows calculated the trade-off
between LTT turn-on delay time and laser diode wave length (pulse power 200 mW). The simulation
results show that the optimum wave length for LTT triggering lays between 1.0 and 1.05μm. The
wave length more than 1.1μm is uneffective because photons energy is too small for electron-hole
pairs generation. The light effectiveness decreases also because of low penetration when the wave
length is under 1.0μm. As a result electron-hole pairs recombine near surface. The radiation
spectrum of commercial laser diodes corresponds to this optimum.
Very important problem by LTT development is the high light sensitivity of the triggering region
because output optical power of a light cable system is much lower as a gate input electric power.
The high light sensitivity thyristor becomes very sensible to interferences and has low off-state dvD/dt
capability. For dvD/dt increasing the light sensible region must be small. At the same time the small
size of this region limits initial turn-on square and decreases diT/dt capability.
This problem was successfully overcame by the LTT development. LTT must have high optical
sensibility and low turn-on power losses on the one hand, and high dvD/dt capability and positive
temperature dependence of blocking voltage on the other hand. The developed LTTs are really
triggered with optical power no more as 20mW and maintain dvD/dt = 5000V/μs. These demands
were fulfilled owing to optimum diffusion profiles, light sensible layout, cathode regions, photocurrent
amplifying elements and amplifying gate.
4.
Experimental results
The LTT was tested in pulse conditions for commutation limits definition. Fig. 7 shows the anode
current curve and the light triggering pulse during critical on-state di/dt value measuring. The laser
diode with wave length λ = 0.88 μm and pulse power 150mW was applied for LTT triggering in the
test circuit. It can be seen from fig.7 that the developed thyristor allows the pulse commutation with
current rate of rise up to 5000A/μs. The test with greater di/dt was impossible because of circuit
restrictions.
Fig. 7: LTT anode current and triggering light pulse
The developed LTTs were tested in high voltage stack from 3 LTT in series (fig. 8). The stack was
designed for the capacitive storage device with voltage 5kV and storage energy 50kJ. Fig. 9 shows
the electric circuit of the capacitive storage device. It was found during LTT tests in the condenser
battery that a thyristor turn-off overvoltage was twice much as a charging voltage 5kV. This
dangerous overvoltage can destroy LTT. It arises because of a current fall in the inductor L during
LTT reverse recovery. Snubber RC-circuits were used for LTTs protection from overvoltage. Fig. 10
shows the LTT protection circuit for reverse recovery.
RC-circuit components and reverse recovery charge were estimated by computer simulation with 3
LTT in series. RC-components were modified (C = 0…4 μF, R = 2…5 Ohm) and two LTT versions
were used:
Version 1 – structure without reverse recovery charge controlling (QRR = 20 mC, VTM = 2.0 V)
Version 2 – structure with reverse recovery charge controlling (QRR = 10 mC, VTM = 2.4 V)
As a result of simulation (fig. 11) the optimum version was chosen: LTT version 2, snubber
components – C = 3…4 μF, R = 2 Ohm, overvoltage VO ≤ 7.5 kV.
Fig. 8: Power stack for capacitor battery
discharge
Fig. 9: Equivalent test circuit for LTT
Fig. 10: Equivalent protection circuit for
LTT reverse recovery
Fig. 11: Calculated reverse recovery current
and voltage waves of high voltage LTT
The tests in practical circuits show that the increased RC-circuit have weak influence on commutation
overvoltage. Main method of overvoltage decreasing is LTT reverse recovery charge lowering.
A reverse recovery charge of thyristor is proportionate to the carriers life time. The modern practical
methods of life time controlling in silicon are based on high energy particle irradiation. The demanded
reverse recovery charge values were obtained by electron irradiation of LTT silicon structures. This
method gives narrow QRR dispersion and decreases commutation overvoltage. The optimum reverse
recovery charge provides safely LTT operation without dangerous overvoltage.
The power stack with 3 LTT was tested in a capacitive storage device circuit for determination of
maximum allowable pulse currents in sub-millisecond range. The LTT stack withstood 500 storage
device discharges with pulse current magnitude 106 kA. Fig. 12 shows corresponding current and
voltage curves across LTT.
Fig. 12: Current and voltage curves during 100 kA current commutation
Table 1 shows key parameters of the developed LTT.
Table 1: Key parameters of LTT
VDRM, VRRM, V
4200 @ TJ = -40..+125 °C
IT(AV), A
2500 @ TC = 70 °C, sin, tp = 10 ms
Ipeak-pulse, kA
≥ 100 @ TJ = 25 °C, sin, tp up 700 µs
ITSM, kA
≥ 50 @ TJ = 125 °C, tp = 10 ms
VTM, V
≤ 2.4 @ IT = 7850 А, Tj = 125 °C
PLM, mW
≤ 40 @ VD = 100 V
(dvD/dt)crit, V/µs
≥ 2000 @ VD = 0.67VDRM, Tj = 125 °C
≥ 5000 @ VD = 0.67VDRM , IT = 8000 А, PLM = 40 mW, tL = 10 µs,
(diT/dt) crit, A/µs
trise = 0.5 µs, Tj = 25 °C
tq, µs
QRR, µC
Rthjc, °C/W
5.
≤ 320 @ IT = 2500 A, diT/dt = - 5 A/µs, VR ≥ 100 V, VD = 0.67VDRM,
(dVD/dt) = 50 V/µs, Tj = 125 °C
≤ 2400 @ IT = 2500 А, diT/dt = - 5 A/ µs, VR ≥ 100 V, Tj = 125 °C
0.065 @ DC, double side cooled
Conclusion
This report presents the development and investigation results of power LTTs for pulse applications.
The tests confirm high reliability and prospects of LTTs. The LTTs development is now in progress.
Further LTTs optimization will increase the maximum commutation currents up to 1.5-2 times.
6.
Literature
[1]
J. Przybilla, R. Keller, U. Kellner, H.-J. Schulze, F.-J. Niedernostheide, T. Peppel, “Direct lighttriggered solid-state switches for pulsed power applications”, Digest of Technical Papers 14th
IEEE International PPC-2003, Vol.1, 2003, pp. 150-154.
J. Dorn, U. Kellner, F.-J. Niedernostheide, H.-J.Schulze, “State of the Art Light Triggered
Thyristors with Integrated Protection Functions”, Power Electronics Europe Issue2, 2002, pp.
29-35.
V. Martynenko, A. Khapugin, A. Grishanin, V. Chibirkin, A. Konuchov, I. Veselova, А. Surma,
“The development of power thyristors with direct control of lighting and protection functions”,
Power electronics, № 5, 2009, pp. 8-14.
[2]
[3]