Pipelining
1
Pipelining of Combinational Logic
Source: Arvind (MIT Opencourseware licence http://ocw.mit.edu/terms/index.htm#cc)
2
Pipeline Diagrams
Source: Arvind (MIT Opencourseware licence http://ocw.mit.edu/terms/index.htm#cc)
3
Ill-formed Pipelines
Source: Arvind (MIT Opencourseware licence http://ocw.mit.edu/terms/index.htm#cc)
4
Pipeline Example
Source: Arvind (MIT Opencourseware licence http://ocw.mit.edu/terms/index.htm#cc)
5
Pipelined Components
Source: Arvind (MIT Opencourseware licence http://ocw.mit.edu/terms/index.htm#cc)
6
Back to our bottleneck
Source: Arvind (MIT Opencourseware licence http://ocw.mit.edu/terms/index.htm#cc)
7
Circuit Interleaving (Pipelining + Spatial Parallelism)
Source: Arvind (MIT Opencourseware licence http://ocw.mit.edu/terms/index.htm#cc)
8
Combining Interleaving and Pipelining
Source: Arvind (MIT Opencourseware licence http://ocw.mit.edu/terms/index.htm#cc)
9
Control Structures
Source: Arvind (MIT Opencourseware licence http://ocw.mit.edu/terms/index.htm#cc)
10
Self-timed Example
Source: Arvind (MIT Opencourseware licence http://ocw.mit.edu/terms/index.htm#cc)
11
Summary
Source: Arvind (MIT Opencourseware licence http://ocw.mit.edu/terms/index.htm#cc)
12
Other Techniques
›  Techniques not discussed in this lecture but often used in reconfigurable
computing
-  Vectorization
-  Systolic arrays
-  Task-level parallelism (particularly MPI)
13