Binary Logic and Gates
 Binary variables take on one of two values.
 Logical operators operate on binary values and
binary variables.
 Basic logical operators are the logic functions
AND, OR and NOT.
 Logic gates implement logic functions.
 Boolean Algebra: a useful mathematical system
for specifying and transforming logic functions.
 We study Boolean algebra as a foundation for
designing and analyzing digital systems!
Boolean Algebra and Logic Gates 1
Binary Variables
 Recall that the two binary values have
different names:
True/False
On/Off
Yes/No
1/0
 We use 1 and 0 to denote the two values.
 Variable identifier examples:
A, B, y, z, or X1 for now
RESET, START_IT, or ADD1 later
Boolean Algebra and Logic Gates 2
Logical Operations
 The three basic logical operations are:
AND
OR
NOT
 AND is denoted by a dot (·).
 OR is denoted by a plus (+).
 NOT is denoted by an overbar ( ¯ ), a
single quote mark (') after, or (~) before
the variable.
Boolean Algebra and Logic Gates 3
Notation Examples
 Examples:
Y A B is read “Y is equal to A AND B.”
z x y is read “z is equal to x OR y.”
X A is read “X is equal to NOT A.”
 Note: The statement:
1 + 1 = 2 (read “one plus one equals two”)
is not the same as
1 + 1 = 1 (read “1 or 1 equals 1”).
Boolean Algebra and Logic Gates 4
Operator Definitions
 Operations are defined on the values
"0" and "1" for each operator:
AND
0·0=0
0·1=0
1·0=0
1·1=1
OR
NOT
0+0=0
0+1=1
1+0=1
1+1=1
0 1
1 0
Boolean Algebra and Logic Gates 5
Truth Tables
 Tabular listing of the values of a function for all
possible combinations of values on its arguments
 Example: Truth tables for the basic logic operations:
X
0
0
1
1
AND
Y Z = X·Y
0
0
1
0
0
0
1
1
X
0
0
1
1
Y
0
1
0
1
OR
Z = X+Y
0
1
1
1
NOT
X
0
1
Z X
1
0
Boolean Algebra and Logic Gates 6
Truth Tables – Cont‟d
 Used to evaluate any logic function
 Consider F(X, Y, Z) = X Y + Y Z
X
Y
Z
XY
Y
YZ
F=XY+YZ
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
1
1
Boolean Algebra and Logic Gates 7
Logic Function Implementation
 Using Switches
Switches in parallel => OR
Inputs:
 logic 1 is switch closed
 logic 0 is switch open
Outputs:
Switches in series => AND
 logic 1 is light on
 logic 0 is light off.
NOT input:
Normally-closed switch => NOT
C
 logic 1 is switch open
 logic 0 is switch closed
Boolean Algebra and Logic Gates 8
Logic Function Implementation – cont‟d
 Example: Logic Using Switches
B
C
A
D
 Light is on (L = 1) for
L(A, B, C, D) = A (B C + D) = A B C + A D
and off (L = 0), otherwise.
 Useful model for relay and CMOS gate circuits,
the foundation of current digital logic circuits
Boolean Algebra and Logic Gates 9
Logic Gates
 In the earliest computers, switches were opened
and closed by magnetic fields produced by
energizing coils in relays. The switches in turn
opened and closed the current paths.
 Later, vacuum tubes that open and close
current paths electronically replaced relays.
 Today, transistors are used as electronic
switches that open and close current paths.
Boolean Algebra and Logic Gates 10
Logic Gate Symbols and Behavior
 Logic gates have special symbols:
X
X
Z = X· Y
Y
Z = X+ Y
Y
OR gat e
AND gat e
 And waveform behavior in time as follows:
X
0
0
1
1
Y
0
1
0
1
X· Y
0
0
0
1
( OR)
X+ Y
0
1
1
1
( NOT)
X
1
1
0
0
( AND)
Z= X
X
NOT gat e or
i nver t er
Boolean Algebra and Logic Gates 11
Logic Diagrams and Expressions
Truth Table
XYZ
000
001
010
011
100
101
110
111
F
X
Logic Equation
Y
0
1
0
0
1
1
1
1
Z
F X YZ
Logic Diagram
X
F
Y
Z
 Boolean equations, truth tables and logic diagrams describe
the same function!
 Truth tables are unique, but expressions and logic diagrams
are not. This gives flexibility in implementing functions.
Boolean Algebra and Logic Gates 12
Gate Delay
 In actual physical gates, if an input changes that
causes the output to change, the output change
does not occur instantaneously.
 The delay between an input change and the
output change is the gate delay denoted by tG:
1
Input
0
1
Output
0
0
tG
tG
0.5
1
tG = 0.3 ns
1.5
Time (ns)
Boolean Algebra and Logic Gates 13
Boolean Algebra
 Invented by George Boole in 1854
 An algebraic structure defined by a set B = {0, 1}, together with two
binary operators (+ and ·) and a unary operator ( )
1.
3.
5.
7.
9.
X+0= X
X+1 =1
X+X =X
X+X =1
X= X
10. X + Y = Y + X
12. (X + Y) + Z = X + (Y + Z)
14. X(Y + Z) = XY + XZ
16. X + Y = X . Y
2.
4.
6.
8.
X .1 =X
Identity element
X .0 =0
X .X = X
Idempotence
X .X = 0
Complement
Involution
11. XY = YX
Commutative
Associative
13. (XY) Z = X(Y Z)
15. X + YZ = (X + Y) (X + Z) Distributive
DeMorgan‟s
17. X . Y = X + Y
Boolean Algebra and Logic Gates 14
Some Properties of Boolean Algebra
 Boolean Algebra is defined in general by a set B that can
have more than two values
 A two-valued Boolean algebra is also know as Switching
Algebra. The Boolean set B is restricted to 0 and 1.
Switching circuits can be represented by this algebra.
 The dual of an algebraic expression is obtained by
interchanging + and · and interchanging 0‟s and 1‟s.
 The identities appear in dual pairs. When there is only
one identity on a line the identity is self-dual, i. e., the
dual expression = the original expression.
 Sometimes, the dot symbol „‟ (AND operator) is not
written when the meaning is clear
Boolean Algebra and Logic Gates 15
Dual of a Boolean Expression
 Example: F = (A + C) · B + 0
dual F = (A · C + B) · 1 = A · C + B
 Example: G = X · Y + (W + Z)
dual G = (X+Y) · (W · Z) = (X+Y) · (W+Z)
 Example: H = A · B + A · C + B · C
dual H = (A+B) · (A+C) · (B+C)
 Unless it happens to be self-dual, the dual of an
expression does not equal the expression itself
 Are any of these functions self-dual? H is self-dual
(A+B)(A+C)(B+C)=(A+BC)(B+C)=AB+AC+BC
Boolean Algebra and Logic Gates 16
Boolean Operator Precedence
 The order of evaluation is:
1. Parentheses
2. NOT
3. AND
4. OR
 Consequence: Parentheses appear
around OR expressions
 Example: F = A(B + C)(C + D)
Boolean Algebra and Logic Gates 17
Boolean Algebraic Proof – Example 1
 A+A·B=A
Proof Steps
A+A·B
=A·1+A·B
= A · ( 1 + B)
=A·1
=A
(Absorption Theorem)
Justification
Identity element: A · 1 = A
Distributive
1+B=1
Identity element
 Our primary reason for doing proofs is to learn:
 Careful and efficient use of the identities and theorems of
Boolean algebra, and
 How to choose the appropriate identity or theorem to apply
to make forward progress, irrespective of the application.
Boolean Algebra and Logic Gates 18
Boolean Algebraic Proof – Example 2
 AB + AC + BC = AB + AC (Consensus Theorem)
Proof Steps
Justification
= AB + AC + BC
= AB + AC + 1 · BC
Identity element
= AB + AC + (A + A) · BC
Complement
= AB + AC + ABC + ABC
Distributive
= AB + ABC + AC + ACB
Commutative
= AB · 1 + ABC + AC · 1 + ACB Identity element
= AB (1+C) + AC (1 + B)
Distributive
= AB . 1 + AC . 1
1+X = 1
= AB + AC
Identity element
Boolean Algebra and Logic Gates 19
Useful Theorems
 Minimization
XY+XY=Y
 Minimization (dual)
(X+Y)(X+Y) = Y
 Absorption
X+XY=X
 Absorption (dual)
X · (X + Y) = X
 Simplification
X+XY=X+Y
 Simplification (dual)
X · (X + Y) = X · Y
 DeMorgan‟s
 X+Y=X·Y
 DeMorgan‟s (dual)
 X·Y=X+Y
Boolean Algebra and Logic Gates 20
Truth Table to Verify DeMorgan‟s
X+Y=X·Y
X·Y=X+Y
X Y X·Y X+Y X Y X+Y X · Y X·Y X+Y
0
0
1
1
0
1
0
1
0
0
0
1
0
1
1
1
1
1
0
0
1
0
1
0
1
0
0
0
1
0
0
0
1
1
1
0
1
1
1
0
 Generalized DeMorgan‟s Theorem:
X1 + X2 + … + Xn = X1 · X2 · … · Xn
X1 · X2 · … · Xn = X1 + X2 + … + Xn
Boolean Algebra and Logic Gates 21
Complementing Functions
 Use DeMorgan's Theorem:
1. Interchange AND and OR operators
2. Complement each constant and literal
 Example: Complement F = xy z
xyz
F = (x + y + z)(x + y + z)
 Example: Complement G = (a + bc)d + e
G = (a (b + c) + d) e
Boolean Algebra and Logic Gates 22
Expression Simplification
 An application of Boolean algebra
 Simplify to contain the smallest number
of literals (variables that may or may not
be complemented)
A B ACD A BD AC D A BCD
= AB + ABCD + A C D + A C D + A B D
= AB + AB(CD) + A C (D + D) + A B D
= AB + A C + A B D = B(A + AD) +AC
= B (A + D) + A C (has only 5 literals)
Boolean Algebra and Logic Gates 23
Next … Canonical Forms
 Minterms and Maxterms
 Sum-of-Minterm (SOM) Canonical Form
 Product-of-Maxterm (POM) Canonical Form
 Representation of Complements of Functions
 Conversions between Representations
Boolean Algebra and Logic Gates 24
Minterms
 Minterms are AND terms with every variable
present in either true or complemented form.
 Given that each binary variable may appear
normal (e.g., x) or complemented (e.g., x), there
are 2n minterms for n variables.
 Example: Two variables (X and Y) produce
2 x 2 = 4 combinations:
XY (both normal)
X Y (X normal, Y complemented)
XY (X complemented, Y normal)
X Y (both complemented)
 Thus there are four minterms of two variables.
Boolean Algebra and Logic Gates 25
Maxterms
 Maxterms are OR terms with every variable in
true or complemented form.
 Given that each binary variable may appear
normal (e.g., x) or complemented (e.g., x), there
are 2n maxterms for n variables.
 Example: Two variables (X and Y) produce
2 x 2 = 4 combinations:
X Y (both normal)
X Y (x normal, y complemented)
X Y (x complemented, y normal)
X Y (both complemented)
Boolean Algebra and Logic Gates 26
Minterms & Maxterms for 2 variables
 Two variable minterms and maxterms.
x
y
Index
Minterm
Maxterm
0
0
0
m0 = x y
M0 = x + y
0
1
1
m1 = x y
M1 = x + y
1
0
2
m2 = x y
M2 = x + y
1 1
3
m3 = x y
M3 = x + y
 The minterm mi should evaluate to 1 for each
combination of x and y.
 The maxterm is the complement of the minterm
Boolean Algebra and Logic Gates 27
Minterms & Maxterms for 3 variables
x
0
0
0
0
1
1
1
1
y
0
0
1
1
0
0
1
1
z
0
1
0
1
0
1
0
1
Index
0
1
2
3
4
5
6
7
Minterm
m0 = x y z
m1 = x y z
m2 = x y z
m3 = x y z
m4 = x y z
m5 = x y z
m6 = x y z
m7 = x y z
Maxterm
M0 = x + y + z
M1 = x + y + z
M2 = x + y + z
M3 = x + y + z
M4 = x + y + z
M5 = x + y + z
M6 = x + y + z
M7 = x + y + z
Maxterm Mi is the complement of minterm mi
Mi = mi and mi = Mi
Boolean Algebra and Logic Gates 28
Purpose of the Index
 Minterms and Maxterms are designated with an index
 The index number corresponds to a binary pattern
 The index for the minterm or maxterm, expressed as a
binary number, is used to determine whether the variable
is shown in the true or complemented form
 For Minterms:
 „1‟ means the variable is “Not Complemented” and
 „0‟ means the variable is “Complemented”.
 For Maxterms:
 „0‟ means the variable is “Not Complemented” and
 „1‟ means the variable is “Complemented”.
Boolean Algebra and Logic Gates 29
Standard Order
 All variables should be present in a minterm or
maxterm and should be listed in the same order
(usually alphabetically)
 Example: For variables a, b, c:
Maxterms (a + b + c), (a + b + c) are in standard order
However, (b + a + c) is NOT in standard order
(a + c) does NOT contain all variables
Minterms (a b c) and (a b c) are in standard order
However, (b a c) is not in standard order
(a c) does not contain all variables
Boolean Algebra and Logic Gates 30
Sum-Of-Minterm (SOM)
 Sum-Of-Minterm (SOM) canonical form:
Sum of minterms of entries that evaluate to „1‟
x
y
z
F
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
0
0
0
1
1
Minterm
m1 = x y z
Focus on the
„1‟ entries
m6 = x y z
m7 = x y z
F = m1 + m6 + m7 = ∑ (1, 6, 7) = x y z + x y z + x y z
Boolean Algebra and Logic Gates 31
Sum-Of-Minterm Examples
 F(a, b, c, d) = ∑(2, 3, 6, 10, 11)
 F(a, b, c, d) = m2 + m3 + m6 + m10 + m11
abcd+abcd+abcd+abcd+abcd
 G(a, b, c, d) = ∑(0, 1, 12, 15)
 G(a, b, c, d) = m0 + m1 + m12 + m15
abcd+abcd+abcd+abcd
Boolean Algebra and Logic Gates 32
Product-Of-Maxterm (POM)
 Product-Of-Maxterm (POM) canonical form:
Product of maxterms of entries that evaluate to „0‟
x
y
z
F
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
1
0
1
0
1
0
1
Maxterm
M2 = (x + y + z)
Focus on the
„0‟ entries
M4 = (x + y + z)
M6 = (x + y + z)
F = M2·M4·M6 = ∏ (2, 4, 6) = (x+y+z) (x+y+z) (x+y+z)
Boolean Algebra and Logic Gates 33
Product-Of-Maxterm Examples
 F(a, b, c, d) = ∏(1, 3, 6, 11)
 F(a, b, c, d) = M1 · M3 · M6 · M11
(a+b+c+d) (a+b+c+d) (a+b+c+d) (a+b+c+d)
 G(a, b, c, d) = ∏(0, 4, 12, 15)
 G(a, b, c, d) = M0 · M4 · M12 · M15
(a+b+c+d) (a+b+c+d) (a+b+c+d) (a+b+c+d)
Boolean Algebra and Logic Gates 34
Observations
 We can implement any function by "ORing" the minterms
corresponding to the „1‟ entries in the function table. A
minterm evaluates to „1‟ for its corresponding entry.
 We can implement any function by "ANDing" the maxterms
corresponding to „0‟ entries in the function table. A maxterm
evaluates to „0‟ for its corresponding entry.
 The same Boolean function can be expressed in two
canonical ways: Sum-of-Minterms (SOM) and Product-ofMaxterms (POM).
 If a Boolean function has fewer „1‟ entries then the SOM
canonical form will contain fewer literals than POM.
However, if it has fewer „0‟ entries then the POM form will
have fewer literals than SOM.
Boolean Algebra and Logic Gates 35
Converting to Sum-of-Minterms Form
 A function that is not in the Sum-of-Minterms form
can be converted to that form by means of a truth table
 Consider F = y + x z
x y z
F
Minterm
0
0
0
0
1
1
1
1
1
1
1
0
1
1
0
0
m0 = x y z
m1 = x y z
m2 = x y z
m0 + m1 + m2 + m4 + m5 =
m4 = x y z
m5 = x y z
xyz+xyz
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
F = ∑(0, 1, 2, 4, 5) =
xyz+xyz+xyz+
Boolean Algebra and Logic Gates 36
Converting to Product-of-Maxterms Form
 A function that is not in the Product-of-Minterms form
can be converted to that form by means of a truth table
 Consider again: F = y + x z
x y z
F
0
0
0
0
1
1
1
1
1
1
1
0
1
1
0
0
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Minterm
F = ∏(3, 6, 7) =
M3 · M6 · M7 =
M3 = (x+y+z)
(x+y+z) (x+y+z) (x+y+z)
M6 = (x+y+z)
M7 = (x+y+z)
Boolean Algebra and Logic Gates 37
Conversions Between Canonical Forms
x
y
z
F
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
1
1
0
1
0
1
Minterm
Maxterm
M0 = (x + y + z)
m1 = x y z
m2 = x y z
m3 = x y z
M4 = (x + y + z)
m5 = x y z
M6 = (x + y + z)
m7 = x y z
F = m1+m2+m3+m5+m7 = ∑(1, 2, 3, 5, 7) =
xyz+xyz+xyz+xyz+xyz
F = M0 · M4 · M6 = ∏(0, 4, 6) = (x+y+z)(x+y+z)(x+y+z)
Boolean Algebra and Logic Gates 38
Algebraic Conversion to Sum-of-Minterms
 Expand all terms first to explicitly list all minterms
 AND any term missing a variable v with (v + v)
 Example 1: f = x + x y
(2 variables)
f = x (y + y) + x y
f=xy+xy+xy
f = m3 + m2 + m0 = ∑(0, 2, 3)
 Example 2: g = a + b c (3 variables)
g = a (b + b)(c + c) + (a + a) b c
g=abc+abc+abc+abc+abc+abc
g=abc+abc+abc+abc+abc
g = m1 + m4 + m5 + m6 + m7 = ∑ (1, 4, 5, 6, 7)
Boolean Algebra and Logic Gates 39
Algebraic Conversion to Product-of-Maxterms
 Expand all terms first to explicitly list all maxterms
 OR any term missing a variable v with v · v
 Example 1: f = x + x y
(2 variables)
Apply 2nd distributive law:
f = (x + x) (x + y) = 1 · (x + y) = (x + y) = M1
 Example 2: g = a c + b c + a b
(3 variables)
g = (a c + b c + a) (a c + b c + b) (distributive)
g = (c + b c + a) (a c + c + b)
(x + x y = x + y)
g = (c + b + a) (a + c + b)
(x + x y = x + y)
g = (a + b + c) (a + b + c) = M5 . M2 = ∏ (2, 5)
Boolean Algebra and Logic Gates 40
Function Complements
 The complement of a function expressed as a
sum of minterms is constructed by selecting the
minterms missing in the sum-of-minterms
canonical form
 Alternatively, the complement of a function
expressed by a Sum of Minterms form is simply
the Product of Maxterms with the same indices
 Example: Given F(x, y, z) = ∑ (1, 3, 5, 7)
F(x, y, z) = ∑ (0, 2, 4, 6)
F(x, y, z) = ∏ (1, 3, 5, 7)
Boolean Algebra and Logic Gates 41
Summary of Minterms and Maxterms
 There are 2n minterms and maxterms for Boolean
functions with n variables.
 Minterms and maxterms are indexed from 0 to 2n – 1
 Any Boolean function can be expressed as a logical
sum of minterms and as a logical product of maxterms
 The complement of a function contains those minterms
not included in the original function
 The complement of a sum-of-minterms is a product-ofmaxterms with the same indices
Boolean Algebra and Logic Gates 42
Standard Forms
 Standard Sum-of-Products (SOP) form:
equations are written as an OR of AND terms
 Standard Product-of-Sums (POS) form:
equations are written as an AND of OR terms
 Examples:
SOP: A B C A B C B
POS: (A B) · (A B C )· C
 These “mixed” forms are neither SOP nor POS
(A B C) (A C)
A B C A C (A B)
Boolean Algebra and Logic Gates 43
Standard Sum-of-Products (SOP)
 A sum of minterms form for n variables can
be written down directly from a truth table.
Implementation of this form is a two-level
network of gates such that:
The first level consists of n-input AND gates
The second level is a single OR gate
 This form often can be simplified so that the
corresponding circuit is simpler.
Boolean Algebra and Logic Gates 44
Standard Sum-of-Products (SOP)
 A Simplification Example:
F( A, B, C)
(1,4,5,6,7 )
 Writing the minterm expression:
F = A B C + A B C + A B C + ABC + ABC
 Simplifying:
F = A B C + A (B C + B C + B C + B C)
F = A B C + A (B (C + C) + B (C + C))
F = A B C + A (B + B)
F=ABC+A
F=BC+A
 Simplified F contains 3 literals compared to 15
Boolean Algebra and Logic Gates 45
AND/OR Two-Level Implementation
 The two implementations for F are shown below
A
B
C
A
B
C
A
B
C
A
B
C
A
B
C
A
F
B
C
F
It is quite
apparent which
is simpler!
Boolean Algebra and Logic Gates 46
SOP and POS Observations
 The previous examples show that:
Canonical Forms (Sum-of-minterms, Product-of-Maxterms),
or other standard forms (SOP, POS) differ in complexity
Boolean algebra can be used to manipulate equations into
simpler forms
Simpler equations lead to simpler implementations
 Questions:
How can we attain a “simplest” expression?
Is there only one minimum cost circuit?
The next part will deal with these issues
Boolean Algebra and Logic Gates 47
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Boolean Algebra and Logic Gates 48
Introduction to Karnaugh Maps
•
•
•
If implemented correctly, they almost always produce a minimum solution.
They are more straightforward that algebraic manipulations
They generally produce SOPs, but POS can be generated from their complements if required.
Two-variable Karnaugh maps
A
0
B
B‟
A‟
0
1
A‟B‟
AB‟
A‟B
AB
A
B
1
A
0
1
0
m0
m2
1
m1
B
m3
Three-variable Karnaugh maps
Product terms corresponding to groups of two.
Four-variable Karnaugh maps
Implicants
•
•
•
An implicant of a function is a product term.
From the point of view of the map, an implicant is a rectangle of 1, 2, 4, 8, . . . (any power of 2) 1‟s. That rectangle
may not include any 0‟s.
Example:
•
f = A‟B‟C‟D‟+A‟B‟CD+A‟BCD+AB‟CD+ABC‟D‟+ABC‟D+ABCD
AB
00
01
11
10
CD
00
1
1
01
11
10
1
1
1
1
1
Implicants
•
The implicants of f are:
Minterms (1 implicant)
ABCD
A B CD
A BCD
ABC D
ABC D
ABCD
AB CD
Groups of 2
A CD
BCD
ACD
B CD
ABC‟
ABD
Groups of 4
CD
Prime and Essential Prime Implicants
•
•
Prime Implicant:
o an implicant that (from the point of view of the map) is not fully contained in any one other
implicant.
Essential Prime Implicant:
o a prime implicant that includes at least one 1 that is not included in any other prime
implicant.
AB
00
CD
00
01
1
10
10
1
01
11
11
1
1
1
1
1
Minimum SOP Expressions From Karnaugh Maps
Minimum SOP Expressions From Karnaugh Maps
1.
2.
Find all essential prime implicants.
• Circle them on the map and mark the minterm(s) that make them essential with an asterisk (*).
Find enough other prime implicants to cover the function. Do this using two criteria:
a.
Choose a prime implicant that covers as many new 1‟s
(that is, those not already covered by a chosen prime implicant).
b.
Avoid leaving isolated uncovered 1‟s.
The main idea is
To Have all ones covered
2. To Have as few terms as possible
To have several rectangles with more 1‟s and few rectangles with less 1‟s
1.
3.
Example
f = w‟x‟y‟z‟+w‟xy‟z‟+ w‟xy‟z+ w‟xyz+ wx‟y‟z‟+ w‟xyz+ wxy‟z‟+ wxyz
AB
00
01
11
10
CD
00
1
*
1
01
1
11
1
*
1 *
1
unnecessary
1
10
f = y‟z‟+wyz+w‟xz
*1
In Groups
f = b + a' c
Don’t Cares
•
Prime implicant
•
•
•
A rectangle of 1, 2, 4, 8, . . . 1‟s or X‟s not included in any one larger rectangle.
From the point of view of finding prime implicants, X‟s (don‟t cares) are treated as 1‟s.
Essential prime implicant
•
•
A prime implicant that covers at least one 1 not covered by any other prime implicant (as
always).
Don‟t cares (X‟s) do not make a prime implicant essential.
Example
f = Σm(1,7,10,11,13) + Σd(5,8,15)
AB
00
01
11
10
CD
00
01
11
10
x
1
x
1
1
x
1
1
Use don‟t cares to get as
many minterms in each
tem as possible
F = BD + A C D + AB C
In groups
•
For the following problem, find the minimum SOP expression within the options given
•
h(a,b,c) = Σm(0,1,5) + d(3,4,6,7)
a)
b)
c)
d)
e)
h = a'b' + c + a
h = a + c + b‟
h = c + b‟
h = b‟
h=c
Implementation of Two Functions
Example
F = A‟B‟C‟+A‟BC‟+ABC‟+ABC; G = A‟B‟C+A‟BC+ABC‟+ABC
AB
AB
00
01
11
C
0
1
1
1
1
1
F = A‟C‟+AB
10
00
01
11
C
0
1
1
1
1
G = A‟C+AB
1
10
Example
F = A B + ABC
F = A B + ABC
G = A B + BC
G = A B + ABC
Example
f = a b + bc
f = a b + abc
g = ab + ac
g = ab + abc
Example
F = A C + A C D + AB C
G = AC + A C D + AB C
Try
NAND, NOR
•
•
•
•
Many electronic systems automatically invert gates
Easier to fabricate with electronic components
Basic gates used in integrated circuits (IC) digital logic families.
NAND gate
•
•
universal gate
Could be used to construct any logic gate
NAND gates.
Alternate symbol for NAND.
Symbols for NOR gate.
NAND Gate Implementation
When we have a circuit consisting of AND and OR gates
such that
1. the output of the circuit comes from an OR,
2. the inputs to all OR gates come either from a system input
or from the output of an AND, and
3. the inputs to all AND gates come either from a system
input or from the output of an OR.
All gates are replaced by NAND gates, and any input coming
directly into an OR is complemented.
Example
Try: g = wx(y+z)+x‟y
NOR Gate Implementation
When we have a circuit consisting of AND and OR gates
such that
1. the output of the circuit comes from an AND,
2. the inputs to all OR gates come either from a system input
or from the output of an AND, and
3. the inputs to all AND gates come either from a system
input or from the output of an OR.
All gates are replaced by NOR gates, and any input coming
directly into an AND is complemented.
Example
Try: g = (x+y‟)(x‟+y)(x‟+z)
XOR and XNOR
A xor B is 1 if a = 1 or b is 1 and 0 if both are 1 or 0;
Develop a truth table for XOR
•
•
•
•
•
Homework
1-17
20
21
22
23
Number System
conversions
Number Systems
 The system used to count discrete units is called
number system.
 There are four systems of arithmetic which are
often used in digital electronics.
Decimal Number System
Binary Number System
Octal Number System
Hexa Decimal System
Decimal Number
system
 Decimal number system contains 10 digits:
0,1,2,3,4,5,6,7,8,9; and that is why its base or radix is
10.
 Here radix means total number of digits used in any
system.
 To indicate digits greater than 9 (nine) we shall use
the sum of these digits times power of 10.
Fractional DECIMAL
SYSTEM
 Decimal System The decimal system is composed of 10
numerals or symbols. These 10 symbols are 0, 1, 2, 3, 4, 5, 6,
7, 8, 9; using these symbols as digits of a number, we can
express any quantity. The decimal system, also called the base10 system because it has 10 digits.
104 103 102 101 100 10
1
10
2
10
3
10
4
10
5
Decimal Number
System
•
The decimal number system is a positional number system.
•
5 6 2 1
3 2 1 0
10 10 10 10
Example:
0
1 X 10 =
1
1
2 X 10 =
20
2
6 X 10 = 600
3
5 X 10 = 5000
Binary Number
System
•
•
The binary number system is also a positional numbering system.
Instead of using ten digits, 0 - 9, the binary system uses only two digits, 0
and 1.
Binary Number
System
•
The binary number system is also known as base 2. The values of
the positions are calculated by taking 2 to some power.
•
Why is the base 2 for binary numbers?
o Because we use 2 digits, the digits 0 and 1.
Fractional BINARY
SYSTEM
 In the binary system, there are only two symbols or possible
digit values, 0 and 1. This base-2 system can be used to
represent any quantity that can be represented in decimal or
other number system.
24
•
23
22
21
20
2
1
2
2
2
3
2
4
2
5
In digital systems the information that is being processed is usually presented in binary form.
Binary quantities can be represented by any device that has only two operating states or
possible conditions. Eg. a switch has only open or closed. We arbitrarily (as we define them)
let an open switch represent binary 0 and a closed switch represent binary 1. Thus we can
represent any binary number by using series of switches.
Octal Number
System




Also known as the Base 8 System
Uses digits 0 - 7
Readily converts to binary
Groups of three (binary) digits can be used to
represent each octal digit
 Also uses multiplication and division algorithms
for conversion to and from base 10
Fractional OCTAL NUMBER
SYSTEM
 The octal number system has a base of eight, meaning that it
has eight possible digits: 0,1,2,3,4,5,6,7.
84
•
83
82
81
80
8
1
8
2
8
3
8
4
8
5
Use to represent long binary numbers in computers and microprocessors.
Hexadecimal
Number System
 Base 16 system
 Uses digits 0-9 &
letters A,B,C,D,E,F
 Groups of four bits
represent each
base 16 digit
Fractional HEXADECIMAL
NUMBER SYSTEM
 The hexadecimal system uses base 16. Thus, it has 16 possible
digit symbols. It uses the digits 0 through 9 plus the letters A,
B, C, D, E, and F as the 16 digit symbols.
164 163 162 161 160 16
•
1
16
2
16
3
16
4
16
5
Use to represent long binary numbers in computers and microprocessors.
•
These digits can use to program machine language.
Binary Numbering
Scale
Base 2 Number
Base 10 Equivalent
Power
Positional Value
000
0
20
1
001
010
011
100
101
110
111
1
2
3
4
5
6
7
21
22
23
24
25
26
27
2
4
8
16
32
64
128
Significant
Digits
Binary: 11101101
Most significant digit
Least significant digit
Hexadecimal: 1D63A7A
Most significant digit
Least significant digit
Converting From
Decimal to Binary
•
•
Make a list of the binary place values up to the number being converted.
Perform successive divisions by 2, placing the remainder of 0 or 1 in each of the positions from
right to left.
• Continue until the quotient is zero.
• Example:
4210
5
4
3
2
1
0
2
2
2
2
2
2
32 16 8 4 2 1
1
0 1 0 1 0
DECIMAL TO BINARY
CONVERTION

There are two methods to convert it:i. Revese of Binary-To-Digital Method
 Decimal number write as the sum of square
 0 & 1 is write on the byte
Example 1: Convert 4510 to the binary value
Solve =
45 10
=
=
32 + 8 + 4 + 1
25
=1
0
23 22
0
20
0
1
0
12
1
ii.
Repeat division method
 The numbers is divide by 2.
 Balance for the question is written until the last answer.
Example : convert 2510 to binary
Solve =
2510 = ?2
=
=
=
=
=
.
. .
25
2
12
2
6
2
3
2
1
2
12 balance 1
LSB
6 balance 0
3 balance 0
1 balance 1
0 balance 1
Answer = 110012
MSB
Decimal to Binary
Conversion
 The easiest way to convert a decimal number to its
binary equivalent is to use the Division Algorithm
 This method repeatedly divides a decimal number
by 2 and records the quotient and remainder
The remainder digits (a sequence of zeros and ones)
form the binary equivalent in least significant to most
significant digit sequence
Division Algorithm
Convert 67 to its binary equivalent:
6710 = x2
Step 1: 67 / 2 = 33 R 1
Step 2: 33 / 2 = 16 R 1
Step 3: 16 / 2 = 8 R 0
Step 4: 8 / 2 = 4 R 0
Step 5: 4 / 2 = 2 R 0
Step 6: 2 / 2 = 1 R 0
Step 7: 1 / 2 = 0 R 1
Divide 67 by 2. Record quotient in next row
Again divide by 2; record quotient in next row
Repeat again
Repeat again
Repeat again
Repeat again
STOP when quotient equals 0
1 0 0 0 0 1 12
Decimal to binary
(fractional)
 Examples:
 Convert the decimal number (12.0625)10 into binary
number.
Solution:
Fractional part:
0.0625 x 2 = 0.1250
0.1250 x 2 = 0.2500
0.2500 x 2 = 0.500
0.500 x 2 = 1.000
(12.0625)10 = (1100.0001)2
0
0
0
1
Decimal to Octal
Conversion
Examples:
 (315)10 = (473)8
8 315
8 39
8 4
0
3
7
4
LSD
MSD
DECIMAL TO OCTAL CONVERTION
 Convert from decimal to octal by using the repeated division
method used for decimal to binary conversion.
 Divide the decimal number by 8
 The first remainder is the LSB and the last is the MSB.
Example : convert 35910 to Decimal Value
Solve =
35910 = ?8
=
=
=
.
. .
359
8
44
8
5
8
44 balance 7
LSB
5 balance 4
0 balance 5
Answer = 5478
MSB
Decimal to Octal
Conversion
Convert 42710 to its octal equivalent:
427 / 8 = 53 R3
53 / 8 = 6 R5
6 / 8 = 0 R6
Divide by 8; R is LSD
Divide Q by 8; R is next digit
Repeat until Q = 0
6538
Decimal to Octal
(fractional)
 Examples:
 Convert the decimal number (225.225)10 into octal number.
Solution:
Fractional part:
0.225 x 8 = 1.800
1
0.800 x 8 = 6.400
6
0.400 x 8 = 3.200
3
0.200 x 8 = 1.600
1
0.600 x 8 = 4.800
4
(225.225)10 = (341.16314)8
Decimal to Hexadecimal
Conversion
Examples
 (315)10 = (13B)16
16 315
16 19
16 1
0
B
3
1
LSD
MSD
Decimal to Hexadecimal
Conversion
Convert 83010 to its hexadecimal equivalent:
830 / 16 = 51 R14
51 / 16 = 3 R3
3 / 16 = 0 R3
= E in Hex
33E16
Decimal to Hexadecimal
(fractional)
 Examples:
 Convert the decimal number (225.225)10 into hexadecimal
number.
Solution:
Fractional part:
0.225 x 16 = 3.600
3
0.600 x 16 = 9.600
9
(225.225)10 = (E1.39)16
Binary to
Decimal
•
Example of a binary number and the values of the positions:
1 0 0 1 1 0 1
6 5 4 3 2 1 0
2 2 2 2 2 2 2
Binary to
Decimal
1 0 0 1 1 0 1
6 5 4 3 2 1 0
2 2 2 2 2 2 2
3
2 =8
0
2 =1
1
2 =2
2
2 =4
4
2 = 16
5
2 = 32
6
2 = 64
0
1X2 = 1
1
0X2 = 0
2
1X2 = 4
3
1X2 = 8
4
0X2 = 0
5
0X2 = 0
6
1 X 2 = 64
7710
Binary to Decimal
Conversion
 The easiest method for converting a binary
number to its decimal equivalent is to use the
Multiplication Algorithm
 Multiply the binary digits by increasing powers of
two, starting from the right
 Then, to find the decimal number equivalent, sum
those products
Multiplication
Algorithm
Convert (10101101)2 to its decimal equivalent:
Binary
1 0 1 0 1 1 0 1
x
Positional Values
Products
7
2
x x
x
6 5
2 2
2
x
4
x
3 2
2 2
x
1
2
128 + 32 + 8 + 4 + 1
17310
x
0
2
Converting from
Binary to Decimal
Practice conversions:
Binary
11101
1010101
100111
Decimal
Converting From
Decimal to Binary
Practice conversions:
Decimal
59
82
175
Binary
BINARY TO OCTAL CONVERSION
 Can be converted by grouping the binary bit in group of three
starting from LSB
 Octal is a base-8 system and equal to two the power of three,
so a digit in Octal is equal to three digit in binary system.
binary to hexadecimal
system
1 Group the digits of the binary number by four starting from
the right.
2 Replace each group of four digits by an equivalent
hexadecimal digit.
Convert 101101012 into a hexadecimal number.
1011 01012 = B516
B
5
Exercise
1 Convert 1010002 into a hexadecimal number.
2 Convert 111011112 into a hexadecimal number.
Octal to Decimal
Conversion
Convert 6538 to its decimal equivalent:
Octal Digits
Positional Values
Products
6
5
x
x
2
8
384
42710
3
x
1
8
+ 40
0
8
+ 3
OCTAL TO BINARY CONVERTION
 Convert from octal to binary by converting each octal digit
to a three bit binary equivalent
Octal digit
Binary
Equivalent
•
•
0
1
2
3
4
5
6
7
000 000 000 000 000 000 000 000
Convert from binary to octal by grouping bits in threes starting with the LSB.
• Each group is then converted to the octal equivalent
Leading zeros can be added to the left of the MSB to fill out the last group.
Octal to Binary
Conversion
Each octal number converts to 3 binary digits
To convert 6538 to binary, just substitute code:
6
5
110 101 011
3
Hexadecimal to
Decimal Conversion
Convert 3B4F16 to its decimal equivalent:
Hex Digits
3
Positional Values
x
x
x
3
16
Products
B
4
x
2
1
0
16 16 16
12288 +2816 + 64 +15
15,18310
F
HEXADECIMAL TO binary
 To convert a hexadecimal to binary number, convert each hexadecimal
digit to its 4 bit equivalent using the hexa number.
•
Solution: (23.AB)16 = 2
Example: (23.AB)16 = ()2
3
0010 0011
.
A
1010
(23.AB)16 = (00100011.10101011)2
B
1011
HEXADECIMAL TO OCTAL CONVERTION
 There is two ways to convert it:i.
Hexadecimal – Decimal – Octal
ii. Hexadecimal – Binary – Octal
i.
Hexadecimal – Decimal – Octal
i.
Hexadecimal – Binary – Octal
Hexadecimal
Number System
Binary Decimal Hexadecimal
0
1
10
11
100
101
110
111
1000
1001
Binary Decimal Hexadecimal
0
0
1010
10
A
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1011
1100
1101
1110
1111
11
12
13
14
15
B
C
D
E
F
Chapter 4 Combinational Logic
 Logic circuits for digital systems may be combinational
or sequential.
 A combinational circuit consists of input variables, logic
gates, and output variables.
123
4-2. Analysis procedure

To obtain the output Boolean functions from a logic
diagram, proceed as follows:
1.
Label all gate outputs that are a function of input variables with
arbitrary symbols. Determine the Boolean functions for each
gate output.
2.
Label the gates that are a function of input variables and
previously labeled gates with other arbitrary symbols. Find the
Boolean functions for these gates.
124
4-2. Analysis procedure
3.
Repeat the process outlined in step 2 until the outputs of the
circuit are obtained.
4.
By repeated substitution of previously defined functions, obtain
the output Boolean functions in terms of input variables.
125
Example
F2 = AB + AC + BC; T1 = A + B + C;
T2 = ABC; T3 = F2’T1;
F 1 = T 3 + T2
F1 = T3 + T2 = F2’T1 + ABC = A’BC’ + A’B’C + AB’C’ + ABC
126
Derive truth table from logic
diagram
 We can derive the truth table in Table 4-1 by using the
circuit of Fig.4-2.
127
4-3. Design procedure
1. Table4-2 is a Code-Conversion example, first, we can
list the relation of the BCD and Excess-3 codes in the
truth table.
128
Karnaugh map
2. For each symbol of the Excess-3 code, we use 1’s to
draw the map for simplifying Boolean function.
129
Circuit implementation
z = D’; y = CD + C’D’ = CD + (C + D)’
x = B’C + B’D + BC’D’ = B’(C + D) + B(C + D)’
w = A + BC + BD = A + B(C + D)
130
4-4. Binary Adder-Subtractor
 A combinational circuit that performs the addition of two bits is
called a half adder.
 The truth table for the half adder is listed below:
S: Sum
C: Carry
S = x’y + xy’
C = xy
131
Implementation of Half-Adder
132
Full-Adder
 One that performs the addition of three bits(two
significant bits and a previous carry) is a full adder.
133
Simplified Expressions
C
S = x’y’z + x’yz’ + xy’z’ + xyz
C = xy + xz + yz
134
Full adder implemented in SOP
135
Another implementation
 Full-adder can also implemented with two half adders
and one OR gate (Carry Look-Ahead adder).
S = z ⊕ (x ⊕ y)
= z’(xy’ + x’y) + z(xy’ + x’y)’
= xy’z’ + x’yz’ + xyz + x’y’z
C = z(xy’ + x’y) + xy = xy’z + x’yz + xy
136
Binary adder
 This is also called
Ripple Carry
Adder ,because of the
construction with full
adders are connected
in cascade.
137
Carry Propagation
 Fig.4-9 causes a unstable factor on carry bit, and produces a
longest propagation delay.
 The signal from Ci to the output carry Ci+1, propagates through an
AND and OR gates, so, for an n-bit RCA, there are 2n gate levels
for the carry to propagate from input to output.
138
Carry Propagation
 Because the propagation delay will affect the output signals on
different time, so the signals are given enough time to get the
precise and stable outputs.
 The most widely used technique employs the principle of carry
look-ahead to improve the speed of the algorithm.
139
Boolean functions
Pi = Ai ⊕ Bi
steady state value
Gi = AiBi
steady state value
Output sum and carry
Si = Pi ⊕ Ci
Ci+1 = Gi + PiCi
Gi : carry generate
Pi : carry propagate
C0 = input carry
C1 = G0 + P0C0
C2 = G1 + P1C1 = G1 + P1G0 + P1P0C0
C3 = G2 + P2C2 = G2 + P2G1 + P2P1G0 + P2P1P0C0
 C3 does not have to wait for C2 and C1 to propagate.
140
Logic diagram of
carry look-ahead generator
 C3 is propagated at the same time as C2 and C1.
141
4-bit adder with carry lookahead
 Delay time of n-bit CLAA = XOR + (AND + OR) + XOR
142
Binary subtractor
M = 1subtractor
; M = 0adder
143
Overflow
 It is worth noting Fig.4-13 that binary numbers in the signedcomplement system are added and subtracted by the same basic
addition and subtraction rules as unsigned numbers.
 Overflow is a problem in digital computers because the number of
bits that hold the number is finite and a result that contains n+1
bits cannot be accommodated.
144
Overflow on signed and unsigned
 When two unsigned numbers are added, an overflow is detected
from the end carry out of the MSB position.
 When two signed numbers are added, the sign bit is treated as part
of the number and the end carry does not indicate an overflow.
 An overflow cann’t occur after an addition if one number is
positive and the other is negative.
 An overflow may occur if the two numbers added are both
positive or both negative.
145
4-5 Decimal adder
BCD adder can’t exceed 9 on each input digit. K is the carry.
146
Rules of BCD adder
 When the binary sum is greater than 1001, we obtain a non-valid
BCD representation.
 The addition of binary 6(0110) to the binary sum converts it to the
correct BCD representation and also produces an output carry as
required.
 To distinguish them from binary 1000 and 1001, which also have a
1 in position Z8, we specify further that either Z4 or Z2 must have a
1.
C = K + Z8Z4 + Z8Z2
147
Implementation of BCD adder
 A decimal parallel
adder that adds n
decimal digits needs n
BCD adder stages.
 The output carry from
one stage must be
connected to the input
carry of the next
higher-order stage.
If =1
0110
148
4-6. Binary multiplier
 Usually there are more bits in the partial products and it is necessary to use full
adders to produce the sum of the partial products.
And
149
4-bit by 3-bit binary multiplier
 For J multiplier bits and K
multiplicand bits we need (J
X K) AND gates and (J − 1)
K-bit adders to produce a
product of J+K bits.
 K=4 and J=3, we need 12
AND gates and two 4-bit
adders.
150
4-7. Magnitude comparator
 The equality relation of each pair
of bits can be expressed logically
with an exclusive-NOR function
as:
A = A3A2A1A0 ; B = B3B2B1B0
xi=AiBi+Ai‟Bi‟
1, 2, 3
for i = 0,
(A = B) = x3x2x1x0
151
Magnitude comparator
 We inspect the relative magnitudes
of pairs of MSB. If equal, we
compare the next lower significant
pair of digits until a pair of unequal
digits is reached.
 If the corresponding digit of A is 1
and that of B is 0, we conclude that
A>B.
(A>B)=
A3B’3+x3A2B’2+x3x2A1B’1+x3x2x1A0B’0
(A<B)=
A’3B3+x3A’2B2+x3x2A’1B1+x3x2x1A’0B0
152
4-8. Decoders
 The decoder is called n-to-m-line decoder, where
m≤2n .
 the decoder is also used in conjunction with other
code converters such as a BCD-to-seven_segment
decoder.
 3-to-8 line decoder: For each possible input
combination, there are seven outputs that are equal
to 0 and only one that is equal to 1.
153
Implementation and truth table
154
Decoder with enable input
 Some decoders are constructed with NAND gates, it becomes
more economical to generate the decoder minterms in their
complemented form.
 As indicated by the truth table , only one output can be equal to 0
at any given time, all other outputs are equal to 1.
155
Demultiplexer
 A decoder with an enable input is referred to as a
decoder/demultiplexer.
 The truth table of demultiplexer is the same with decoder.
A
B
D0
Demultiplexer
E
D1
D2
D3
156
3-to-8 decoder with enable
implement the 4-to-16 decoder
157
Implementation of a Full Adder with
a Decoder
 From table 4-4, we obtain the functions for the combinational circuit in sum of
minterms:
S(x, y, z) = ∑(1, 2, 4, 7)
C(x, y, z) = ∑(3, 5, 6, 7)
158
4-9. Encoders
 An encoder is the inverse operation of a decoder.
 We can derive the Boolean functions by table 4-7
z = D1 + D3 + D5 + D 7
y = D2 + D3 + D6 + D 7
x = D4 + D5 + D6 + D 7
159
Priority encoder
 If two inputs are active simultaneously, the output
produces an undefined combination. We can establish an
input priority to ensure that only one input is encoded.
 Another ambiguity in the octal-to-binary encoder is that an
output with all 0’s is generated when all the inputs are 0;
the output is the same as when D0 is equal to 1.
 The discrepancy tables on Table 4-7 and Table 4-8 can
resolve aforesaid condition by providing one more output
to indicate that at least one input is equal to 1.
160
Priority encoder
V=0no valid inputs
V=1valid inputs
X’s in output columns represent
don’t-care conditions
X’s in the input columns are
useful for representing a truth
table in condensed form.
Instead of listing all 16
minterms of four variables.
161
4-input priority encoder
0
 Implementation of
table 4-8
0
0
0
x = D2 + D3
y = D3 + D1D’2
V = D 0 + D1 + D2 + D3
162
4-10. Multiplexers
S = 0, Y = I0
S = 1, Y = I1
Truth Table
S
0
1
Y
I0
I1
163
Y = S’I0 + SI1
4-to-1 Line Multiplexer
164
Quadruple 2-to-1 Line Multiplexer
 Multiplexer circuits can be combined with common selection inputs to provide
multiple-bit selection logic. Compare with Fig4-24.
I0
Y
I1
165
Boolean function implementation
 A more efficient method for implementing a Boolean function of n
variables with a multiplexer that has n-1 selection inputs.
F(x, y, z) = (1,2,6,7)
166
4-input function with a multiplexer
F(A, B, C, D) = (1, 3, 4, 11, 12, 13, 14, 15)
167
Three-State Gates
 A multiplexer can be constructed with three-state gates.
168