MOS fabr ication pr ocess
• nMOS
• CMOS
• BiCMOS
for logic
for I/O and driver circuit
nMOS fabr ication
Summar y of an nMOS pr ocess
Depletion mode only
SiO 2
Mask Layout
L-Edit layout program
Technology Setup
• Setup > Technology > MOSIS: Orbit 2U SCNA
CIF Layer s
• Setup > CIF
CIF Layer Names
CMOS Poly Gate (CPF)
Poly (Poly1)
CMOS Electr ode (CPS)
(Poly2)
CMOS Active Ar ea
Active (Thinox=n-diff + tr ansistor channel)
CMOS Metal Fir st
Metal 1
CMOS Metal Second
Metal 2
CMOS Well N-diff
N well
CMOS Select N
N select
CMOS Select P
P select
CMOS Contact Poly
Poly contact
CMOS Contact Electr ode
Poly2 contact
CMOS Contact Active
Active contact
CMOS Via
Via
CMOS Over glass
Over glass
Enhancement Mode NMOS Mask Layout
(1) Use Layout program (L-Edit) to draw 6 masks of an enhancement mode nMOS
process by using L-edit and Orbit 2µm double metal, double poly, CMOS technology.
4λ
10λ
4λ
20λ
2λ
2λ
4λ 4λ 4λ 4λ
28λ
Mask #1- CAA
Use CAA (CMOS Active Ar ea) layer to dr aw a
W=28 H=20 r ectangular and define the n-diffusion
+tr ansistor channel.
4λ
4λ
20λ
2λ
2λ
4λ 4λ 4λ 4λ
28λ
Mask #2- CPG
Use CPG (CMOS Poly Gate) layer to dr aw a
W=4 H=24 and a W=8 H=8 r ectangular s and
define the poly gate.
4λ
10λ
4λ
20λ
2λ
2λ
4λ 4λ 4λ 4λ
28λ
Mask #2 again for n +-diffusion (CSN)
Use CSN (CMOS select N) to dr aw a W=32 H=24
r ectangular for you to select the n-diffusion r egion
within CAA, but not pr otected by CPG.
4λ
10λ
4λ
20λ
2λ
2λ
4λ 4λ 4λ 4λ
28λ
Cr oss-Section
Mask #3- CCP & CCA
CCP
CCA
CCA
Use CCP (CMOS Contact Poly) and CCA (CMOS
Contact Active) to dr aw 5 W=4 H=4 r ectangular to
open the poly contacts thr ough thick OX
4λ
10λ
4λ
20λ
2λ
2λ
4λ 4λ 4λ 4λ
28λ
Cr oss Section after Mask #3
Mask #4 - CMF
CMF
Use CMF to dr aw metal lines to contact Poly and
n-diffusion thr ough CCP and CCA open ar eas.
4λ
10λ
4λ
20λ
2λ
2λ
4λ 4λ 4λ 4λ
28λ
Cr oss Section after Mask #4
Mask #5 – Via layer
CVA
Use CVA to dr aw 3 W=4, H=4 via openings thr ough OX.
Mask #6 – Over galss Opening
COG
Use COG to dr aw 3 W=4, H=4 via openings thr ough Over glass
(demo pur pose, violate design r ules).
Summar y of nMOS Layer s
Over glass
OX
Poly1(CPG)
n +- diffusion
n +- diffusion
Thin OX
P-doped Si wafer
COG
CVA
Metal (CMF)
OX