of the pixel telescope from plate

Detectors
- what detectors are available diamond / silicone
- transport / shipping
- 3 ROCs at UT?
ROC Operation / Readout Modules (ED)
- what modules do we prepare, test, send to UT - schedule
- shipping method
Location H4
- final confirmation of location --> are we on the concrete block?
- table measures; height block  beam?- can table be placed flat (no height variation)
- Availability of power, ethernet ports (2) within beam area / in counting hut Dmitry
PMT telescope (fixture) – see slide
What modules available / to carry / to ship
- walk through setups – see slides
Timeline
Updates on setups / measurements
Reference frame / fixture
1
PMT
no variation in height
along x and y
2 (can be aligned beforehand)
Then fix structure at first detector
3
(can be aligned beforehand)
Pin under detector 1.
2 threads, 2 counters.
Reference frame / fixture
-Align pixels with respect to beam ( PMT telescope) – pre-alignment in lab?
-Keep in place (no pull from cables) – need reference/fixture
How to adjust height of PMTs with respect to
-Light tighten (frame around telescope
the pixel telescope?
-Easy access without accidental realignment
Dimensions (height) of the pixel telescope from
plate – do we have the final telescope?
Tube sizes possible (biggest  adjust with
foam)
Fix plate on table after alignment with beam.
Box to protect against
cloth?  cooling?
~10cm
Pin hole for
Standard PLT
Layer 1
PLT cable fixture
Scintillator
Small dimension,
adjusted in height
Aluminum (Wood) plate
Held in place by clamp?
Fixture (semi flexible)
- Foam bed for PMT (how hight)
1) Align PMT telescope – coincidence rate on scaler – pull plate on table (thread)
2) Align pixel telescope with respect to PMT / beam – held in place (fixture on plate)
3) Cover pixels with box (frame to make setup light tight)
Setup
break down into modules (responsibilities)
-> Detector
-> PMT telescope / Trigger
-> FED readout / ADC card
-> Digi Oscilloscope
Detector:
This equipment will be in vicinity of detectors – can be placed on table
flexible connection between detector and test board (length = ?)
- 3 layers (ROC+detector, HDI mounted to frame)
- flat cables to connect to test board
- Test beam test board (TBM + FO + )
- 3 fast out analog  3 coax cable, BNC connector  FED, Osci (Split? We do)
- 3 fast out digital  Trigger
- external clock from TTCI (NIMTTL); 2x coax, lemo
- FEC board
- ribbon cable
- HV Keithly – up to 500V (can 220V – power cable)
- coax cable, banana to BNC connector?
- 2x 5V power supplies (Aligent – available for 220V – power cable)
- test beam board, FEC board  power cables
- TTL pulser (can 220V – power cable)
- 2 coax cables (2m), T-connector
Rutgers - please ask others to bring equipment (you cannot provide)
What comes from UT (goes there first)
PMT/Trigger:
This equipment will be in vicinity of detectors – can be placed on floor
connection length 2m
- 2 PMT + scintillators (one with dimension <1cmx<1cm)
- NIM crate
- HV supply (2 channels; up to ~1.7 kV)
NIM
delays
- 2 HV supply cables
- 2 readout cables/BNC  Lemo
- lemo cables (5x30cm+5x1m) for timing adjustment (delay unit?)
- lemo cable connectors
- Discriminator 2 channels (has 4) / alternatively CFD NIM
- 2 coax cables + lemo connectors
- 4 Quad coincidence unit
NIM
- 2 coax + lemo
- Level translator NIM (8)  TTL (8) LeCroy 688AL NIM (12 ns delay)
PMT
TTCI
Test board
NIM  TTL
TTL  NIM
Dscr
Coinci
FO digital layer 1(2,3)
Trigger in
Bob
Richard
Bill
PMT/Trigger:
- NIM gate generator
NIM
- 2 counters (PMT telescope, diamond telescope)
NIM
- second NIM bin with coax cable from coincidence?
Bob
Richard
Bill
FED/ADC readout: ADC card for calibration, DACs; FED for DAQ
This equipment will be in vicinity of detectors – can be placed on floor
connection length 2m
- 9U CERN standard crate + 3 6U slots
- VME bridge
- PCI optical card + fiber  PC
- TTCI
- clock,
- FED
- 3x coax, BNC in for each analog in; each 100 W termination
- each attenuation (~500 W)
- coax, BNC in for full readout
- attenuation
- ADC PCI card - 4 input coax cables, BNC ; T-connectors
- PC houses PCI cards (long ethernet cable; PC registration!)
In the area
VME crate
PC, no monitor; 2 users
Runs COSMO
FED communication
PC1 Acquisition to disk
PC + monitor
Logon on PC1 and
X-windows of PC1
PC2
Ethernet
switch
BRMPC5
?
Needed! Laptop?
Matt
Will
John
Digi Oscilloscope: Adjustment, full readout snapshots (100 per 30s high resolution);
Backup
Tektronix TDS5000B will be in vicinity of detector – can be placed on floor
connection length 2m; connections split for Osci and FED, ADC or alternative?
- Oscilloscope (4channel, all trigger, waveform acquisition to disk)
- 220V  110V transformer
- 4 coax cables BNC
- VGA -> RCA -> Coax (25m ?)
- TV (screen - available in counting room (?) or portable TV (PAL, NTSC) )
In the area
Ethernet
Oscilloscope
switch
Laptop
Remote control
Oscilloscope
Windows PC VGARCACoax
BRMPC5
Matt
TV screen
Timeline -
17 May – 24 May at H4 Prevessin, CERN
Analog FO studies with ROC-only board
Test: How many DCOL's can we resolve in the analog fastout with
different DAC settings?
Procedure:
- Turn on calibration on one pixel
- Measure maximum value for the analog signal
- Turn on calibration on another pixel two double columns away, i.e.,
skip a double column
- Measure the new max value
- Repeat...
Test Findings (Matt)
Case 1:
- VIColOr: 100.4 uA
- VnPix: 8.5 uA
- VsumCol: 31.8 uA
Heights Resolvable: 6
Can't resolve levels by max value
#pixel:Integrals (x10E-9)
1: 1.5
2: 2.8
3: 4.0
4: 5.0
5: 5.9
6: 6.7
7: 8.3
Case 2:
- VIColOr: 100.4 uA
- VnPix: 8.5 uA
- VsumCol: 47.6 uA
Heights Resolvable: 7
#:Integrals (x10E-9)
1: 1.6
2: 2.9
3: 4.0
4: 5.0
5: 5.8
6: 6.5
7: 8.5
Analog FO studies with ROC-only board
- Sometimes, once many alternating double columns have hits in them (~7), and
we then enable another column between two already active columns, strange
things happen
Example 1: Multiple TTL FO signals are generated
Example 2: The analog FO gets a second hump every once in a while
Today: use the FED readout
- optimize ADC range with attenuator
- establish take data procedure
- optimize 25ns integration window for analog FO