ISM P A E F F I C I ENCY
P I N S W I TC H T H E R M A L M A N A G E M E N T
DesignFeature
Taming Temperature In
High-Power PIN Switches
Thermal management efforts for high-power PIN diode switches
should include a combination of test equipment and software,
using thermal imaging and 3D thermal modeling, respectively.
MICHAEL HEBERT
Mechanical Engineer
Micronetics, Inc., 26 Hampshire Dr., Hudson, NH 03051;
(603) 883-2900, e-mail: [email protected],
Internet: www.micronetics.com.
T
ements can rapidly cool when the
power is off. In predicting the effects of high power levels on such
a system, it is necessary to know if
these elements fully cool down before the next burst of energy arrives.
Without proper control of the heat
rise, thermal runaway could occur,
a condition in which each successive
pulse adds to a continuing rise in
the temperature of a critical element
until performance degradation and/
or failure occurs. The thermal time
constant is the critical parameter in
how quickly the element heats and
cools.
In developing a thermal-management strategy for a PIN diode
switch operating at high power levels, it is necessary to examine three
primary elements:
hermal management is
one of the critical disciplines in high-power,
1. This is a thermal image of an RF switch
high-reliability PIN dioperating under high-power, steady-state
ode design. Although
CW conditions.
power levels can vary
dramatically for comand system will arrive at a single
ponents operated under
steady-state condition. The dycontinuous-wave (CW) and pulsed
namic nature of a pulsed system is
conditions, the goal of any thermalmore difficult to predict. The short
management effort is the effective disbursts of energy in a pulsed system
sipation of power to prevent thermal
rapidly heat critical elements when
buildup in the component and system
the power is on, but those same elin which it is used. Fortunately, the task is made simpler by moderately priced
infrared thermal imagers
and finite-element-analysis
(FEA) software that can run
on a well-equipped personal
computer (PC).
Although high power
levels in a CW system can
be more stressful on comp-region
ponents than high power in
i-region
n-region
a pulsed system, the effects
are relatively straightforward to predict and measure since the components 2. This is a typical three-dimensional (3D) model of a PIN diode switch.
3537_MWRF_MICRO.indd 1
• the PIN diode junction
(with a short thermal time
constant),
• the substrate on which
the PIN diodes comprising a switch are mounted
(which has a longer thermal time constant), and
• the PIN diode switch’s
housing (with a very long
thermal time constant).
When RF power is applied to a PIN diode switch,
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P I N S W I TC H T H E R M A L M A N A G E M E N T
DesignFeature
heat is primarily generated
concentration has an inby the dissipation of power
verse effect on the desired
in the diode junction as it
thermal properties. Figure 2
absorbs a small amount of
shows a typical PIN diode
the power and converts it to
3D model.
heat. How the heat spreads
The diode’s i-region can
from the diode junction to
be assumed as pure silicon
the substrate and then to
and the thermal properties
the housing over a series of
of that material applied to
pulses will ultimately deterthe model, while for the
mine how hot the junction
p-region the properties of
of the PIN diode gets. It
boron-doped silicon can be
has long been proven that
applied and for the n-region
maintaining a junction temthe properties of phosphoperature below +150oC is
rous-doped silicon can be
required for high reliabil- 3. Proper model meshing uses an ample number of nodes and elements used in the model. With
ity.
through the thickness of each portion of the switch’s geometry.
these device region propAnalysis of a high-power
erties established, a solid
model assembly is then
CW system is performed by
created and meshed in
means of thermal imaging
preparation for simulation
in conjunction with therinputs. Figure 3 shows a
mal software simulations.
Figure 1 shows the steadymeshed model containing
state thermal image of an
two PIN diodes, mounted
RF switch under high CW
on an aluminum nitride
power conditions. The PIN
substrate, then mounted
diode switch incorporates
to a pedestal portion of a
chip-and-wire construction
metal housing. Meshing
with a variety of series and
should be performed in
shunt inductive (L), resissuch a way that an ample
tive (R), and capacitive
number of nodes and ele(C) elements soldered and 4. These are the thermal analysis results for a switch consisting of four
ments are present through
bonded onto the switch cir- shunt PIN diodes with uneven power dissipation across the diodes.
the thickness of each porcuit substrate. Thermal imtion of the switch’s geomaging can provide invaluable insight
The SolidWorks Simulation softetry, resulting in the biased mesh
into the heat flow of such a circuit ware interface allows the use of in Fig. 3. To improve accuracy, the
and potential hotspots where heat existing solid models for housing, software allows for the definition
might build to potentially danger- shims, substrates, and other major of contact interfaces between solid
ous temperatures. Verifying prior components in a PIN diode design. bodies to include the thermal resisassumptions about heat dissipation Three-dimensional (3D) modeling tance of solders or epoxies used to
or discovering unexpected hot spots of PIN diodes allows for accurate attach each component.
aids in building a broad knowl- simulation of heat dissipation, ocTo run the simulation, proper
edge base of high-power devices. curring in the intrinsic (i) region, as boundary conditions and power disIn addition, the use of SolidWorks well as incorporation of the varying sipation must be employed. Power
Simulation FEA software from Das- material properties in each region, is dissipated evenly throughout the
sault Systems SolidWorks Corp. due to the doping of the silicon.1,2 volume that constitutes the i-region
(www.solidworks.com) has drasti- Given that the doping concentra- of the diode, the amount of which
cally increased thermal management tions of the positive (p) and negative is based on the estimated power loss
capabilities when designing high- (n) regions of silicon diodes are not across the diodes. Boundary condipower PIN diode switches. This is always known, it is usually best to tions are selected that can be replitypically done in three steps: gener- assume a fully doped concentration, cated in the test lab under a thermal
ating a thermal model, verifying the due to the fact that doping levels imaging camera—for example a
model, and calibrating the model.
have a maximum and the doping baseplate held at +25oC, achieved
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P I N S W I TC H T H E R M A L M A N A G E M E N T
DesignFeature
Temperature—ºC
by a liquid-nitrogen-fed temperature 5. A cross-sectional PIN diode
control unit.
switch model can provide valuModel results can now be com- able insight when considering
pared to thermal images. Discrepan- results of a transient response.
cies can be compensated by adjusting inputs to the simulation, creating PIN diodes. Combined
a calibrated thermal model for the with the electrical heat
part under analysis. Once such a calgenerated by the diode as
ibrated model has been constructed,
the product of the current
the effects of changing factors, such squared and resistance (P = I2R), this
probe locations in the example.
as epoxies/adhesives, material geresults in 64 W of dissipated heat at
To help with the model developometry/properties/orientation, and the PIN diode, specifically in the inment, the on-cycle thermal rise reboundary conditions, may be ex- trinsic region. For this example, con- sponse of a PIN diode can be charplored very quickly on the computer sider a pulse duration of 715 ms and acterized by the equation:
model, eliminating the need for long a duty cycle of 22 percent.
ΔTM = PDθ(1-e-t/τ)
time spent to physically rebuild and
The first step in analyzing a PIN
test each new switch configuration. diode switch under these conditions
where
After a design is optimized using is to calibrate a thermal analysis
ΔTM = the temperature rise above
simulations, and a physical protomodel according to a known CW the heat-sink temperature,3
type of the unit is built, the results power input condition that can be
PD = the power dissipation,
may then be verified by means of
verified in the test laboratory. The
θ = the thermal resistance, and
thermal imaging of the prototype.
selection of this CW power level can
τ = the thermal time constant.
Figure 4 shows the thermal analysis
be made by calculating the average
results for a switch consisting of four power that the switch sees under
The off-cycle thermal decay can
shunt PIN diodes with an uneven
pulsed conditions, although differ- be characterized by the equation:
ent levels may be used if they help
power dissipation across the diodes.
In some thermal modeling efforts, to simplify the test setup. After the
TJ = TS + ΔTM(e-t/ )
it may be tempting to use the ther- model is fine-tuned and calibrated, a
where
mal rise from device base to junc- transient input may be entered into
TJ = the junction temperature and
the model. At this time, having the
tion (θjc), as reported on PIN diode
TS = the heat-sink temperature.
discrete 3D model of the PIN diode
data sheets, to calculate the thermal
geometry is a very valuable asset. By
rise through the diode, and omit the
The above equations are based
setting up probes at various spots on ideal, controlled scenarios and
component model from a computerwithin the model, it is possible to should be considered, but do not
aided thermal analysis. However,
track the thermal response at those govern the response of a complithe details contained in a cross seclocations. Figure 6 plots temperature cated system assembly with more
tion of a model (Fig. 5) will provide
valuable insight when considering
as a function of time for different complex geometry and properties.
results of a transient reHowever, it should be notsponse.
ed that the influence of the
+110
For many high-power
longer thermal time con+100
PIN diode switch applicastant of the housing geom+90
tions, the worst-case heat
etry initially results in mini+80
dissipation occurs in a
mal temperature recovery
+70
pulsed-power
condition.
of the housing after each
+60
For very short duration
pulse cycle—compared to
+50
pulses, the transient rethe thermal time constant
sponse cannot be captured
of the diode that allows it
+40
+30
using thermal imaging
to recover relatively quick0
20
40
60
equipment. Consider a PIN
ly. The stored heat in the
Time—ms
diode switch with 2800-W
housing affects the transient response of each subinput power and 0.1-dB 6. This plot shows temperature as a function of time for the example
insertion loss, all of which switch, using 2800 W input power at pulse duration of 715 ms and duty sequent cycle, such that the
initial on-pulse temperature
is assumed to occur at the cycle of 22 percent.
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P I N S W I TC H T H E R M A L M A N A G E M E N T
DesignFeature
profile may have higher temperatures. Under certain conditions,
this may cause thermal runaway;
however the response may also
reach a pulse-to-pulse equilibrium.
Figure 7 shows some typical thermal
profiles occurring at the end of the
power-on portion of the cycle and
the end of the power-off portion,
respectively.
Using a thermal imaging camera, only the temperatures on the
outer surfaces seen by the camera
can be read. Due to the typical fine
geometry of the p-region thickness,
the model’s Tmax and Tjunction values are considered to be the same.
As a quick check, the average temperature as seen on the thermal
imaging camera is compared to
the average maximum temperature from the model results. If the
thermal response is carefully characterized by analyzing model results, then a relationship between
the boundary temperature, average
temperature, and peak temperature
can be established. A test technician or engineer can then monitor,
using thermal imaging, the average
temperature of a pulsed condition
and estimate of the peak tempera-
ture levels that will occur but cannot be measured. This sort of capability can be utilized to increase
the confidence of maintaining peak
temperatures below the +150oC
Tjunction high-reliability limit. Accurate, proven thermal models
may be modified easily such that
the limiting factors of power levels, pulse duration, duty cycle, and
boundary conditions may all be
manipulated to define matrices of
maximum conditions for given designs. This technology helps drive
the boundaries of high-power PIN
diode switch design outward.
High-power switch designs at
Micronetics typically undergo this
thermal management process of
modeling and imaging. Imaging
helps to fine tune the models for
improved accuracy. Every new design, no matter how benign, will
undergo a thermal image as a pre-
7. These are typical thermal profiles occurring
at the end of the power-on and power-off
portions of a pulsed duty cycle.
cautionary measure as sometimes
an unexpected element in a design will get hot under high-power
conditions. Sometimes this can be
as simple as a ground return coil
or current-limiting resistor, not
necessarily a critical element such
as a PIN diode. For some critical
programs, thermal imaging is part
of the Acceptance Test Procedure
(ATP) so 100 percent of the products will be imaged.
REFERENCES
1. M. Asheghi, K Kurabayashi, R. Kasnavi, and K.E. Goodson, “Thermal Conduction in Doped Single-Crystal
Silicon Films,” Journal of Applied Physics, Vol. 91, No. 8,
April 15, 2002, pp. 5097-5088.
2. M. G. Burzo, P. L. Komarov, and P. E. Raad, “Non-Contact Thermal Conductivity Measurements of P-Doped
and N-Doped Gold-Covered Natural and Isotropically
Pure Silicon and their Oxides,” Department of Mechanical Engineering, Southern Methodist University.
3. J. F. White, Microwave Semiconductor Engineering, J. F.
White Publications, 1995.
Copyright © 2010 by Penton Media, Inc.
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