1
11. Microwave amplifier design
전자파 연구실
Microwave amplifiers
2
Low noise amplifier
Broad band amplifier
Power amplifier
DC bias (동작점)에 따라 트랜지스터의 S-parameter가 달라짐.
전자파 연구실
11.1 Two port power gains
3
1. Power gain = G = PL/Pin : ratio of power dissipated in the load ZL to the power
delivered to the input of the two-port network.
2. Available gain = GA=Pavn/Pavs : ratio of the power available from the two port network
to the power available from the source
3. Transducer power gain = GT = PL/Pavs : ratio of the power delivered to the load to the
power available from the source.
If the input and output are both conjugately matched to the two-port, then the gain is
maximized and G= GA= GT .
S
Z S Z0
Z Z0
, L L
ZS Z0
Z L Z0
전자파 연구실
4
Input reflection
V1 S11V1 S12V2 S11V1 S12LV2
2
21 1
22 2
21 1
22 L 2
V S V S V S V S V
V1
V2
V2
S11 S12 S11 S12L
V1
V1
V1
V2
(1 S 22L ) S 21
V1
Z Z0
V1
S S
in S11 12 21 L in
V1
1 S 22L Z in Z 0
Z in Z 0
1 in
1 in
(Input impedance)
Output reflection
out
S S
V2
S 22 12 21 S
V2
1 S11S
전자파 연구실
V1 VS
Z in
V1 V1 V1 (1 in )
Z S Z in
Z in Z 0
1 in
1 in
1 in
1 in
Z0
V (1 S )
1
V1 VS
VS
S
(1 in ) Z Z 1 in
Z S (1 in ) Z 0 (1 in ) 2 1 S in
S
0
1 in
Z0
전자파 연구실
Power gain
2
2
2
V
1 S
1
2
2
Pin
V1 (1 in ) S
(1 in )
2Z 0
8 1 S in
2
1
1
2
PL
V2 (1 L )
V1
2Z 0
2Z 0
VS
2
8Z 0
S 21 (1 L ) 1 S
2
1 S in
1 S 22L
2
2
S 21 (1 L )
2
2
1 S 22L
2
2
2
S 21 (1 L )
P
G L
Pin 1 S 22L 2 (1 in 2 )
2
2
전자파 연구실
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Available gain
Pavs Pin
*
in S
Pavn PL
*
L out
VS
1 S
2
8 1 S
2
VS
2
8Z 0
2
2
2
2
2
2
2
2
S 21 (1 out ) 1 S
VS S 21 (1 S ) 1 S
* 2
1 S in
8Z 0 1 S11S 2 1 out 2
1 S 22out
S (1 S ) 1 S
P
G A avn 21
2
2
Pavs
1 S11S
1 out
2
2
2
Transducer power gain
S (1 S )(1 L )
P
GT L 21
2
2
Pavs
1 S in 1 S 22L
2
2
2
전자파 연구실
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Conjugate matched case
GT S 21
L S 0
2
Unilateral transducer gain: S12=0
S 21 (1 S )(1 L )
2
GTU
2
1 S11S 1 S 22L
2
2
2
전자파 연구실
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11.2 Stability
If the input or output port impedance has a negative real part, oscillation
is possible.
in 1,
1.
2.
out 1
Unconditional stability : |Гin|<1, |Гout|<1 for all passive source and
load impedances. ( |Гs|<1 and |ГL|<1 )
Conditional stability : |Гin|<1, |Гout|<1 for a certain range of passive
source and load impedances.
전자파 연구실
Stability circles
in S11
S12 S21L
1
1 S22L
out S 22
S12 S 21S
1
1 S11S
Output stability circle
2
in
2
S S
S11 12 21 L 1
1 S 22L
S11 (1 S 22L ) S12 S 21L 1 S 22L
2
S11 ( S12 S 21 S11S 22 )L 1 S 22L
2
2
2
L S11 S 22L 1 , S11S 22 S12 S 21
2
2
S 22
2
2
S S (S
S SS 1 S
2
L
*
11
22
*
22
L
S11* )L* 1 S11
2
2
S 22
2
*
22
2
L
*
11
11
2
2
*
S 22
S11*
S 22
2
22
S 22
2
2
*
S 22
S11*
L
2
S 22
2
2
S12 S 21
S11S 22
S 22
2
2
2
S12 S 21
2
S 22
2
2
2
S 22
2
2
2
2
2
전자파 연구실
Case 1)
S22
L
*
S 22
S11*
S 22
2
L CL RL
Case 2)
2
S12 S 21
S 22
2
CL
2
*
S 22
S11*
S 22
2
, RL
2
S12 S 21
S 22
2
2
S22
L CL RL
Case 1)
CL
*
S 22
S11*
S 22
2
, RL
2
S12 S 21
S 22
2
2
Case 2)
전자파 연구실
Input stability circle
Case 1)
S11
S
S11* S 22*
S11
2
S CS RS
Case 2)
2
S12 S 21
S11
2
CS
2
S11* S 22*
S12 S 21
S11
S11
2
, RS
2
2
2
S11
S CS RS
CS
S11* S 22*
S11
2
2
, RS
Case 1)
S12 S 21
S11
2
2
Case 2)
CS
RS
CS
RS
S 1
S 1
전자파 연구실
Test for unconditional stability : K-Δ test
(1) K-Δ test
CL RL 1
CS RS 1
원 내부 영역이 |Γin|=1
인 원과 겹치지 않으면
됨.
S11
CL
1 S11 S 22
2
K
2
2 S12 S 21
*
S 22
S11*
S 22
2
2
, RL
S12 S 21
S 22
2
2
2
1,
1 S11S22 S12S21
(2) μ test
1 S11
* 2
11
S 22 S
2
S12 S 21
1
전자파 연구실
Example 11.2 Transistor stability
전자파 연구실
전자파 연구실
11.3 Single-stage transistor amplifier
Design for maximum gain (Conjugate matching)
(1) Maximum power transfer from the source to the transistor
in S*
(2) Maximum power transfer from the transistor to the load
out L*
GT ,max
1
1 S
2
S 21
1 L
2
2
1 S 22L
2
아래 식에 대해 연립 방정식 풀어야 함
S* in S11
S12 S 21L
1 S 22L
L* out S 22
S12 S 21S
1 S11S
전자파 연구실
전자파 연구실
Example 11.3 Conjugately matched amplifier design
전자파 연구실
전자파 연구실
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전자파 연구실
전자파 연구실
Unilateral figure of merit
Transducer power gain
S (1 S )(1 L )
P
GT L 21
2
2
Pavs
1 S in 1 S 22L
2
2
2
Unilateral transducer gain: S12=0
S 21 (1 S )(1 L )
2
GTU
2
2
1 S11S 1 S 22L
2
2
1
GTU
1
(1 U ) 2 GU
(1 U ) 2
Unilateral figure of merit :
U
S12 S21 S11 S22
(1 S11 )(1 S22 )
2
2
전자파 연구실
Impedance matching
전자파 연구실
Constant resistance, reactance circles
imag
x
r=0
r=0.5
r=1
r=2
0
0.5
1
real
R
2
imag
x
2
x=0.5
x=1
1
x=2
0.5
R
real
0.5
1
x=-2
x=-1
2
x=-0.5
전자파 연구실
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Impedance-admittance chart
ZL= 200-j 100
Z0= 100
f = 500MHz
0.0
1
0.2
Add series L
X
1.2 X L 1.2 Z 0
Z0
L
1 .2 Z 0
Add shunt C
B 0.3Y0
38.2 [nH]
0.5
C
1.2
0.3
C
Z0
0.3
0.95 [pF]
Z0
전자파 연구실
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Basic Smith chart operation
1. Translation
2 l
( z l )
( z 0)
( z l ) ( z 0) e j 2 l
2. Add series element
L
C
전자파 연구실
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3. Add shunt element
L
C
전자파 연구실
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Example 5.1
Figure 5.3a (p. 226)
Solution to Example 5.1.
(a) Smith chart for the L-section
matching networks.
3
ZL= 200-j 100
Z0= 100
f = 500MHz
2
5
1
4
전자파 연구실
5.2 Single stub tuning
ZL= 60-j 80
Z0= 50
f = 2GHz
Translate by ‘d’
y1 1 j1.4
zL 1.2 j1.6
d2 0.266
1
1
zL 1.2 j1.6
d1 0.11
0.314
0.314
0.422
D를 변화시켜 1+jb 원의 원주 상에 yL이
오도록 한다.
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전자파 연구실
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Add shunt stub (shorted)
l1 0.096
l2 0.405
y1 1 j1.4
y1 1 j1.4
1+jb 원의 원주 상의 지점을 shunt stub(병
렬 stub)을 달아서 Γ원의 원점으로 옮기
면 impedance matching이 완료됨.
전자파 연구실
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0.422
Impedance matching 순서
zL이 1+jb 원의 원주 상에 올 수
있도록 d1을 조절한다.
(점선 원) 상에zL이 옮겨 올 수 있
도록 L1을 조절한다.
d2 0.266
y1 1 j1.4
d1 0.11
zL 1.2 j1.6
1
0.314
전자파 연구실
Unilateral case
Without feedback,
S* in S11
S12 0
out
*
L
S12 S 21L
1 S 22L
S S
S 22 12 21 S
1 S11S
The impedance matching
becomes very simple job.
S* in S11
L* out S 22
Without rb’c and Cc, this transistor
become unilateral.
전자파 연구실
Stabilization method
Input stability
in
Z in Z 0
1 and
Z in Z 0
Re{ Z in } 0
out
Z out Z 0
1
Z out Z 0
Re{Z out } 0
and
트랜지스터가 unstable한 경우 직렬 또는 병렬로 저항을 연결하면 안정도가 바뀐다.
Re{Z in Rin Z S } 0
or
Re{Yin Gin YS } 0
전자파 연구실
Output stability
The corresponding condition is
Z L} 0
Re{Z out Rout
or
YL } 0
Re{Yout Gout
전자파 연구실
Neutralization or unilateralization
전자파 연구실
Constant gain circle and design for specified gain
S (1 S )(1 L )
P
GT L 21
2
2
Pavs
1 S in 1 S 22L
2
2
2
Without feedback, an amplifier becomes unilateral.
S12 0
(1 S )
2
GTU GS G0GL
1 S11S
2
(1 L )
2
S 21
2
1 S 22L
2
G
S
G0
GL
2
(1 S )
2
1 S11S
2
S 21
2
(1 L )
2
1 S 22L
GS, GL are maximized when S* S11, L* S 22
GS ,max
1
1 S11
, GL ,max
2
1
1 S 22
2
gS, gL are defined as normalized gain factors
(1 S )
GS
2
gS
(1 S11 )
2
GS ,max 1 S11S
2
(1 L )
GL
2
gL
(1 S 22 )
2
GL ,max 1 S 22L
2
전자파 연구실
전자파 연구실
Figure 11-8b (p. 557)
(b) RF circuit. (c) Transducer gain and return loss.
전자파 연구실
Low noise amplifier design
F Fmin
2
RN
YS Yopt
GS
YS GS jBS :Source admittance presented to transistor
Yopt
:Optimum source admittance that result in minimum noise figure.
Fmin
RN
GS
: Minimum noise figure of transistor, attained when
:equivalent noise resistance of a transistor
:Real part of source admittance
2
F Fmin
S opt
R
N
Z 0 (1 2 ) 1 2
S
opt
전자파 연구실
Figure 11-9b (p. 561)
(b) RF circuit.
전자파 연구실
11.4 Broadband transistor amplifier design
전자파 연구실
Balanced amplifier
Figure 11-10 (p. 562)
A balanced amplifier using 90° hybrid couplers.
VA1
1
j
V1 , VB1
V1
2
2
(V1 ) : Incident input voltage
The output voltage can be found as
V2
j
1
j
1
j
VA 2
VB 2
GAVA1
GBVB1 V1 (GA GB )
2
2
2
2
2
V2
j
S 21 (GA GB )
V1
2
전자파 연구실
The total reflected voltage at the input can be written as
V1
1 j
1
j
1
VA1
VB1
AVA1
BVB1 V1 (A B )
2
2
2
2
2
V1 1
S11 ( A B )
V1
2
F ( FA FB ) / 2
Figure 11-11 (p. 564)
Gain and return loss, before and after optimization,
for the balanced amplifier of Example 11.6.
전자파 연구실
Distributed amplifiers
•
Very wideband width
•
Good input and output matching
•
Not good noise figure
•
Not very high gain
•
Occupies large area
Equivalent circuit for one FET
전자파 연구실
Gate equivalent circuit
Figure 11-13 (p. 566)
(a) Transmission line circuit for the gate line
of the distributed amplifier;
(b) equivalent circuit of a single unit cell of
the gate line.
Drain equivalent circuit
Figure 11-14 (p. 566)
(a) Transmission line circuit for the drain
line of the distributed amplifier;
(b) equivalent circuit of a single unit cell of
the drain line.
전자파 연구실
Gate transmission line equivalent circuit
전자파 연구실
Drain transmission line equivalent circuit
전자파 연구실
Gate source voltage on n-th FET :
Total output current on N-th terminal of of the drain line:
전자파 연구실
전자파 연구실
부품 라이브
러리
전자파 연구실
전자파 연구실
전자파 연구실
전자파 연구실
시물레이션
시작
전자파 연구실
전자파 연구실
Stability
전자파 연구실
Stability
전자파 연구실
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