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The WaveFormerTutorial by Donna Mitchell
Published in Design Wave Magazine Vol.3 1996 in Japanese, CQ Publishing
The WaveFormerTutorial ................................................................................................... 1
1. About The WaveFormer v2.5 ..................................................................................... 2
Why use a timing diagram editor? .................................................................................. 2
Advantages of the Stimulus editing capabilities ............................................................. 4
2. Tutorial on Timing Diagram Editing Features: .......................................................... 5
Drawing Waveforms ....................................................................................................... 5
Drawing Signals .......................................................................................................... 6
Drawing Buses ............................................................................................................ 6
Drawing Clocks .......................................................................................................... 7
Using Equations to Generate Waveforms ....................................................................... 8
Timing Parameter Analysis: Delays, Setups, and Holds ................................................ 9
Delays ....................................................................................................................... 10
Setups and Holds....................................................................................................... 10
Reconvergent Fanout .................................................................................................... 11
3. Tutorial on Stimulus Generator. ............................................................................... 12
VHDL Export Example ................................................................................................ 12
Writing your own scripts .............................................................................................. 16
4. Summary ................................................................................................................... 17
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1. About The WaveFormer v2.5
SynaptiCAD has recently released The WaveFormer as an extension to its line of
EDA tools. The WaveFormer is a timing diagram editor and a digital stimulus
generator.
Timing diagram editors are relatively new EDA tools that are used to create and
analyze digital and mechanical timing diagrams. Digital stimulus generators
import, export, and translate digital waveform stimulus to drive simulators and
test equipment. By combining these functions into a single product, The
WaveFormer creates an integrated environment for creating, analyzing, and
documenting digital waveform information that can be output in virtually any
format: bitmap graphics, encapsulated postscript, Verilog, VHDL, Spice, and
even in-house formats using user-written translation scripts.
Why use a timing diagram editor?
There are several reasons for using a timing diagram editor:

With a timing diagram, the cause-effect relationships between signal
transitions are shown by timing parameters like delays, setups, and holds.
Even when engineers have access to digital simulators they still need to
draw timing diagrams to help clarify the operation of critical sections of a
design.

Drawing timing diagrams manually is a difficult and error-prone task and
the resulting diagrams are generally messy and hard to understand and
analyze. The WaveFormer makes it easy to create and change timing
diagrams and reduces the chance for error in timing calculations. Timing
calculations are performed using true min/max timing and calculations are
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automatically adjusted to account for advanced timing effects such as
reconvergent fanout.

The WaveFormer also enables designers to analyze a design during
system specification prior to the creation of a schematic. Timing diagram
analysis can be performed using just the timing parameter information
available in data books without the need for schematic netlists and
complex simulation models. Timing calculations are performed
interactively, so it is easy to quickly assess the impact of a change in a
timing parameter by updating the value in The WaveFormer’s parameter
spreadsheet (see Figure 1).
Figure 1: Picture of The WaveFormer with the Parameter spreadsheet.
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Advantages of the Stimulus editing capabilities
The stimulus editing capabilities of The WaveFormer ensure interoperability with
other tools due to the following features:

The WaveFormer can be used as a stand-alone design verification tool or
in conjunction with a digital simulator. All simulators need input stimulus to
perform a simulation. The WaveFormer makes it easy to generate digital
stimulus either graphically or textually and view the resulting stimulus
without having to simulate it first.

The WaveFormer supports the import of waveforms from other tools, so it
can serve as a translator between different waveform formats.

The WaveFormer uses a scripting language based on Perl (Practical
Extraction and Report Language) to import and export waveform stimulus.
The use of a scripting language means users can modify the output of
existing translation scripts and even create their own scripts to support
waveform formats used by custom test equipment and internally
developed software.

The WaveFormer currently creates input stimulus for VHDL, Verilog,
analog SPICE, digital SPICE, and Viewlogic’s Viewsim simulator (cmd
files). Waveform import is supported for Accolade VHDL, Viewsim, and
Pod-A-Lyzer, a PC-based logic analyzer. Other import/export formats will
be added based on customer requests.
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2. Tutorial on Timing Diagram Editing Features:
The following sections introduce the basic timing diagram editing capabilities of
The WaveFormer such as drawing and generating waveforms, attaching timing
parameters to signal transitions, and analyzing the resulting diagram. You can
follow along using The WaveFormer evaluation version included on the CD ROM
at the back of this magazine. The evaluation version also includes a complete,
on-line version of The WaveFormer manual and two tutorials (basic and
advanced).
Drawing Waveforms
The WaveFormer can graphically generate signals, buses, and clocks. Figure 2
below shows these three different types of waveforms. Each type of waveform is
added by clicking the appropriate ADD button in the upper left corner of the
diagram window.
Figure 2: Signals, Clocks and Buses are three types of waveforms that can be
generated by The WaveFormer.
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Drawing Signals
Signals are waveforms that represent a single digital input or output.
To draw a signal, follow these steps:
1) Click the appropriate ADD button in the upper left corner of the diagram
window
2) Point and click the mouse inside the diagram window. The logic state of
the waveform segment that is drawn is determined by the state buttons
(HI, LO, TRI, VALID, INV). The state buttons automatically toggle between
the last two states drawn, making it easy to quickly create a new
waveform. NOTE: The toggle action can be turned off by clicking twice on
the same state button).
3) Change the state of an existing waveform segment by clicking on the
segment and then pressing the desired state button.
4) Move a signal transition by clicking on the transition and dragging it to the
desired location.
5) Delete signals by selecting the desired signal names and pressing the
delete key.
Drawing Buses
Buses are composite signals for viewing and manipulating the state of a
group of signals as a single signal. A bus displays the value of its member
signals. If either a bus or its member signals are changed, both will update to
reflect the change. Buses save time by allowing the user to draw a single bus
and have the rest of the member signals draw themselves.
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To draw a bus, follow these steps:
1) Click the appropriate ADD button in the upper left corner of the diagram
window
2) Point and click the mouse inside the diagram window.
3) Edit the states of a bus by selecting a bus segment and then clicking on
the Hex button. This will bring up the Edit Bus dialog. Bus values can be
specified in the dialog using hex or binary notation.
Drawing Clocks
Clocks are periodic signals that are automatically generated based on the
following attributes set by the user:

period or frequency

duty cycle

offset

edge jitter
Clock attributes can be specified as times or formulas containing the values of
other clocks and timing parameters (e.g. CLK1.period = CLK0.period / ‘2).
This makes it easy to model circuits such as clock dividers and PLL frequency
generators.
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Using Equations to Generate Waveforms
Some signals are easier to create using a temporal equation instead of drawing
them. For example, a change in frequency in a periodic waveform from 25Mhz to
50Mhz could be represented by the following temporal equation:
CK25_50 (20ns=0 20ns=1)*4 (10ns=0 10ns=1)*5
This equation is entered from the Export\Draw Waveform Equation menu. It
creates a signal in The WaveFormer with an initial frequency of 25MHz (period =
20+20 = 40ns) for 4 cycles and switches to 50Mhz for 5 more cycles (see Figure
3). This type of waveform is tedious to draw by hand, but can be concisely
expressed as a temporal equation.
Figure 3: Using Equations to Generate Waveforms
CK20_50 was generated with the equation shown in Figure 3. In this example,
SIG1 is a monotonically decreasing frequency signal generated with a “for” loop
shown in the text.
If a signal named CK25_50 already existed when this equation was entered, this
waveform would be added on to the end of the signal. This ability to concatenate
waveforms to an existing signal in combination with the scripting language of The
WaveFormer (discussed further in the Import/Export section) makes it possible
to create extremely complex waveforms since script variables can be also be
used for time and state values in the equations. For example, a signal with a
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monotonically decreasing frequency (starts at 100MHz, ends at 10Mhz) could be
created using the following script:
for ($i = 0;$i < 10; $i++)
{
$time = 5 * $i;
wfm SIG1 $time=0 $time=1;
}
Signals generated using temporal equations are treated the same as signals
drawn by hand. This means that edges can be moved and states can be
changed using the normal drawing features).
Timing Parameter Analysis: Delays, Setups, and Holds
The true power of a timing diagram editor comes from the ability to relate
different signal transitions through timing parameters. Delays, Setups, and Holds
are the three basic types of timing parameters (see Figure 4). Other commonly
used timing parameter types such as Pulse Width Requirements can also be
modeled using these three basic types.
Figure 4: Timing Parameter Analysis
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As seen in Figure 4, Delays force signal transitions to be at a specified distance.
In the meantime, Setups and Holds verify that distances between signal
transitions meet timing requirements.
Delays
A delay between two signal transitions will force the transitions to be a specified
distance in time from each other. This keeps the designer from having to
manually place signal transitions at exact times.
For example, to make two signal transitions exactly 15ns apart, follow these
steps:
1) Roughly sketch the waveforms.
2) Add a delay parameter between two signal transitions using the right
mouse button.
3) Type 15 into the min or max column of the delay in the spreadsheet. The
second signal will move so that it is exactly 15 ns from the first signal
transition. Now that the two signal transitions are related, if either is
moved, then the other will follow in order to keep the correct timing. This is
how changes in timing are propagated through the diagram.
Setups and Holds
Setups and holds are timing requirements that must be met by a design in order
for the system to function properly.
A setup time monitors a transition on a data signal before a control signal
transition (e.g. system clock transition).
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A hold monitors a transition on a data signal after a control signal transition. The
distance between the control and data transitions minus the hold or setup time is
the safety margin or margin of the timing parameter.
The WaveFormer automatically calculates the margin times for setups and holds
and displays them in the parameter spreadsheet so that the designer can
determine how much further the timing of the circuit can be adjusted. If a timing
change causes a setup or hold time to be violated, the margin of the violated
setup or hold will be shown in red. All margins are recalculated whenever there is
a timing change. This automatic recalculation of timing requirements makes it
easy for designers to weigh the tradeoffs of different design choices.
Reconvergent Fanout
Figure 5: Demonstration of reconvergent fanout example.
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3. Tutorial on Stimulus Generator.
The WaveFormer can input or export digital waveform information to VHDL,
Verilog, Spice, and even in-house formats using user-generated translation
scripts.
To demonstrate the exporting features we will use the VHDL transport script in
which signal transitions are implemented using a signal assignment state for
each signal. This script produces a complete entity-architecture test bench that
can be directly compiled and linked into a VHDL simulation.
VHDL Export Example
To model complex data types and user defined types, the VHDL script takes
advantage of the object properties and extended state features of The
WaveFormer. These features allow the user to attach arbitrary data to objects in
the timing diagram which can then be accessed by the Waveperl scripts. The
VHDL script recognizes two different properties which can be manipulated
through the Export\Edit Object Properties menu. The properties are:
property = VHDLdir
default value = out
property = VHDLtype
default value = std_logic
Figure 5 shows a timing diagram and the resulting VHDL code that was
generated by The WaveFormer. Sig1 is exported to VHDL as a signal of type
integer with numerical values for its various states. To get Sig 1 to be type
integer we attached the object property of VHDLtype=integer to the signal.
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To change the object properties of Sig1:
1)
Choose the Export\Edit Object Properties menu option. This opens the
Object Properties dialog box.
2)
Select Signal Properties from the Object Type drop-down listbox at the
top of the dialog.
3)
Select the Sig1 from the Object Name listbox.
4)
Type VHDLtype into the Property edit box.
5)
Type integer into the Value edit box.
6)
Click the ADD button to add it to the signal.
7)
Click the OK button to close the dialog.
To add the extended state information to Sig1 so that segments can have values
like 7 and 8:
1) Select a segment of Sig1.
2) Click the Hex button.
3) Type the new integer state for the selected segment into the ExState edit
box.
4) Choose the Next or Previous buttons to edit adjacent segments, or click
the OK button to close the edit box.
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To export the timing diagram to VHDL:
1) Choose the Export\Export Signals from the menu options. This will open
the Export Dialog box.
2) Choose the type of script using the Save File as Type list box in the lower
left corner of the Export Dialog box. We used VHDL transport(*.vhd)s to
generate the VHDL test bench (see Figure 6a).
Figure 6a: Simple timing diagram to be converted to VHDL Code
3) Pick a file name and click the OK button. The WaveFormer will produce a
file with the timing data in that format.
4) View the generated file using a text editor (see Figure 6b).
library ieee, std;
use std.textio.all;
use ieee.std_logic_1164.all;
entity testbench is
port(
SIG0
: out std_logic;
CLK0
: out std_logic;
SIG1
: out integer
);
end testbench;
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architecture test of testbench is
begin
process
begin
CLK0 <= '1';
wait for 0 ps;
while true loop
CLK0 <= '0';
wait for 50000 ps;
CLK0 <= '1';
wait for 50000 ps;
end loop;
end process;
process
begin
SIG0 <=
transport '1' after 0 ps,
transport '0' after 50000 ps,
transport '1' after 90000 ps,
transport '0' after 180000 ps,
transport '1' after 240000 ps;
SIG1 <=
transport
4 after 0 ps,
transport 16 after 60000 ps,
transport
9 after 120000 ps,
transport 12 after 185000 ps,
transport
3 after 238000 ps;
end process;
end test;
Figure 6b: VHDL code generated by The WaveFormer.
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Writing your own scripts
Waveperl is an extended version of the Perl language that contains additional
functions for creating and manipulating data structures inside The WaveFormer
(TWF).
Waveperl scripts are compiled dynamically whenever the script is run and
executed by a Perl interpreter embedded into TWF. Waveperl scripts are
primarily intended to be used for waveform import/export operations, but users
can also write scripts to add new editing functions to The WaveFormer.
Waveperl scripts are normal text files that can be created using your favorite text
editor or Notepad. The standard scripts that ship with The WaveFormer contain
comments that identify the most probable locations for user modifications.
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4. Summary
The WaveFormer can be used throughout the design cycle. As a system
specification and analysis tool, The WaveFormer is particularly useful for preschematic analysis before simulation is possible.
During the design phase,, The WaveFormer serves a dual role as timing analyzer
and testbench generator for simulations. As a documentation tool, The
WaveFormer allows the generation of detailed timing diagrams that are vastly
easier to create and maintain than those that can be generated using
conventional drawing packages.
One of the benefits of using The WaveFormer is that circuit documentation can
be generated automatically as a by-product of the design process.
The WaveFormer can be used not only by design engineers, but also by
marketing, test, maintenance, and applications engineers
Document source: http://www.syncad.com/paper_p_j1.htm
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