EE 365
Combinational-Circuit Synthesis
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Combinational-Circuit Analysis
• Combinational circuits -- outputs depend only
on current inputs (not on history).
• Kinds of combinational analysis:
– exhaustive (truth table)
– algebraic (expressions)
– simulation / test bench
• Write functional description in HDL
• Define test conditions / test vectors, including corner cases
• Compare circuit output with functional description (or
known-good realization)
• Repeat for “random” test vectors
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Combinational-Circuit Design
• Sometimes you can write an equation or
equations directly using “logic” (the kind in
your brain).
• Example (alarm circuit):
• Corresponding circuit:
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Alarm-circuit transformation
• Sum-of-products form
– Useful for programmable logic devices (next lec.)
• “Multiply out”:
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Sum-of-products form
AND-OR
NAND-NAND
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Product-of-sums form
OR-AND
NOR-NOR
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Brute-force design
• Truth table -->
canonical sum
(sum of minterms)
• Example:
prime-number detector
– 4-bit input, N3N2N1N0
F = SN3N2N1N0(1,2,3,5,7,11,13)
row N3 N2 N1 N0
0 0 0 0 0
1 0 0 0 1
2 0 0 1 0
3 0 0 1 1
4 0 1 0 0
5 0 1 0 1
6 0 1 1 0
7 0 1 1 1
8 1 0 0 0
9 1 0 0 1
10 1 0 1 0
11 0 0 1 1
12 1 1 0 0
13 1 1 0 1
14 1 1 1 0
15 1 1 1 1
F
0
1
1
1
0
1
0
1
0
0
0
1
0
1
0
0
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Minterm list --> canonical sum
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Algebraic simplification
• Theorem T8,
• Reduce number of gates and gate inputs
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Resulting circuit
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Visualizing T10 -- Karnaugh maps
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3-variable Karnaugh map
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Example: F = S(1,2,5,7)
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Karnaugh-map usage
• Plot 1s corresponding to minterms of function.
• Circle largest possible rectangular sets of 1s.
– # of 1s in set must be power of 2
– OK to cross edges
• Read off product terms, one per circled set.
– Variable is 1 ==> include variable
– Variable is 0 ==> include complement of variable
– Variable is both 0 and 1 ==> variable not included
• Circled sets and corresponding product terms
are called “prime implicants”
• Minimum number of gates and gate inputs
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Prime-number detector (again)
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• When we solved algebraically, we missed one
simplification -- the circuit below has three less
gate inputs.
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Another example
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Yet another example
• Distinguished 1 cells
• Essential prime implicants
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Quine-McCluskey algorithm
• This process can be made into a program,
using appropriate algorithms and data
structures.
– Guaranteed to find “minimal” solution
• Required computation has exponential
complexity (run time and storage)-- works well
for functions with up to 8-12 variables, but
quickly blows up for larger problems.
• Heuristic programs (e.g., Espresso) used for
larger problems, usually give minimal results.
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Lots of possibilities
• Can follow a “dual” procedure to find minimal
products of sums (OR-AND realization)
• Can modify procedure to handle don’t-care
input combinations.
• Can draw Karnaugh maps with up to six
variables.
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Real-World Logic Design
• Lots more than 6 inputs -- can’t use Karnaugh
maps
• Design correctness more important than gate
minimization
– Use “higher-level language” to specify logic
operations
• Use programs to manipulate logic expressions
and minimize logic.
• PALASM, ABEL, CUPL -- developed for PLDs
• VHDL, Verilog -- developed for ASICs
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