energies
Article
A Novel High Controllable Voltage Gain Push-Pull
Topology for Wireless Power Transfer System
Qichang Duan *, Yanling Li, Xin Dai and Tao Zou
School of Automation, Chongqing University, 174 Shazheng Street, Shapingba District, Chongqing 400030,
China; [email protected] (Y.L.); [email protected] (X.D.); [email protected] (T.Z.)
* Correspondence: [email protected]; Tel.: +86-23-6510-6188
Academic Editor: Chunhua Liu
Received: 2 February 2017; Accepted: 29 March 2017; Published: 1 April 2017
Abstract: Wireless Power Transfer (WPT) is commonly used to transmit power from a transmitting
coil to various movable power devices. In the WPT system, due to a resonant tank inherent
characteristic, the system cannot achieve a high output voltage gain. This paper proposes a novel
current-fed push–pull circuit to realize high output voltage gain by adding a bi-directional switch
between the resonant network and inverter. To obtain a high voltage gain, this paper proposes energy
storage and energy injection mode to realize an energy boost function. A duty cycle control method
for mode switching is also proposed. The proposed method allows the converter to operate with a
variable voltage gain over a wide range with high efficiency. Experimental validation shows that the
system gain of a proposed circuit can achieve a variable gain from 2 to 7 of which the converter can
be two times higher than the classical system with the same condition.
Keywords: wireless power transfer; push–pull circuit; voltage gain
1. Introduction
The Wireless Power Transfer (WPT) system as a novel technology can realize power wireless
transmission from power supply to electrical equipment with the aid of magnetic coupling. With
its rapid development, more and more applications have appeared in electrical vehicles, biomedical
implants and cell phone areas [1–6].
More and more applications in WPT technology require low DC voltage input and high voltage
output. These applications include the Photovoltaic (PV) system, battery power supply system and
Universal Serial Bus (USB) powered devices. However, it is not easy for the WPT system to obtain
high voltage gain according to the following reasons—first, due to the WPT system being a weakly
coupling system with very low coupling coefficient k (normally below 0.2) [7,8] and the coupling
coefficient of transformer can almost reach 1. The second reason is the inherent characteristic of
the resonant network. There are four fundamental resonant topologies SS, SP, PS, and PP (S and P
denotes series and parallel topology, respectively). Series resonant network exhibits voltage source
characteristics that cannot obtain a high voltage gain. The parallel resonant network exhibits current
source characteristics that obtain high voltage gain on the light load condition. However, for heavy
load conditions, it still cannot obtain high voltage gain. Furthermore, its reflecting impedance will
bring relatively large frequency drift, which may cause a large reduction in output power [9,10]. For
the same reason, composite resonant networks such as Inductor Capacitor Inductor (LCL), Inductor
Capacitor Capacitor (LCC), and Capacitor Inductor Capacitor (CLC), which are combinations of the
series and resonant topology, cannot reach high voltage gain. Reference [11] analyzes wireless charging
circuit characteristics under hybrid compensation topology. The analysis results show that the output
voltage gain is below three in hybrid compensation topology.
Energies 2017, 10, 474; doi:10.3390/en10040474
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Energies 2017, 10, 474
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To achieve high output voltage gain, the classical method is implemented by placing an additional
To achieve high output voltage gain, the classical method is implemented by placing an
Boost
converter
at the
primary
However,
added Boost
converter
increase
additional
Boost
converter
at or
thesecondary
primary orside.
secondary
side.the
However,
the added
Boostwill
converter
thewill
volume
andthe
weight
ofand
the weight
whole of
system
[12,13],
and[12,13],
make the
complicated
to control.
increase
volume
the whole
system
andsystem
make the
system complicated
There
are
few
papers
related
with
voltage
gain
improvement.
Aiming
at
voltage
gain
optimization
and
to control. There are few papers related with voltage gain improvement. Aiming at voltage gain
control,
Reference
[14]
proposes
a
uniform
voltage
gain
control
method.
This
method
is
implemented
optimization and control, Reference [14] proposes a uniform voltage gain control method. This
by method
control system
operating
However,
the method
only
aims at the
improving
is implemented
byfrequency.
control system
operating
frequency.
However,
method the
onlyrobustness
aims at
against
misalignment.
Reference
[15]
proposes a detached
core to
improve the
voltage
gain
improving
the robustness
against
misalignment.
Referencemagnetic
[15] proposes
a detached
magnetic
core
method.
The obtained
voltage
gain is 0.83.
Reference
[16] proposes
an Reference
S/SP topology
converter
to improve
the voltage
gain method.
The obtained
voltage
gain is 0.83.
[16] proposes
an to
S/SPconstant
topologyvoltage
converter
obtain constant
voltage
However,
the and
voltage
cannot
be
obtain
gain.toHowever,
the voltage
gaingain.
cannot
be adjusted
willgain
be very
sensitive
adjusted and
will
very
sensitive
to frequency drift on the high gain condition.
to frequency
drift
onbethe
high
gain condition.
order
obtain
a high
andcontrollable
controllableoutput
outputvoltage
voltagegain
gainWPT
WPT system,
system, this
this paper
In In
order
to to
obtain
a high
and
paper proposes
proposes a
a
novel
current-fed
push–pull
converter
at
the
primary
side.
A
pair
of
Insulated
Gate Transistor
Bipolar
novel current-fed push–pull converter at the primary side. A pair of Insulated Gate Bipolar
Transistor
(IGBT)
switches,
act asswitch,
a directional
switch,
is of
added
in front network
of the resonant
(IGBT)
switches,
which
act as awhich
directional
is added
in front
the resonant
to isolate
network
to
isolate
the
inverter
and
resonant
network.
An
energy
storage
and
injection
switching
the inverter and resonant network. An energy storage and injection switching mode is proposed to
modethe
is proposed
to control
flowing
into the
resonant network.
A switching
duty
cycle is
control
energy flowing
intothe
theenergy
resonant
network.
A switching
duty cycle
regulation
method
regulation method is also proposed to reach high voltage gain.
also proposed to reach high voltage gain.
2. High
Output
GainPush–Pull
Push–PullCircuit
Circuit
2. High
Output
Gain
The proposed high output gain push–pull circuit is shown in Figure 1. Compared with
The proposed high output gain push–pull circuit is shown in Figure 1. Compared with traditional
traditional push–pull circuits, the proposed circuit adds two additional switches S3 and S4 to form a
push–pull circuits, the proposed circuit adds two additional switches S3 and S4 to form a bi-directional
bi-directional switch. At the primary side, a DC power supply is a series with an inductor to form a
switch. At the primary side, a DC power supply is a series with an inductor to form a quasi-current
quasi-current source. A push–pull transformer including L1 and L2 is utilized to divide the DC
source. A push–pull transformer including L1 and L2 is utilized to divide the DC current in half,
current in half, so that the current flowing into the resonant tank is approximately a square
so waveform
that the current
flowing into the resonant tank is approximately a square waveform with half the
with half the magnitude of the input DC current. The primary side uses two main
magnitude
of
the
input
DCa current.
primary
side
uses two
main switches
S2with
) with
1 and
switches (S1 and S2) with
common The
ground
and two
auxiliary
switches
(S3 and S4(S
) in
series
a a
common
ground resonant
and two tank,
auxiliary
switches
S4 ) in series
withCaP, parallel-tuned
resonant
tank,
3 and
parallel-tuned
which
consists(Sof
a resonant
capacitor
a resonant inductor
LP and
which
consists
of
a
resonant
capacitor
C
,
a
resonant
inductor
L
and
equivalent
series
resistance
P
P
equivalent series resistance RP. The secondary side comprises a parallel resonant tank, which
RP .consists
The secondary
side comprises
parallel resonant
tank, which
consists
of a resonant
of a resonant
inductor LS,aequivalent
series resistance
RS, and
a resonant
capacitorinductor
CS. WithLS ,
equivalent
series
resistance
a resonant
capacitor
CS . network,
With theAC
rectifier
(D1 –D4 ) to
and
the rectifier
bridge
(D1–D4) R
and
Inductor
Capacitor
(LC) filter
energybridge
is transformed
S , and
Inductor
Capacitor
(LC) R.
filter network, AC energy is transformed to DC output to the load R.
DC output
to the load
Id
LDC
L1
D1
A
L2
B
Vin
S3
CP LP
CS
D2
Cf
R
S4
RP
S1
LS
Lf
S2
RS
D3
D4
Figure 1. High controllable voltage gain push–pull topology.
Figure 1. High controllable voltage gain push–pull topology.
Aiming at voltage gain promotion, this paper proposes a resonant energy promotion method at
at voltage
gainenergy
promotion,
thismode
paperisproposes
energy
method
theAiming
primary
side. An
storage
realizeda resonant
by shorting
the promotion
DC inductor
and at
thephase-shifting
primary side. transformer.
An energy storage
mode
is realized
byisshorting
inductor
and
phase-shifting
An energy
injection
mode
realizedthe
by DC
combining
the
storage
energy
transformer.
An energy
mode
is realized
the storage
energy between
and DC input
and DC input
energy injection
together and
outputting
to by
thecombining
resonant tank.
The switching
the
energy
together
to the
resonant tank.
switching
between
the energy
storage and
energy
storageand
andoutputting
injection mode
is implemented
byThe
auxiliary
switch
pair S3 and
S4.
Figure
fundamental
operation
principles
theSproposed
method. The pulses and
injection
mode2isshows
implemented
by auxiliary
switch
pair S3ofand
4.
current
of the proposed
circuit
switchesofare
VGE1
to VGE4 The
denotes
the
driving
Figurewaveforms
2 shows fundamental
operation
principles
theshown.
proposed
method.
pulses
and
current
signals ofofswitches
S1 to Scircuit
4, respectively.
The shown.
current Vwaveform
of denotes
iL2 is similar
to the signals
current of
waveforms
the proposed
switches are
the driving
GE1 to VGE4
Energies 2017, 10, 474
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switches
S to S4 , 474
respectively. The current waveform of iL2 is similar to the current waveform
of iL1 ,
Energies12017, 10,
3 of 13
except
for
half-cycle
delay.
The
function
of
anti-series
switches
(S
and
S
)
is
to
control
the
connection
3
4switches (S3 and S4) is to
waveform of iL1, except for half-cycle delay. The function of anti-series
waveform
iL1tank
, except
for
half-cycle
delay.
The
function
ofcircuit.
anti-series
switches
(S
3 circuit
and S4) cycle,
is to
between
resonant
and
push–pull
circuit.
During
one full
switching
cycle,
operation
control
the of
connection
between
resonant
tank and
push–pull
During
one fullthe
switching
control
the operation
connection
between
resonant
tank
and can
push–pull
circuit.
During
one
full switching
can be
divided
into the following
fourinto
modes
and
be
shown
inand
Figure
3.shown
the
circuit
can
be divided
the following
four
modes
can be
in Figurecycle,
3.
the circuit operation can be divided into the following four modes and can be shown in Figure 3.
I II III IV
I II III IV
VGE 4
VGE 4
VGE1
VGE1
VGE 3
VGE 3
VGE 2
VGE 2
iL1
iL1
i AB
i AB t t t
0
1
2
t0 t1 t2
t3 t4
t3 t4
t
t
Figure 2. Operation principle of the push–pull topology.
Figure
2. 2.Operation
ofthe
thepush–pull
push–pull
topology.
Figure
Operation principle
principle of
topology.
Id
Id
LDC
LDC
L1
L1
Vin
Vin
A
A
L2
L2
S3
S3
B
B
S4
S4
S1
S1
Id
Id
CP
CP
LP
LP
L1
L1
A
A
L2
L2
S3
S3
S4
S4
S1
S1
S2
S2
(c)
(c)
S4
S4
S1
S1
Id
Id
B
B
CP
CP
LP
LP
A
A
L2
L2
S3
S3
S2
S2
LDC
LDC
Vin
Vin
L1
L1
Vin
Vin
(a)
(a)
Id
Id
LDC
LDC
B
B
CP
CP
LP
LP
S2
S2
(b)
(b)
LDC
LDC
L1
L1
Vin
Vin
A
A
L2
L2
S3
S3
S4
S4
S1
S1
B
B
CP
CP
LP
LP
S2
S2
(d)
(d)
Figure 3. Operating modes of the proposed circuit in one cycle. (a) Mode I; (b) Mode II; (c) Mode III;
Figure
Operating
and (d)3.Mode
IV. modes of the proposed circuit in one cycle. (a) Mode I; (b) Mode II; (c) Mode III;
Figure 3. Operating modes of the proposed circuit in one cycle. (a) Mode I; (b) Mode II; (c) Mode III;
and (d) Mode IV.
and (d) Mode IV.
Energies 2017, 10, 474
4 of 13
Mode I: t0–t1: In this mode, switches S2 and S4 are turned on; switches S1 and S3 are turned off.
Energies 2017, 10, 474
4 of 13
The operation of this mode is shown in Figure 2a. The energy stored in L1 is transfer into the resonant
circuit by switch S4 and the reverse diode of S3; switch S2 is remaining conduction, so that the current
Mode
t0 –t1 : slowly
In this mode,
S2 andin
S4the
arestate
turned
on; switches S1 and S3 are turned off.
flowing
L2 isI:rising
and L2 switches
is still working
of storage.
The operation
is shown
in Figure
3a. SThe
energy
in switches
L1 is transfer
intoS4the
Mode II: tof
1–tthis
2: In mode
this mode,
switches
S1 and
2 are
turnedstored
on and
S3 and
areresonant
turned
circuit
switch S4of
and
themode
reverse
; switch3b.
S2 Switches
is remaining
conduction,
so thatoff
theand
current
off.
Thebyoperation
this
is diode
shownofinS3Figure
S3 and
S4 are turned
the
flowing Lcircuit
is
rising
slowly
and
L
is
still
working
in
the
state
of
storage.
resonant
enters
the
state
of
free
energy
oscillation
between
L
P
and
C
P
.
Switches
S
1
and
S
2
are
2
2
Mode
II:
t
–t
:
In
this
mode,
switches
S
and
S
are
turned
on
and
switches
S
and
S
are
turned
turned on and L1 1 and
L2 are both working in1the state
2
2 of storage.
3
4
off. Mode
The operation
of this mode,
mode is
shownSin
Figure
3b.turned
Switches
S3 and S4S2are
and off.
the
III: t2–t3: In
switches
1 and
S3 are
on; switches
andturned
S4 are off
turned
resonant
circuitofenters
the state
of free in
energy
oscillation
betweenstored
LP and
Switches
S1 and
S2 the
are
The
operation
this mode
is shown
Figure
2c. The energy
inCLP2. is
transferred
into
turned oncircuit
and L1by
and
L2 areSboth
working
in thediode
state of
resonant
switch
3 and
the reverse
of storage.
S4 and the current flowing through L2 is
Mode III:
t2 –tS
Inremaining
this mode,conduction,
switches S1so
and
arecurrent
turnedflowing
on; switches
S2 and
S4 are
turned
decreasing;
switch
thatS3the
L1 is rising
slowly
and
L1 is
3 :1 is
off. working
The operation
of this
is shown in Figure 3c. The energy stored in L2 is transferred into
still
in the state
of mode
storage.
the resonant
switch
the reverse
and the Scurrent
through
Mode IV:circuit
t3–t4: by
This
modeS3isand
similarly
with diode
ModeofII,S4switches
1 and Sflowing
2 are turned
on Land
2 is
decreasing;
switch
S1 isturned
remaining
conduction,
current
flowing
L1 is rising
slowly and
switches
S3 and
S4 are
off. The
operationsoofthat
thisthe
mode
is shown
in Figure
3d. Switches
S3 L
and
1 is
still
working
in
the
state
of
storage.
S4 are turned off and the resonant circuit enters the state of free energy oscillation between LP and CP.
Mode
IV: tS3 –t
mode
is similarly
Mode
II, switches
Switches
S1 and
2 are
turned
on and
L1 and L2with
are both
working
in the S
state
of S
storage.
4 : This
1 and
2 are turned on and
switches S3 and S4 are turned off. The operation of this mode is shown in Figure 3d. Switches S3 and
3.
Gain
S4Voltage
are turned
offAnalysis
and the resonant circuit enters the state of free energy oscillation between LP and CP .
Switches
S
and
S
oncycle
and Lof
L2 are both
in the state
of storage.
1
2 are
1 and
Assuming that
theturned
resonant
the circuit
is T, working
and the switching
duty
cycle of S1 and S2 is
D; correspondingly, the duty cycle of S3 and S4 is (1 − D). According to the volt–second balance of
3. Voltage Gain Analysis
inductors L1 and L2, the average voltage across L1 and L2 is equal to zero during one switching cycle
Assuming
thatsteady
the resonant
cycle
of the
circuit
is T, and
the Lswitching
cycle
S1 and
S2 is
period.
During the
state, the
current
flows
through
L1 and
2 is equal duty
so that
the of
energy
stored
D;
correspondingly,
the
duty
cycle
of
S
and
S
is
(1
−
D).
According
to
the
volt–second
balance
of
3
in inductors L1 and L2 is equal as well. Next,
the 4paper will calculate the output gain based on the fact
inductors
L
and
L
,
the
average
voltage
across
L
and
L
is
equal
to
zero
during
one
switching
cycle
1
2
2 during one switching cycle.
that the energy
stored
and released in inductor L11is equal
period.
During
the state,
steadythe
state,
the current
is equal through
so that the
1 and L2 flowing
In the
steady
supply
currentflows
is Id,through
and theLcurrent
L1energy
or L2 isstored
Id/2.
in
inductors
L
and
L
is
equal
as
well.
Next,
the
paper
will
calculate
the
output
gain
based
on
the
fact
2 network terminal voltage is UAB, thus the volt-second balance equation can
Assuming the1resonant
that
the energy
be
obtained
as stored and released in inductor L1 is equal during one switching cycle.
In the steady state, the supply current is Id , and the current flowing through L1 or L2 is Id /2.
Id
I
Assuming the resonant network
Vin terminal
DT = (voltage
U AB − Vinis)UdAB
D ) Tthe volt-second balance equation can
(1, −thus
(1) be
2
2
.
obtained as
I
I
Vin d DT = (U AB − Vin ) d (1 − D ) T.
(1)
Thus:
2
2
Thus:
V
U AB = in Vin ( 0.5 ≤ D < 1)
(2)
U AB1=
(0.5 ≤ D. < 1).
(2)
−D
1−D
Note that
that duty
duty cycle
cycle of
of switches
switches S11 and
and SS22isisno
noless
lessthan
than0.5.
0.5.ItItisisbecause
becausewhen
whenthe
theduty
dutycycle
cycle isis
Note
less than
than 0.5,
0.5, switches
switches SS11and
andSS22will
willenter
enterthe
thestate
stateofofturning
turningoff
offatatthe
thesame
sametime;
time;correspondingly,
correspondingly,
less
switches SS33and
andSS44will
willenter
enterthe
thestate
stateof
ofturning
turning on.
on. ItIt will
will result
result that
that the
the current of L11 and
and L22 drops
drops
switches
sharply to
to zero
zero and
and the
the current
current will become discontinuities.
discontinuities. On
On the
the assumption,
assumption, system
system equivalent
equivalent
sharply
circuit can
can be
be shown
shown as
as Figure
Figure 4.
4.
circuit
IP
IS
LS
RP
U AB
LP
CP
ZP
CS
VS
k
Req
RS
ZS
Figure 4. Equivalent circuit of the push–pull circuit.
Figure 4. Equivalent circuit of the push–pull circuit.
Energies 2017, 10, 474
5 of 13
At the secondary side, according to the energy balance equation, the equivalent resistance Req of
DC part including rectifier, filter and load at the secondary side is
Req = π2 R/8.
(3)
The reflection impendence from the secondary to primary side can be expressed by
Rre f = ω 2 k2 L P LS /ZS ,
(4)
where ZS = (jωLS + RS ) + Req /(jωCS Req + 1) is the input impendence of secondary resonant network.
Its resonant angular frequency is ω = 2πf.
The input impendence of the push–pull network can be expressed as
ZP =
jωL P + R P + Rre f
.
jωCP jωL P + R P + Rre f + 1
(5)
The resonant current of the primary side IP can be expressed as
r
IP = U AB /
2
(ωL P )2 + R P + Rre f .
(6)
It is well known that the inductive voltage source of secondary side can be expressed as
VS = ωkIP
p
L P LS .
(7)
On the resonant condition ω 2 LS CS = 1, the output voltage VO the load can be obtained as
VO =
√
Req
jωkU AB L P LS
.
jωCS Req + 1 ( jωL P + R P ) ZS + ω 2 k2 ( L P LS )
(8)
Therefore, the voltage gain of the proposed circuit can be expressed as Equation (9)
VO V = q
in
√
ωk L P LS
Req
2
(ωL P )2 + ( R P ZS + ω 2 k2 L P LS ) (1 − D )
q
ωCS Req
2
.
(9)
+1
Equation (9) shows that the output voltage can be controlled by duty cycle D, coupling coefficient
k, switching frequency f and the equivalent resistance Req . However, frequency f and the load R usually
are constant in the proposed circuit, thus the output voltage can be regulated by the duty cycle D of
the push–pull switches S1 and S2 .
Compared with traditional full-bridge circuit, its equivalent AC input UAB can be calculated by
U AB
√
2 2Vin
=
.
π
(10)
In addition, the voltage gain of the full-bridge converter will be
VO V = q
in
√
2 2Req
q
.
2
2
2
2
2
π
ωC
R
+
π
ωL
+
R
Z
+
ω
k
L
L
( P)
( P S
S eq
P S)
√
ωk L P LS
(11)
As can be seen from Equations (9) and (11), we can draw a conclusion that the voltage gain of
proposed topology can be at least two times than traditional full-bridge topology.
Compared with a traditional push–pull circuit, its equivalent AC input UAB can be calculated by
Energies 2017, 10, 474
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Energies 2017, 10, 474
U AB =
6 of 13
πVin
(12)
2 .
πV
U AB = √ in .
2
Furthermore, the voltage gain of the full-bridge converter
will be
(12)
Furthermore, the voltage
gain ofωthe
converter
be
π Rwill
k Lfull-bridge
L
VO
eq
P S
=
V
√
2
2
(13)
2
VO in
Z +LωP2 L
k2SLP LS
2 ωCS Reqq +πR
1 eq
= q(ωLP ) + Rωk
P S
(13)
V .
2
2√
in
2
ωCS Req + 1
(ωL P )2 + ( R P ZS + ω 2 k2 L P LS )
As can be seen from Equations (9) and (13), we can draw a conclusion that the voltage gain of
As can be seen from Equations
(9)
2 and (13), we can draw a conclusion that the voltage gain of
proposed topology can achieve √2
( 0.5 ≤ D < 1) times the traditional push–pull topology.
proposed topology can achieve π(π1−( 1D−) D
(0.5
) ≤ D < 1) times the traditional push–pull topology.
(
)
(
)
4.
System Performance
4. System
Performance Analysis
Analysis
In
order to
to analyze
analyzethe
theperformance
performanceofofthe
the
proposed
method,
several
performance
analyses
In order
proposed
method,
several
performance
analyses
are
are
carried
out
including
load
variation,
coupling
coefficient
and
comparison
with
a
traditional
carried out including load variation, coupling coefficient and comparison with a traditional WPT
WPT
system.
system.
4.1. Influence of Load (R) Variation on Voltage Gain and Efficiency
4.1. Influence of Load (R) Variation on Voltage Gain and Efficiency
According to Equation (9), Figure 5 shows the voltage gain against switching duty cycle D with
According to Equation (9), Figure 5 shows the voltage gain against switching duty cycle D with
different load R, and the efficiency against load R when k = 0.2. The analysis results show
different load R, and the efficiency against load R when k = 0.2. The analysis results show
(1)
1)
(2)
2)
(3)
3)
With the
D,D,
thethe
output
gaingain
enhancement
increases
obviously
and
With
the increase
increaseofofswitch
switchduty
dutycycle
cycle
output
enhancement
increases
obviously
the
increasing
rate
of
voltage
gain
increases
gradually.
and the increasing rate of voltage gain increases gradually.
The voltage gain ratio is higher when the load R becomes larger at the same switching duty
The voltage gain ratio is higher when the load R becomes larger at the same switching duty cycle
cycle D.
D.
From Figure 5b, the system can keep efficiency above 85% in the whole duty cycle range.
From Figure 5b, the system can keep efficiency above 85% in the whole duty cycle range.
(a)
(b)
Figure 5. Influence of load R: (a) Output gain with various load R; (b) System efficiency with load R.
Figure 5. Influence of load R: (a) Output gain with various load R; (b) System efficiency with load R.
4.2. Influence of Coupling Coefficient (k) Variation on the Gain Ratio and Efficiency
4.2. Influence of Coupling Coefficient (k) Variation on the Gain Ratio and Efficiency
Because the WPT system is a loosely coupled system, the coupling coefficient will vary
Because the WPT system is a loosely coupled system, the coupling coefficient will vary
dynamically. It is necessary to analyze the influence of coupling coefficient variation.
dynamically. It is necessary to analyze the influence of coupling coefficient variation.
Figure 6a shows curves of voltage gain against switching duty cycle D using Equation (9) at
Figure 6a shows curves of voltage gain against switching duty cycle D using Equation (9) at
different coupling coefficients. It can be seen that the gain ratio increases as the switching duty cycle
different coupling coefficients. It can be seen that the gain ratio increases as the switching duty cycle D
D increases. The gain ratio is higher when the coupling coefficient is larger.
increases. The gain ratio is higher when the coupling coefficient is larger.
Figure 6b shows the curves of system efficiency against different operating coupling
Figure 6b shows the curves of system efficiency against different operating coupling coefficients.
coefficients. As the coupling coefficients k increases, the efficiency decreases while load R is larger.
As the coupling coefficients k increases, the efficiency decreases while load R is larger. Overall, the system
can keep running at efficiency above 75% on the condition of coupling coefficient and load variation.
Energies 2017, 10, 474
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7 of 13
7 of 13
Overall,
the
system
Energies
2017,
10, 474
can keep running at efficiency above 75% on the condition of coupling
7 of 13
Overall, the
can keep running at efficiency above 75% on the condition of coupling
coefficient
andsystem
load variation.
coefficient and load variation.
(a)
(a)
(b)
(b)
Figure 6. Influence of coupling coefficient: (a) Output gain; (b) System efficiency.
Figure
(a) Output
Outputgain;
gain;(b)
(b)System
Systemefficiency.
efficiency.
Figure 6.
6. Influence of coupling coefficient: (a)
4.3. Comparison of Traditional WPT System
4.3.Comparison
ComparisonofofTraditional
TraditionalWPT
WPTSystem
System
4.3.
In order to compare this topology performance with traditional WPT system, this chapter
Inorder
ordertoto
compare
topology
performance
traditional
WPT system,
this chapter
In
compare
thisthis
topology
performance
with with
traditional
WPT system,
this chapter
presents
presents the voltage gain of four resonant networks (PP, PS, SP and SS) with the same resonant
presents
the
voltage
gain
of fournetworks
resonant (PP,
networks
andthe
SS)
withresonant
the same
resonant
the
voltage
gain
of four
resonant
PS, SP(PP,
andPS,
SS)SP
with
same
parameters.
parameters.
The
voltage gain
and efficiency of
of four
four compensation
compensationcircuits
circuitsare
arecompared
comparedagainst
againstload
load
parameters.
The voltage
gain andofefficiency
The
voltage gain
and efficiency
four compensation
circuits are compared
against load variation
variation
range
from
0
to
100
Ω
in
Figure
7.
variation
from
100 Ω 7.
in Figure 7.
range
fromrange
0 to 100
Ω 0intoFigure
Figure
basic
compensation
circuits.
Figure 7.
Figure
7. Gain
Gain and
and efficiency
efficiency of
of four
four basic
basiccompensation
compensationcircuits.
circuits.
InFigure
Figure 7,
7, for
for secondary
secondary series
series topology
topology
In
Figure
7,
for
secondary
topology including
including PS
PS and
and SS,
SS, this
thiskind
kindof
oftopology
topologycannot
cannot
In
including
PS
and
SS,
this
kind
of
topology
cannot
achieve
high
voltage
gain
voltage
source
characteristic,
and
its
efficiency
is
relatively
achieve
high
voltage
gain
due
to
its
source
characteristic,
and
its
efficiency
is
relatively
low
achieve high voltage gain due to its voltage source characteristic, and its efficiency is relativelylow
low
on
the
light
load
condition.
parallel
topology
can
achieve
relatively
high
voltage
gain
on
the
light
load
condition.
Secondary
parallel
topology
can
achieve
relatively
high
voltage
gain
on the light load condition. Secondary parallel topology can achieve relatively high voltage gain
(maximumgain
gainequals
equals5.1)
5.1)due
due
to
current
source
characteristic,
voltage
varies
greatly
(maximum
gain
equals
5.1)
due
its
current
source
characteristic,
but
voltage
gain
varies
greatly
(maximum
toto
itsits
current
source
characteristic,
butbut
voltage
gaingain
varies
greatly
with
with
load
variation.
For
heavy
load
conditions,
its
voltage
gain
is
low.
with
load
variation.
For
heavy
load
conditions,
its
voltage
gain
is
low.
load variation. For heavy load conditions, its voltage gain is low.
Comparedwith
withthe
the
four
basic
compensation
circuits,
the
push–pull
can
Compared
with
the
four
basic
compensation
circuits,
the proposed
proposed
push–pull
circuit
can
Compared
four
basic
compensation
circuits,
the proposed
push–pull
circuit circuit
can
operate
operate
at
an
adjustable
gain
versus
load
R
with
high
efficiency
from
the
analyses
A
and
B.
operate
at an adjustable
gainload
versus
loadhigh
R with
high efficiency
the analyses
at
an adjustable
gain versus
R with
efficiency
from the from
analyses
A and B. A and B.
Energies 2017, 10, 474
8 of 13
5. Experimental Verification
Energies 2017, 10, 474
8 of 13
For Energies
the sake
verifying the performance of the proposed topology, a prototype system
2017, of
10, 474
8 of 13 is built
up. The
system has been
constructed according to the parameters provided in Table 1 and the device
5. Experimental
Verification
Experimental
Verification
photo is 5.
shown
insake
Figure
8.
For the
of verifying
the performance of the proposed topology, a prototype system is built
the sake
verifying
the performance
ofto
thethe
proposed
topology,
a prototype
system
built
up. TheFor
system
hasofbeen
constructed
according
parameters
provided
in Table
1 andisthe
device
up. The system has been constructed
according
to theparameters.
parameters provided in Table 1 and the device
Table
1.
System
photo is shown in Figure 8.
photo is shown in Figure 8.
Parameters
Table 1. System parameters.
Values
Table 1. System parameters.
Resonant frequency
f (KHz)
Parameters
Parameters
Primary resonant
inductor
LP (µH)
Resonant
frequency
f (KHz)
Resonant frequency f (KHz)
Primary
resonant
inductorLPL
( μH
Primary
inductor
resistance
R(PPμH
(Ω)
Primary
resonant
inductor
) )
Primary
capacitor
CP (µF)
Primary
inductor
resistance
) )
Primary inductor
resistance
RPR(PΩ( Ω
P μF
( μF
Primary
capacitor
P (
Primary capacitor
CC
Secondary resonant
inductor
L)S) (µH)
(SμH
) )
Secondary
resonant
inductor
Secondary
resonant
inductorLSLR
Secondary
inductor
resistance
(Ω)
S( μH
Secondary
inductor
resistance
R
SR(SΩ
) )
Ω
Secondary
inductor
resistance
(
Secondary resonant capacitor CS (µF)
Secondary resonant
capacitor
CS ( μF )
Secondary
resonant
capacitor
Coupling
coefficient
k CS ( μF )
Coupling coefficient
k
Coupling
System
loadcoefficient
R (Ω) k
System load R ( Ω )
31.45
Values
Values
30.38
31.4531.45
0.025
30.38
30.38
0.66
0.025
0.025
0.66
0.66
36.82
System load R ( Ω )
36.82
36.82
0.029
0.029
0.029
0.57
0.57 0.57
0.157
0.1570.157
50
50
50
Figure
Experimental system
photo.
Figure
8. 8.Experimental
system
photo.
Figure
8. Experimental
system photo.
Figure 9 shows the waveforms
of the
push–pull switches
gate-driving signals and anti-series
switching
gate-driving
signals. The
voltage switches
VCP and resonant
current Isignals
LP are shown
in
Figure
9 shows
the waveforms
of resonant
the push–pull
gate-driving
and anti-series
Figure
9 shows
the waveforms
ofcurrent
the push–pull
switches
gate-driving
signalsindicate
and anti-series
Figure
10
and
the
resonant
voltage
and
waveforms
are
sinusoidal
waves,
which
that
switching gate-driving signals. The resonant voltage VCP and resonant current ILP are shown in
switching
gate-driving
signals.
The resonant
voltage VCP and resonant current ILP are shown in
system
work under
the state
resonance.
Figure 10the
and
the can
resonant
voltage
andofcurrent
waveforms are sinusoidal waves, which indicate that
Figure 10 and the resonant voltage and current waveforms are sinusoidal waves, which indicate that
the system
can work
under
the the
state
of resonance.
the system
can work
under
state
of resonance.
VgS1
VgS1
VgS 4
VgS 4
VgS2
VV
gS2gS 3
VgS3
Figure 9. Gate-driving signals’ waveforms.
Figure 9. Gate-driving signals’ waveforms.
Figure 9. Gate-driving signals’ waveforms.
Energies 2017, 10, 474
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9 of 13
9 of 13
9 of 13
VCP
VCP
I LP
I LP
Figure
Figure10.
10.Resonant
Resonantvoltage
voltageand
andresonant
resonantcurrent
currentwaveforms.
waveforms.
Figure 10. Resonant voltage and resonant current waveforms.
Figure 11 shows the waveforms of VdS2, VdS3 and VCP from top to bottom. It can be seen that the
Figure11
11shows
showsthe
the waveformsofofVV
VdS3
and
VCP from
topbottom.
to bottom.
canseen
be seen
that
Figure
dS2dS2
, V,dS3
and
CP from
top wave
to
It the
canItcondition
be
that
the
and VdS3 are exactly
half
of V
the
resonant
VCP on
of D
=
synthesized
waves
of VdS2waveforms
the synthesized
waves
of VdS2Vand
VdS3
are exactly
half
ofresonant
the resonant
wave
V theoncondition
the condition
of
dS2 and
dS3 are
exactly
half
of
the
wave
V
CP on CP
of
D
=
synthesized
waves
of
V
0.6. The same result can be detected that the synthesized waves of VdS1 and VdS4 are exactly half of the
D
=
0.6.
The
same
result
can
be
detected
that
the
synthesized
waves
of
V
and
V
are
exactly
half
dS4
VdS4
halfVof
the
0.6.
The same
be the
detected
synthesized
waves
VdS1 anddS1
resonant
waveresult
VCP. can
When
duty that
cyclethe
becomes
D = 0.8,
the of
waveforms
of are
VdS2exactly
, VdS3 and
CP are
of
the
resonant
wave
V
.
When
the
duty
cycle
becomes
D
=
0.8,
the
waveforms
of
V
,
V
and
VCP
CP
dS2
dS3
resonant
VCP
theand
duty
cycle
= 0.8,the
the duty
waveforms
dS2, VdS3 and VCP are
VdS3
are becomes
changingDwhen
cycle DofisVchanging.
Figure 13
shown inwave
Figure
12. When
and VdS2
are
shown
in
Figure
12
and
V
and
V
are
changing
when
the
duty
cycle
D
is
changing.
Figure
13
dS2 VdS3 are
dS3 changing when the duty cycle D is changing. Figure 13
and
shown
in Figure
12 and VdS2
shows that
VO is controlled
at 43
V for the
condition of R = 50 Ω and D = 0.8, which achieves a gain of
shows
that
V
is
controlled
at
43
V
for
the
condition
of
R
=
50
Ω
and
D
=
0.8,
which
achieves
a
gain
shows
that
VOOis controlled
at input
43 V for
the condition
of It
R verifies
= 50 Ω and
= 0.8,
which
achieves
ofof
thatDthe
system
can
realize aa gain
higher
4.3 times
compared
with the
voltage
Uin = 10 V.
4.3 timescompared
comparedwith
withthe
theinput
inputvoltage
voltageUUinin= =1010V.V.ItItverifies
verifiesthat
thatthe
thesystem
systemcan
canrealize
realizeaahigher
higher
4.3
gaintimes
by regulating the
duty cycle
D.
gain
by
regulating
the
duty
cycle
D.
gain Table
by regulating
thethe
duty
cycle D.
2 presents
experimental
data of the proposed topology. The controlled gain range is
Table22presents
presentsthe
theexperimental
experimentaldata
dataofofthe
the proposedtopology.
topology.The
Thecontrolled
controlledgain
gain rangeisis
Table
from 1.6 to 7.3. With higher gain, the system
can proposed
get higher output power.
Furthermore,range
system
from
1.6
to
7.3.
With
higher
gain,
the
system
can
get
higher
output
power.
Furthermore,
system
from
1.6
to
7.3.
With
higher
gain,
the
system
can
get
higher
output
power.
Furthermore,
system
efficiency can remain above 80%. Figure 14 shows that the experimental results of voltage gain
efficiency
can
remain
above
80%.
Figure
14
shows
that
the
experimental
results
of
voltage
gain
efficiency
can
aboveresults
80%. well,
Figureexcept
14 shows
that the
experimental
voltage match
gain
match with
theremain
theoretical
that there
is little
differenceresults
at the of
maximum
gain
with
the
theoretical
results
well,
except
that
there
is
little
difference
at
the
maximum
gain
point.
It is
match
the theoretical
results
well,
exceptside
thatwill
there
is littleatdifference
at point.
the maximum gain
point. Itwith
is because
power losses
at the
primary
increase
the top gain
because
power
losses
at
the
primary
side
will
increase
at
the
top
gain
point.
point. It is because power losses at the primary side will increase at the top gain point.
Vds3
Vds3
Vds2
Vds2
Figure 11. Waveforms of VdS2, VdS3 and VCp at D = 0.6.
Figure 11. Waveforms of VdS2, VdS3 and VCp at D = 0.6.
Figure 11. Waveforms of VdS2 , VdS3 and VCp at D = 0.6.
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10 of 13
10 of 13
VCP
VCP
Vds3
Vds3
Vds2
Vds2
Figure 12.
12. Waveforms
of V
VdS2, ,VVdS3 and
Cp at D = 0.8.
Figure
Waveforms of
andVV
at D = 0.8.
dS2, VdS3
dS3and
Figure 12. Waveforms of VdS2
VCp Cp
at D = 0.8.
VO
VO
V
Vinin
Figure 13. Waveforms of input voltage and output voltage.
Figure 13. Waveforms of input voltage and output voltage.
Figure 13. Waveforms of input voltage and output voltage.
Table 2. Experiment Results.
Table 2. Experiment Results.
Table 2. Experiment Results.
Input Voltage/Current
Duty Cycle of
Output
Output Power
Input Voltage/Current
DutyS1Cycle
Output(V)
Output
Power
(V/A)
(D) of
Voltage
(W)
Input
Voltage/Current
Duty
Cycle
Output
(V/A)
S1 (D)
Voltage (V) Output (W) Gain
10/0.61
(V/A)
of S0.5
Voltage 16.2
(V)
Power (W) 5.4
1 (D)
10/0.61
0.5
16.2
5.4
10/1.09
0.6
21.7
9.5
10/0.61
0.5
16.221.7
5.4
1.6
10/1.09
0.6
9.5
10/1.96
0.7
28.9
16.9
10/1.09
0.6
21.7
9.5
2.17
10/1.96
0.7
28.9
16.9
10/2.80
0.75
23.8 2.89
10/1.96
0.7
28.9 34.5
16.9
10/2.80
0.75
34.5
23.8
10/2.80
0.75
34.5 43.1
23.8
10/4.7
0.8
39.5 3.45
10/4.7
43.143.1
39.5 39.5 4.31
10/4.7
0.8
10/8.08
0.85
53.8
67.5
10/8.08
0.85
53.853.8
67.5 67.5 5.38
10/8.08
0.85
10/15.2
0.9
72.3
123 7.3
10/15.2
0.9
72.3
123
10/15.2
0.9
72.3
123
Gain Efficiency
Gain Efficiency
1.6 Efficiency
88%
1.6
88%
2.17 88%87.4%
2.17
87.4%
2.89 87.4%
86%
2.89
86%
3.45 86%85%
3.45
85%
4.31 85%84.1%
84.1%
4.31
84.1%
5.38
83.6%
83.6%
5.38
83.6%
7.3 80.9%
80.9%
7.3
80.9%
Energies 2017, 10, 474
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2017,10,
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11 of 13
11
11of
of13
13
Figure
Figure 14.
14. Comparison
Comparison of
of the
the system
system gain
gain curve.
curve.
Figure 14. Comparison of the system gain curve.
6.
6. Discussion
Discussion
6. Discussion
In
In order
order to
to present
present aa close
close loop
loop control
control of
of the
the voltage
voltage gain,
gain, aa Proportion
Proportion Integration
Integration
In order to present a close loop control of the voltage gain, a Proportion Integration Differentiation
Differentiation
(PID)
control
is
applied
to
regulate
the
duty
cycle
D
of
the
switches.
The
Differentiation (PID) control is applied to regulate the duty cycle D of the switches. The close
close loop
loop
(PID) control is applied to regulate the duty cycle D of the switches. The close loop control structure
control
control structure
structure can
can be
be shown
shown in
in Figure
Figure 15.
15.
can be shown in Figure 15.
Figure
Figure
15.
Figure15.
15. Close
Closeloop
loopcontrol.
control.
The
information
output
voltage
OO measured
is
to
the
side
by
Theinformation
informationofof
ofoutput
output
voltage
Vis
is measured
measured
and
sent
back
toprimary
the primary
primary
side
by an
an
The
voltage
VOV
andand
sentsent
backback
to the
side by
an Radio
Radio
(RF)-link.
Furthermore,
aa PID
is
to
duty
of
Radio Frequency
Frequency
(RF)-link.
Furthermore,
PID controller
controller
is utilized
utilized
to control
control
the
duty
cycle
ofSSS43,3
Frequency
(RF)-link.
Furthermore,
a PID controller
is utilized
to control
the
dutythe
cycle
of cycle
S3 and
and
to
and SS44,, according
according
to the
the difference
difference
between
O and
and
according
to the difference
betweenbetween
VO and V
VOref
. VVrefref..
A
load
switching
test
was
carried
out
to
evaluate
the
controller’s
performance.
In
this
test,
load
Aload
loadswitching
switchingtest
testwas
wascarried
carriedout
outto
toevaluate
evaluatethe
thecontroller’s
controller’sperformance.
performance. In
In this
this test,
test,load
load
A
condition
is
set
to
switching
between
10
Ω
and
30
Ω.
The
DC
input
voltage
is
set
at
5
V.
The
output
condition
is
set
to
switching
between
10
Ω
and
30
Ω.
The
DC
input
voltage
is
set
at
5
V.
The
output
condition is set to switching between 10 Ω and 30 Ω. The DC input voltage
at 5 V. The output
reference
voltage
is
set
at
20
V.
The
experimental
result
can
be
shown
in
Figure
16.
referencevoltage
voltageis
isset
setat
at20
20V.
V.The
Theexperimental
experimentalresult
resultcan
canbe
beshown
shownin
inFigure
Figure16.
16.
reference
As
can
be
seen
Figure
there
two
load
switching
events
in
the
process:
is
Ascan
canbe
beseen
seeninin
inFigure
Figure
16,
there
are
two
load
switching
events
incontrol
the control
control
process:
one
is
As
16,16,
there
areare
two
load
switching
events
in the
process:
one isone
from
from
20
Ω
to
10
Ω
(first
switching)
and
the
other
is
from
10
Ω
to
20
Ω
(second
switching).
In
the
from
20
Ω
to
10
Ω
(first
switching)
and
the
other
is
from
10
Ω
to
20
Ω
(second
switching).
In
the
20 Ω to 10 Ω (first switching) and the other is from 10 Ω to 20 Ω (second switching). In the control
control
the
output
is
stable
except
for
switching
disturbance.
The
control process,
process,
the
outputis voltage
voltage
is kept
kept
stable
except
for some
some
switching The
disturbance.
The
process,
the
output
voltage
kept
stable
except
for some
switching
disturbance.
experimental
experimental
results
verify
loop
performance
of
experimental
results
verify
the close
close
loop control
controlof
performance
of the
the PID
PID controller.
controller.
results
verify the
close
loop the
control
performance
the PID controller.
Energies 2017, 10, 474
Energies 2017, 10, 474
12 of 13
12 of 13
Figure 16.
16. Experimental
Experimental results
results of
of close
close loop
loop control.
control.
Figure
7. Conclusions
Conclusions
7.
achieve
controllable
highhigh
voltage
gain output,
this paper
proposed
a novel current-fed
In order
ordertoto
achieve
controllable
voltage
gain output,
this
paper proposed
a novel
push–pull
topology
for
the
WPT
system.
This
method
utilizes
a
bi-directional
switch
that
is
added
to
current-fed push–pull topology for the WPT system. This method utilizes a bi-directional switch that
isolate
thetoinverter
withinverter
resonant
network
andnetwork
guide the
power
flow
theflow
resonant
On the
is
added
isolate the
with
resonant
and
guide
the into
power
into tank.
the resonant
basis, On
an energy
storage
and injection
modeswitching
is proposed
to enhance
voltage
A switching
tank.
the basis,
an energy
storageswitching
and injection
mode
is proposed
togain.
enhance
voltage
duty cycle
is also proposed
to is
implement
gain control.
This method
can greatly
the voltage
gain.
A switching
duty cycle
also proposed
to implement
gain control.
This improve
method can
greatly
gain in the
system
maintain
a high system
efficiency
at the
sameefficiency
time. Thisatisthe
important
for
improve
theWPT
voltage
gainand
in the
WPT system
and maintain
a high
system
same time.
low DC
voltage input
application
including
PV power supply
and
USB
charger.
This
is important
for low
DC voltage
input application
including
PV
power
supply and USB charger.
Acknowledgments:
This research
research works
works is
is support
support by
by the
the National
of China
Acknowledgments: This
National Natural
Natural Science
Science Foundation
Foundation of
China
(51377187, 51377183) and the Chongqing International Science and Technology Cooperation Base Project
(51377187,
51377183)
and
the
Chongqing
International
Science
and
Technology
Cooperation
Base
Project
(CSTC2015GJHZ40001).
(CSTC2015GJHZ40001).
Author Contributions: The main idea of this paper is proposed by Qichang Duan and Yanling Li. Yanling Li
Author
Contributions:
The
main
idea of this
paper
is Zou
proposed
by Qichang
Duanexperiments.
and Yanling Li. Yanling Li
wrote
this
paper. Xin Dai
gave
experiment
design.
Tao
performed
verification
wrote
this
paper.
Xin
Dai
gave
experiment
design.
Tao
Zou
performed
verification
experiments.
Conflicts of Interest: The authors declare no conflict of interest.
Conflicts of Interest: The authors declare no conflict of interest.
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