Reconfigurable Radio Design
• Reconfigurable Architecture
– Reconfigurable Chip design example
– Hardware Reconfiguration
• Introduction to Software RADIO
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What is the Software RADIO ?
Advantage of the Software RADIO
Physical Layer of a Radio Modem/Software Defined Radio Modem
Software Defined RADIO Project
– Example of Development Tool/Configurable Resource
• Methodology of Software RADIO
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Technical Challenge
Multi Mode and Reconfigurable Terminals
Components
SDR Functional Blocks Description
Semiconductor
“Mainstream Silicon Application
Revolutions
is switching every 10 Years”
software
standard
µproc.,
memory
TTL
1967
1957
custom
LSI,
MSI
hardware
1977
reconfigurable
FPGAs
2007
1987
ASICs,
accel’s
1997
coarse
grain
Next Wave: Endless Possibilities
RFID
HCI
Bio
Data Broadcasting
Health
CIS
Mobile
D-TV Recorder
Automotive & Robotics
Telematics
Unmanned
Driving
Robot
Why Reconfigurable System?
•
•
GPP와 재구성 h/w 를
포함
목적: 전력 감축 및 유연
성
1. 동적인 환경에 따른
Quality of Service를 제
공
2. 알고리즘 진화에 따른 유
연한 구조
3. 개발 및 유지 보수해야 하
Task 1
Task N
A B
W
C
X Y
D E
Z
X
D
H
A
W
Y
B
I
J
C ZE
Reconfigurable Hardware
Energy Efficiency of
Reconfigurability
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system architecture
communication protocol
O/S and applications
Partitioning of functions between wireless
device and services on the network
– The mobiles must be flexible enough to
accommodate a variety of multimedia
services and communication capabilities
and adapt to various operating conditions
in an (energy) efficient way
S/W configurable platform의 필
요성
– Doing More by Doing Less :다양한 표
준을 다룰 수 있는 능력이 필요 (AM, FM,
GSM, UMTS, digital broadcasting
standards, analog and digital
television and other data links.
– A fully software reconfigurable multichannel broadband sampling receiver
for standards in the 100 MHz band
Gilder’s versus Moore’s law
2x/3-6 months
1M
1000 x
10,000
100
2x/18 months
97
99
01
03
05
07
Greg Papadopoulos, Sun Microsystems
The Ideal Information
Companion
DECT
GSM
Bluetooth
UMTS
802.11
ONE WLAN for many Standards ONE Information Appliance
ONE phone for many Standards
ONE PDA for many Standards
Future mobile communications
2000
2010
2020
Mobility
Intelligent
Transport
Systems
vehicle
3G cellular
4G cellular
Advanced
wireless
access
pedestrian
GSM
Wireless
LAN
static
2G
10k
3G
2M
High data rate
High mobility
System roaming
Seamless connections to
broadband networks
4G
50M
Millimeterwave
LAN
156M
HAPS
5G
622M
Data rate
Heterogeneous wireless
networks
by Havinga, [email protected]
There exist many wireless communication
networks
– frequency bands
– requirements on mobility
– transmission speed and quality
• Examples:
– Static: wireless LANs (802.11), Bluetooth,
Radio Local Loop
– Pedestrian: DECT, PHS
– Vehicle: 2/3G cellular, pagers, broadcast
TV/radio
Future wireless
communication
• Two trends will have major impact
– Wide proliferation of various wireless
access networks
• Each with their own preferred type of service
• Different quality: data rates, latency, mobility
support, ..
– Software radio technologies
• Programmable radios, Tunable front-ends
Heterogeneous networks, why?
• Due to roaming the network changed
– e.g. from indoor wireless LAN to outdoor
cellular radio
• There is coverage from multiple wireless
networks
–  Possibility to select the most appropriate
network for a given application, based on
for example
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•
•
Service classification
User requested QoS parameters
Available network capacity (bandwidth, latency)
Energy consumption needed
Heterogeneous network
architecture
• Goal
•
design a flexible and open architecture suitable for a
variety of different wireless access technologies, for
Key
requirements
applications
with different QoS demands, and different
–protocols
Different.access technologies (Software Defined Radio)
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Heterogeneous network support (use combination of networks)
Mobility management (seamless handover)
Wireless system discovery
Selection of efficient configuration
Simple, scalable, low cost
Energy efficient (always on)
Secure
Compatible/interoperable with existing and future work
Quality of Service support (end-to-end, and local applicable)
Evolution of the Cell Phone
• Two co-existent 3-G cellular standards:
– Wideband CDMA
• Also called UMTS, UTRA, IMT-2000.
• Standardized by 3GPP.
• Evolution of the GSM backbone.
– cdma2000
• Standardized by 3GPP2.
• Evolved from IS-95 CDMA (cdmaONE).
• Common traits:
– 2 GHz PCS band (licensed).
– Variable asymmetric data rates for multimedia:
• ~144 kbps to vehicles.
• ~ 2 Mbps to fixed locations near base station.
– Software-defined-radio (SDR) implementation.
Wireless Networking Hierarchy
MAN:
IEEE 802.16
LAN:
IEEE 802.11
& HIPERLAN
PAN:
Bluetooth, IEEE 802.15
Standardization of Wireless
Networks
• Wireless networks are standardized by
IEEE.
• Under 802Application
LAN MAN standards
Presentation
ISO
committee.
IEEE 802
OSI
7-layer
model
Session
Transport
Network
Logical Link Control
Data Link
Medium Access (MAC)
Physical
standards
Physical (PHY)
• Ideal한 목표: 채널 변복조 waveform을 Software를 이용.
• TX:source encoder, up-conversion of baseband signal to carry
frequency
• RX:carry phase recovery, symbol or PN code timing recovery
• 개방형 구조(Open Architecture)
• Radios that are flexible and easily configurable by
software
• 다중 대역, 다중 모드
• Radios based on virtual components (ie. system-ona-chip)
– 대부분의 기능들이 소프트웨어-programmable, 하드웨어-재구성가능한
프로세서 엘리먼트에서 소프트웨어에 의해 실현
– Configurable-ASIC, DSP 칩, 마이크로프로세서 칩, FPGA, 다른
programmable-DSP
Multi-Mode Info Receiver
Conventional Heterodyne
GSM 1800
GSM 1800
UMTS
UMTS
BT / 802.11
BT / 802.11
0.200-MHz BW
LO1
Low-Pass
LO2
5.0-MHz BW
10-MHz Low-Pass
FDD Mode 1
1.25-MHz Ch l
Legend
2G Cellular
10-MHz Low-Pass
LO4
1.25-MHz Ch 2
10-MHz Low-Pass
LO5
3G Cellular
1.25-MHz Ch 3
10-MHz Low-Pass
BT / 802.11
LO6
1.0-MHz BW
Low-Pass
LO7
FDD Mode 2
LO3
Multi-Mode Info Receiver
Software Defined Radio
GSM 1800
GSM 1800
UMTS
UMTS
BT / 802.11
BT / 802.11
A/D
Converter
Programmable
Channel Filter
LO
I
Q
Design Issues in SDR
•Design of fast and efficient analog-digital converters
•Flexibility at the RF front-end
•Effective data management procedures, resource allocation
•Smooth reconfigurability of the hardware
• Multiple personalities: 개발 및 유지/보수해야 하는 제
품 플랫폼 수 감소
– One platform supports any physical layer, protocol stack
– Lower System maintenance & upgrade cost
• No hardware replacement or frequent upgrade
• Flexibility:체계적으로 스케일될 수 있는 제품구조
– 새로이 진화되어 가고 있는 capacity 수용
• Backward Compatibility
• 미래 안정적(Future-Proof) 시스템 개발
• Time-to-Market 최소화
Disadvantages
• Higher power consumption than
dedicated ASIC approach
• More MIPS required
• Higher cost (today)
Current SDR users
• Military
– Consolidating a stack of radios
– Bridging between radio networks
• Cellular base stations
– Avoid “fork lift upgrades”
– Multiple standards on same system
– New features to market quicker
Emerging SDR uses
• Personal communication devices
– Cellular / Paging / Wireless LAN(s)
• PC based “generic transceiver”
– Radio / TV
– Emerging unlicensed RF band apps
What is “free/open software?”
• “Free as in liberty”
– User has access to the source
– User is free to modify and is encouraged to
contribute the modifications back to the
community
• A culture of innovation
• Various licenses: GNU General Public
License (GPL), Mozilla, Artistic License.
How to develop SW radio
• Proprietary software for each hardware
platform
• Standardization of a common hardware
platform
• Resident compilers and/or real-time
standard operating system
Who uses free software?
• World wide community of users
• Publicly traded companies support or
distribute free software: IBM, Red Hat,
Mandrake
• Linux
• Apache web server
• Not a fringe activity
What is GNU Radio?
Eric Blossom
[email protected]
Blossom Research
+1 831 917 3428
798 Lighthouse Ave., Suite 109
Monterey, CA 93940 USA
• It’s a free software defined radio
• A platform for experimenting with
digital communications
• A platform for signal processing on
commodity hardware
Vision
• Transmit and receive any signal
• Create a practical environment for
experimentation & product delivery
• Expand the “free software ethic” into
what were previously hardware intensive
arenas
What H/W is required?
• Commodity PC
• RF front end (e.g., TV tuner module)
• Multi-channel applications / wide B/W:
– High speed A/D (20 – 25 Msamples/sec)
• Single channel / narrow bandwidth:
– SoundBlaster, AC97 codec, etc.
SDR ATSC receiver is practical!
• Commodity PC:
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Dual processor Athlon 1800+ MP
512 MB RAM / 120 GB disk
$1300
Can do:
• 6 * 10^9 integer ops / sec
• 4 * 10^9 FIR filter taps / sec
ATSC computational
requirements
• 1080i TSP decode takes about ½ of a single
CPU
• Naïve equalizer: about 2.5 * 10^9 taps/s
– Smart s/w version: about 0.6 * 10^9 taps/s
• Viterbi decoder: 10^6 decisions / sec.
– Highly amenable to SIMD implementation
– Short constraint length
Open source hardware too!
• General purpose SDR PCI peripheral:
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Tuner module
$20
25 Msample/sec A/D converter $12
Spartan II FPGA (100k gates)
$18
Misc analog, SRAM, etc
$10
PWB
$10
Assembly & Test
$10
• Total cost to manufacture:
$80
GNU Radio resources
• Home page (links to source code)
http://www.gnu.org/software/gnuradio
• Mailing list
[email protected]
• Archive
http://mail.gnu.org/mailman/listinfo/discussgnuradio
• Open source hardware
– http://www.opencores.org/projects/pci
– PCI bridges, ethernet, memory controllers, etc.
SDR Evolution
• Next Generation: HIPERLAN/2, 3G Cellular
– OFDM, CDMA
– Code Domain Channelization
– Wide Band, Frequency-Shared Medium
– Friendly Interference Suppressed Via
Orthogonal Chipping Codes with ~30 dB
Processing Gain
– Software-centric, Can Vary Channel
Characteristics with Application and
SDR solution으로 5 단계
Tier
0
전통적인 하드웨어 구현
Tier
1
SCR(softwar 소프트웨어로 다중 하드웨어
e
요소에 대한 제어 특징을
controlled
구현
radios)
Tier
2
SDR(softwar 소프트웨어로 변조와 기저대
e defined
역 처리를 구현하고, 다중
radios)
주파수 RF는 고정된 기능
의 하드웨어로 구현
Tier
3
ISR(Ideal
Software
radio)
안테나에서 아날로그 변환 기
능을 갖는 RF 구현을 통해
프로그램 능력을 확장
Tier
4
USR(Ultimat
e
software
디지털 처리 능력에 추가하여,
빠른(수 millisecond 이내)
통신 프로토콜 전환 능력까
SandBridge
(ARM+
4DSP’s)
Granularité de la
reconfiguration
Sébastien PILLEMENT - ENSSAT/LASTI
• Reconfiguration au niveau système
– Lx, C62 (décomposition en cluster)
• Reconfiguration au niveau fonctionnel
– Pleiades, RaPiD, DART(2001)
• Reconfiguration au niveau opérateur
– Chameleon, Piperench, Morphosys(2000)
• Reconfiguration au niveau porte
• Napa, GARP, FPGA
The gain size of operations
in Reconfigurable System Architectures
– Fine gained operations : Multiply and
addition
– Medium gained operations : reconfigurable
modules
– Course gained operations : CPU, host
Design Space of
Reconfigurable Architectures
RECONFIGURABLE ARCHITECTURES
(R-SOC)
Lilian Bossuet
LESTER Lab
Université de Bretagne Sud
Lorient, France
MULTI GRANULARITY
(Heterogeneous)
FINE GRAIN
(FPGA)
Processor +
Coprocessor
Island
Topology
Hierarchical
Topology
Coarse Grain
Coprocessor
Fine Grain
Coprocessor
• Xilinx Virtex
• Xilinx Spartran
• Atmel AT40K
• Lattice ispXPGA
• Altera Stratix
• Altera Apex
• Altera Cyclone
• Chameleon
• REMARC
• Morphosys
• Pleiades
• Garp
• FIPSOC
• Triscend E5
• Triscend A7
• Xilinx Virtex-II Pro
• Altera Excalibur
• Atmel FPSIC
COARSE GRAIN
(Systolic)
Tile-Based
Architecture
Mesh
Topology
• aSoC
• E-FPFA
Linear
Topology
• RAW
• Systolic Ring
• CHESS
• RaPiD
• MATRIX
• PipeRench
• KressArray
• Systolix Pulsedsp
Hierarchical
Topology
• DART
• FPFA