Using Karnaugh Maps to Design Logic Circuits

Designing Logic Circuits
0908531 Mechatronics System Design
Using Karnaugh Maps to Design Logic Circuits
Dr. Lutfi R. Al-Sharif (2012)
KARNAUGH MAPS
Karnaugh maps (or K maps as they are usually known are a method for deriving and
simplifying Boolean expressions for logic functions from a truth table. They are
usually for three and four input variable truth tables (two variable truth tables are two
simple as they can be usually implemented using a standard gate; K-maps for 5
variables become too complicated as they are three dimensional). Computer
programs are usually used for 5 variables and above.
Karnaugh maps are a method of designing logic systems.
Figure 1: A two variable Karnaugh Map.
Figure 1: A two variable Karnaugh Map.
shows a two variable Karnaugh map. This is so simple, that it is of no practical use
in practice, as its results could be arrived at mentally. The more widely used maps
are the three and four variable maps, which are shown in Figure 2 and Figure 3
respectively.
Figure 2: A three variable Karnaugh map.
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Designing Logic Circuits
0908531 Mechatronics System Design
Figure 3: A four variable Karnaugh map.
Once a truth table is derived for the variable, the values of the variable are inserted
into the Karnaugh map, in the sequence shown in Figure 4.
Figure 4: 4 variable Karnaugh map, showing sequence of entering results.
Any outputs where it does not matter what the output is (i.e., 1 or 0), are called “don’t
care” output, and an X is inserted in that square. The X can be counted as either a
zero or a one, but not both.
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Designing Logic Circuits
0908531 Mechatronics System Design
Figure 5: Examples of Karnaugh map
simplification.
Two examples on filled Karnaugh maps are shown in Figure 5. Karnaugh maps are
then simplified before proceeding to design, by combining all similar outcomes
together, as shown in Figure 5. The shapes of these groups has to be a square or a
rectangle. An X can be counted as either a 1 or a 0, but not both. This helps to
further simplify the map. Once this combination process is carried out, the final
design is the implementation of all these groups using basic AND and OR gates.
EXAMPLE 1
Use the Karnaugh map to derive the logic expression for the segment a in a seven
segment display driven by four bit, A, B, C and D, as shown in Figure 6.
Figure 6: Example 3.1, Seven segment decoder.
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Attributed to: [Dr. Lutfi R. Al-Sharif]
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Designing Logic Circuits
0908531 Mechatronics System Design
SOLUTION
First we need to develop the truth table, which shows the relationships between the
inputs (A,B,C,D) and the output (segment a in this case).
The truth table is shown in Table 1.
Table 1: Truth table for output a.
A
B
C
D
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Output
Y
1
1
1
1
1
0
0
1
1
1
X
X
X
X
X
X
Figure 7: Circuit showing the inputs as ABCD and output as segment a drive.
A four variable Karnaugh map is then developed as shown in Figure 8.
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Attributed to: [Dr. Lutfi R. Al-Sharif]
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Designing Logic Circuits
0908531 Mechatronics System Design
Figure 8: Example of a four variable Karnaugh map.
As the number of zero’s is much smaller that the number of one’s, it was easier in
this case to implement the zero’s and then invert the output. So the expression
becomes:
Where the symbol is the exclusive OR symbol.
implemented as shown in Figure 9.
The equation above can be
Figure 9: Solution for segment a circuit.
Note that the output is independent of the value of the input A.■
Source URL: http://www.ju.edu.jo/sites/Academic/l.sharif/Material/Forms/AllItems.aspx
Saylor URL: http://www.saylor.org/courses/me302
Attributed to: [Dr. Lutfi R. Al-Sharif]
www.saylor.org
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