CISE204: Design of Digital
Systems
Lecture 19 : Analysis of clocked Sequential Circuits
Dr. Samir Al-Amer
(Term 101)
Reading Assignment: Section 5.5
Outlines




State Equations
State Table
State Diagrams
Analysis with




D-Flip Flops
JK -Flip Flops
T-Flip Flops
State Reduction and Assignment
Objective

Analysis of a clocked sequential circuit
Obtain a table or a diagram of the time
sequence of input, output and internal states
State Equation

State Equation: Determines the next state in
terms of present state and inputs
A(t+1)= A(t) x(t) + B(t) x(t)
or (in compact form)
A(t+1)= A x + B x
State Table

Enumeration of the state Equation
Present
A
Present
B
input
x
Next
A
Next
B
Output
0
0
0
0
0
0
0
0
1
0
1
0
0
1
0
0
0
1
0
1
1
1
1
0
1
0
0
0
0
1
1
0
1
1
0
0
1
1
0
0
0
1
1
1
1
1
0
0
State Table (Alternative Form)
Present State
Next State
A
B
X=0
X=1
A B
A B
0
0
0 0
0 1
Output
X=0
X=1
Y
Y
0
0
0
1
0
0
1
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
0
1
0
State Diagrams




Each state is represented by
a circle
Numbers inside the circle
identifies the values of the
flip flops
Arrows represent next state
Number shown on the
arrow represent the input
and output separated by
slash
1/0
00
0/1
01
0/1
0/0
1/1
11
0/1
10
1/1
1/1
Analysis with D-Flip Flop
x
D
y
D
Flip Flop
00,11
01,10
0
00,11
1
01,10
C
1
0
00
0
01
0
1
11
0
10
1
1