EKT 221 DIGITAL ELECTRONICS II TUTORIAL 3 Question 1 a) Starting from state 00 in the state diagram of Figure 3a, determine the state transitions and output sequence that will be generated when an input sequence of 010110111011110 is applied. For this purpose, construct a table showing the values of Present State, Input, Output and Next State. b) A sequential circuit has two flip-flops, A and B, one input X and one output Y. The state diagram is shown in Figure 3b. Design the circuit using JK flip-flops. Question 2 Question 3 a) A sequential circuit with two D flip-flops DA and DB, two inputs X and Y, and one output Z, is specified by the following input equations: D A X Y XA DB X B XA Z XB i. Draw the logic diagram of the circuit. ii. Derive the state table. iii. Derive the state diagram. iv. Draw the ASM chart. b) A sequential circuit has three D flip-flops, DA, DB and DC, and one input X. The circuit is described by the following following input equations: D A ( BC BC ) X ( BC BC ) X DB A DC B i. Derive the state table. ii. Draw two state diagrams, one for X=0 and the other for X=1. iii. Draw the ASM chart. c) A sequential circuit has one flip-flop Q, two inputs X and Y, and one output S. The circuit consists of a D flip-flop with S as its output and logic implementing the function: D X Y S with D as the input to the D flip-flop. Derive the state table, state diagram and ASM chart of the sequential circuit. Question 4 Question 5 Refer to the state diagram below, and assume that X1 and X2 are inputs to the circuit while Z1 and Z2 are the outputs. Assume initial state is S0. 00,01 S0 / 00 10,11 S1 / 01 00 01,10 01,10,11 00,11 S2 / 10 a) i. Produce the corresponding state table. ii. Is it a Mealy or Moore model? Why? b) Produce an equivalent logic circuit, using D flip-flops. c) i. Produce a corresponding ASM chart. Based on your answer in c (i), find the next state and output values for the following sequence of input values and complete the table below. X1 X2 1 1 0 0 1 1 1 1 0 0 0 0 Next State Z1 Z2 Question 6 a) Analyse the schematic diagram below. Assume that the flip-flops are initially cleared. i) Derive the flip-flop input equations for each flip-flop in the register. ii) Derive the State Table. iii) Produce the State Diagram. Question 7 Refer to the state diagram below. X1 and X2 are inputs to the circuit while Z1 and Z2 are the outputs. Assume initial state is S0. 00,01 01,11 S0/ 00 S1/ 11 00 10,11 10 01,11 00,01 S2/ 10 11 00,10 S3/ 01 10 a) Produce the corresponding state table. b) Identify whether it is a Mealy or Moore model. State your reason. c) Design the logic circuit using D flip-flops. d) Produce a corresponding Algorithmic State Machine (ASM) chart.
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