Finite State Machines - SMDP-VLSI

High-Level Synthesis-II
Virendra Singh
Indian Institute of Science
Bangalore
[email protected]
IEP on Digital System Synthesis @ IIT Kanpur
Architectural Synthesis
Architectural Level Abstraction
Datapath
Controller
Architectural Synthesis
• Constructing the macroscopic structure of a
digital circuit starting from behavioural models
that can be captured from Data flow or
Sequencing Graph
Dec 18,2007
HLS@iitk
2
Architectural Synthesis
Objective
• Area
• Cycle time
• Latency
• Throughput
Worst case bound
Evaluation
Architectural Exploration
Dec 18,2007
HLS@iitk
3
Architectural Synthesis
Architectural synthesis tool can select an appropriate
design point according to some user specific criterion
and construct corresponding user specific Datapath
and Controller
Circuit Specification for Architectural Synthesis
• Behavioural circuit model
• Details about resources being used and constraints
•Capture by Sequencing Graph
Dec 18,2007
HLS@iitk
4
Architectural Synthesis
Resources
• Functional Resources
• Primitive Resources
• Application Specific Resources
• Memory Resources
• Interface Resources
Dec 18,2007
HLS@iitk
5
Architectural Synthesis
Circuit Specification
• Sequencing Graph
• A set of functional resources, fully characterized in
terms of area and execution delay
• A set of constraints
Dec 18,2007
HLS@iitk
6
Architectural Synthesis
Computation: Differential Equation Solver
xl = x + dx
ul = u – (3*x*u*dx) – (3*y*dx)
c = xl < a
Data Flow Graph (DFG): represent operation and data
dependencies
Dec 18,2007
HLS@iitk
7
Data Flow Graph
x
u
y
3
dx
u
3
1
2
*
*
3
6
*
dx
*
7
*
*
yl
5
10
a
xl
+
-
dx
+
8
y
u
4
x
dx
9
<
11
c
ul
Dec 18,2007
HLS@iitk
8
Sequencing Graph
NOP
1
2
*
*
3
*
4
7
*
*
*
8
+
10
+
9
<
11
5
Dec 18,2007
6
-
NOP
HLS@iitk
9
Hierarchical Sequencing
Graph
NOP
a.0
a.1
*
+
a.2
b.0
a.4
a.3
NOP
CALL
*
NOP
a.n
+
b.1
NOP
Dec 18,2007
HLS@iitk
b.2
*
b.n
10
Architectural Synthesis
Architectural Synthesis and optimization
consistes of two stages
1. Placing the operation in time and in space,
i.e., determining their time interval of
execution and binding to resources
2. Determining detailed interconnection of the
datapath and the logic-level specifications of
the control unit
Dec 18,2007
HLS@iitk
11
Temporal Domain:
Scheduling
Delay D = {di; i = 0,1, 2, ….. n}
Start time T ={ti; i= 0, 1, …., n)
Scheduling: Task of determining the start timing,
subject to preceding constraints specified by
sequencing graph
Latency λ = tn – t0
Dec 18,2007
HLS@iitk
12
Temporal Domain:
Scheduling
A scheduled sequencing graph is a vertex-weighted
sequencing graph, where each vertex is labeled by its
start time
Operation
Start time
V1,V2, v6,v8, v10
1
V3, v7, v9,v11
2
V4
3
V5
4
 Chaining
Dec 18,2007
HLS@iitk
13
Temporal Domain:
Scheduling
NOP
1
TIME 1
TIME 2
2
*
*
3
*
4
TIME 3
7
Dec 18,2007
*
*
*
8
+
10
+
9
<
11
5
TIME 4
6
-
NOP
HLS@iitk
14
Temporal Domain:
Scheduling
NOP
TIME 1
TIME 2
TIME 3
TIME 4
TIME 5
TIME 6
*1
* 2
*
*
+
10
<
11
-
4
3
6
* 7
*
-
8
+
TIME 7
Dec 18,2007
NOP
5
9
HLS@iitk
15
Spatial Domain: Binding
A fundamental concept that relates operation to
resources is binding
• Resource types
• Resource sharing
Simple case of binding is a dedicated resources
Dec 18,2007
HLS@iitk
16
Spatial Domain: Binding
β(v1) = (1,1)
β(v2) = (1,2)
β(v3) = (1,3)
β(v4) = (2,1)
β(v5) = (2,2)
..
Dec 18,2007
HLS@iitk
17
Spatial Domain: Binding
NOP
1
TIME 1
TIME 2
2
*
*
3
*
4
TIME 3
7
Dec 18,2007
*
*
*
8
+
10
+
9
<
11
5
TIME 4
6
-
NOP
HLS@iitk
18
Spatial Domain: Binding
A necessary condition for resource binding to produce
a valid circuit implementation is that operation
corresponding to the shared resource do not execute
concurrently
A resource binding can be represented by a labeled
hyper-graph, where the vertex set V represents
operations and the edge set Eβ represents the binding
of the operation to the resources
Dec 18,2007
HLS@iitk
19
Spatial Domain: Binding
NOP
(1,1)
1
TIME 1
TIME 2
TIME 3
(1,2)
(1,3)
2
*
*
3
(2,1)
*
4
7
Dec 18,2007
*
*
*
8
+
10
+
9
<
11
5
TIME 4
6
(2,2)
(1,4)
-
NOP
HLS@iitk
n
20
Spatial Domain: Binding
NOP
1
TIME 1
TIME 2
2
*
*
3
*
4
TIME 3
7
Dec 18,2007
*
*
5
TIME 4
6
0
-
*
8
+
9
+
10
<
11
NOP n
HLS@iitk
21
Sequencing Graph
NOP
1
2
*
*
3
*
4
7
*
*
*
8
+
10
+
9
<
11
5
Dec 18,2007
6
-
NOP
HLS@iitk
22
Hierarchical Sequencing
Graph
NOP
a.0
(1,1)
a.1
*
+
(2,1)
a.2
b.0
a.4
a.3
(1,2)
NOP
CALL
*
NOP
a.n
+
b.1
NOP
Dec 18,2007
HLS@iitk
b.2
*
b.n
23
Synchronization
0
NOP
a
1
*
SYN
3
2
+
+
NOP n
Dec 18,2007
HLS@iitk
24
Synchronization
0
NOP
NOP
0
a
1
*
a
SYN
SYN
1
*
3
2
+
3
2
+
+
+
NOP n
NOP n
Dec 18,2007
HLS@iitk
25
Synchronization
0
NOP
1
*
a
SYN
+
2
+
3
NOP n
Dec 18,2007
HLS@iitk
26
Area/Performance
Estimation
Accurate area and performance estimation is not an
easy task
Schedule: provides latency
Binding: provides information about the area
Dec 18,2007
HLS@iitk
27
Retiming
+
+
+
Host
δ
Dec 18,2007
δ
HLS@iitk
δ
28
Retiming
7
0
0
Vg
0
7
0
Vf
7
Ve
0
Vh
0
1
0
3
1
Dec 18,2007
0
Vb
Vc
3
3
1
HLS@iitk
Vd
3
1
29
Retiming
7
0
0
Vg
0
7
0
Vf
7
Ve
0
Vh
0
1
0
1
3
0
Vb
3
Vc
1
3
Vd
3
1
Delay = 24
Dec 18,2007
HLS@iitk
30
Retiming
1
7
0
0
Vg
0
7
7
Vf
Ve
0
Vh
0
1
0
3
1
Dec 18,2007
0
Vb
Vc
3
3
0
HLS@iitk
Vd
3
1
31
ASAP Scheduling
NOP
1
TIME 1
TIME 2
2
*
*
3
*
4
TIME 3
7
*
*
*
8
+
10
+
9
<
11
5
TIME 4
6
NOP
Dec 18,2007
HLS@iitk
32
ASAP Scheduling
ASAP(Gs(V,E)){
Schedule v0 by setting t0s = 1;
repeat{
select vertex vi whose predecessors are
all scheduled;
schedule vi by setting tis = max{tjs+ dj}
} untill (vn is scheduled)
return ts
}
Dec 18,2007
HLS@iitk
33
ALAP Scheduling
NOP
1
TIME 1
TIME 2
2
*
*
3
*
4
TIME 3
5
TIME 4
6
*
7
*
-
*
8
+
10
+
9
<
11
NOP
Dec 18,2007
HLS@iitk
34
Scheduling under Timing
Constraints
Scheduling under latency constraints
Absolute constraints on start time
Relative constraints
Relative timing constraints are positive integers
specified for some operation pair vi, vj
A minimum timing constraint lij ≥ 0 requires tj ≥ ti+lij
A maximum timing constraint uij ≤ 0 requires tj ≤ ti+uij
Dec 18,2007
HLS@iitk
35
Constraint Graph
0
NOP
3
Max
1
*
*
Time
4
Time
3
Min
4
2
+
+
NOP n
Dec 18,2007
HLS@iitk
36
Constraint Graph
0
NOP
3
Max
*
*
1
Time
3
2
+
+
0
4
0
Min
3
4
1
*
Time
4
0
NOP
-3
*
2
2
2
4
2
+
NOP n
+
1
1
NOP n
Dec 18,2007
HLS@iitk
37
Relative Scheduling
Scheduling under unbounded delay
The anchors of a constraint graph G(V,E)
consists of the source vertex v0and all vertices
with unbounded delay
Redundant anchor
Dec 18,2007
HLS@iitk
38
Sequencing Graph
0
NOP
a
1
*
SYN
3
2
+
+
NOP n
Dec 18,2007
HLS@iitk
39
Scheduling with Resource
Constraint
Scheduling under resource constraints
• computing area/latency trade-off points
Problems
• Intractable problem
•Area-performance trade-off points are affected
by the other factors - non-resource dominated
circuits
Dec 18,2007
HLS@iitk
40
Scheduling with Resource
Constraint
ILP Formulation
Binary decision variable X = {xil}
1. Start time of each operation is unique
Σl xil = 1
2. Sequencing relations represented by Gs(V,E) must be
satisfied
Σl xil ≥ Σl xjl + dj
3. Resource bound must be met at every schedule step
Σk Σm xim ≤ ak
Dec 18,2007
HLS@iitk
41
ILP Formulation
All operation must
start only once
x0,1 = 1
x1,1 = 1
x2,1 = 1
x3,2 = 1
x4,3 = 1
x5,4 = 1
Dec 18,2007
x6,1 + x6,2 = 1
x7,2 + x7,3 = 1
x8,1 + x8,2+x8,3 = 1
x9,2 + x9,3+x9,4 = 1
x10,1 + x10,2+x10,3 = 1
x11,2 + x11,3+x11,4 = 1
xn,5 = 1
HLS@iitk
42
ILP Formulation
Constraints – based on sequencing
(more than one starting time for at least one operation)
2 x7,2 + 3 x7,3 – x6,1 – 2 x6,2 – 1 ≥ 0
2 x9,2 + 3 x9,3 + 4 x9,4 – x8,1 – 2 x8,2 – 3 x8,3 – 1 ≥ 0
2 x11,2 + 3 x11,3 + 4 x11,4 – x10,1 – 2 x10,2 – 3 x10,3 – 1 ≥ 0
4 x5,4 – 2 x7,2 – 3 x7,3 – 1 ≥ 0
5 xn,5 – 2 x9,2 – 3 x9,3 – 4 x9,4 – 1 ≥ 0
5 xn,5 – 2 x11,2 – 3 x11,3 – 4 x11,4 – 1 ≥ 0
Dec 18,2007
HLS@iitk
43
ILP Formulation
Resource Constraints
x1,1 + x2,2 + x6,1 + x8,1 ≤ 2
x3,2 + x6,2 + x7,2 + x8,2 ≤ 2
x7,3 + x8,3 ≤ 2
x10,1 ≤ 2
x9,2 + x10,2 + x11,2 ≤ 2
x4,3 + x9,3 + x10,3 + x11,3 ≤ 2
x5,4 + x9,4 +x11,4 ≤ 2
Dec 18,2007
HLS@iitk
44
ILP Formulation
Optimize ΣiΣl l.xil
x6,1 + 2 x6,2 + 3 x7,2 + 3 x7,3 + x8,1 + 2 x8,2 + 3 x8,3
+ 2 x9,2 + 3 x9,3 + 4 x9,4 + x10,1 + 2 x10,2 + 3 x10,3
+ 2 x11,2 + 3 x11,3 + 4 x11,4
Dec 18,2007
HLS@iitk
45
Resource Sharing
Resource sharing: Assignment of resource to
more than one operation
Goal: Reduce area
Resource binding: explicit definition of mapping
between resources and operation
Binding may imply some resources are shared
Dec 18,2007
HLS@iitk
46
Optimum Scheduling
under Resource Constraint
NOP
1
TIME 1
TIME 2
2
*
*
3
*
4
TIME 3
5
TIME 4
6
*
7
*
-
*
8
+
9
+
10
<
11
NOP
Dec 18,2007
HLS@iitk
47
Scheduled Sequencing
Graph
NOP
1
TIME 1
TIME 2
2
*
*
3
*
4
TIME 3
5
TIME 4
6
*
7
*
-
*
8
+
9
+
10
<
11
NOP
Dec 18,2007
HLS@iitk
48
Compatibility Graph
9
3
1
8
4
10
7
6
2
5
11
Dec 18,2007
HLS@iitk
49
Conflict Graph
9
3
1
8
4
10
7
6
2
5
11
Dec 18,2007
HLS@iitk
50
Transitive orientation of
Compatibility Graph
9
3
1
8
4
10
7
6
2
5
11
Dec 18,2007
HLS@iitk
51
Resource Sharing in NonHierarchical Seq. Graph
Searching for binding compatible
Σr bir = a
Σbir Σ xim ≤ 1
Dec 18,2007
HLS@iitk
52
Scheduled and Bound
Sequencing Graph
(1,2)
(1,1)
1
TIME 1
TIME 2
NOP
(2,1)
2
*
*
3
*
4
TIME 3
5
TIME 4
-
6
*
7
*
(2,2)
*
8
+
9
+
10
<
11
NOP
Dec 18,2007
HLS@iitk
53