CHAPTER SIX
REGISTERS AND COUNTERS
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A clocked sequential circuit consists of a group of
flip-flops and combinational gates connected to
form a feedback path.
A circuit with flip-flops is considered a sequential
circuit even in the absence of combinational
gates.
Circuits that include flip-flops are classified by
the function they perform.
Two such circuits are registers and counters.
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A register is a group of flip-flops, each one of
which is capable of storing one bit of information.
An n-bit register consists of a group of n flip-flops.
A register consists of a group of flip-flops together
with gates that affect their operation. (they
determine how the information is transferred into
register).
A counter is a special type of register that goes
through a predetermined sequence of binary
states.
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Four-bit register
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CLEAR or RESET. When CLEAR is 0 the flip flop
is resetting independent of clock and D values. It is
useful because in digital systems when the power is
turned on the state of flip-flops is unknown. Direct
input CLEAR can bring all flip-flops to the known
starting state prior to the clock operation.
REGISTER WITH PARALLEL LOAD
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The transfer of new information into a register is
referred to as loading or updating the register.
If all the bits of the register are loaded
simultaneously with a common clock pulse, we say
that the loading is done in parallel.
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Two channel
mux
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Four-bit register with parallel load
SHIFT REGISTERS
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A register capable of shifting the binary
information held in each cell to its neighboring cell
in a selected direction is called a shift register.
It consists of a chain of flip-flops in cascade, with
the output of one flip-flop connected to the input of
the next flip-flop.
All flip-flops receive common clock pulses, which
activate the shift of data from one stage to the
next.
We can control the shift operation by connecting
(shift control) with the clock through an AND gate
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Four-bit shift register
input
1011
F.F #1 (0)
F.F #2 (0)
F.F #3 (0)
F.F #4 (0)
1
0
0
0
1
1
0
0
0
1
1
0
1
0
1
1
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SERIAL TRANSFER
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A digital system is said to operate in serial mode
when information is transferred and manipulated
one bit at a time.
Information is transferred one bit at a time by
shifting the bits out of the source register into the
destination register.
The serial transfer of information from register A
to register B is done with shift registers where
the SO of register A is connected to the SI of
register B.
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Serial transfer from register A to register B
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 In
the parallel mode, information is available from
all bits of a register and all bits can be transferred
simultaneously during one clock pulse.
 In
the serial mode, the registers have a single serial
input and a single serial output. The information is
transferred one bit at a time while the registers are
shifted in the same direction.
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SERIAL ADDITION
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UNIVERSAL SHIFT REGISTER
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A register capable of shifting in one direction only
is a unidirectional shift register.
A register capable of shifting in both direction is a
bidirectional shift register.
If the register has both shifts and parallel-load
capabilities, it is referred to as a universal shift
register.
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The most general shift register has the following
capabilities:
 A clear control to clear the register to 0.
A
clock input to synchronize the operation.
A
shift-right control and the serial input & output
lines associated with it.
A
shift-left control and the serial input & output
lines associated with it.
A
parallel-load control and the n input lines
associated with the parallel transfer.
n
parallel output lines.
A
control state that leaves the information in the
register unchanged in response to the clock.
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RIPPLE COUNTERS (ASYNCHRONOUS)
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A register that goes through a prescribed sequence
of states upon the application of the clock pulses is
called a counter.
A counter that follows the binary number
sequence is called a binary counter.
An n-bit binary counter consists of n flip-flops and
can count in binary from 0 to 2n-1.
Counters are available in two categories:
 Ripple counters (Asynchronous)
 Synchronous counters
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BINARY RIPPLE COUNTER
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It consists of a series connection of complementing
flip-flops (T or D or JK), with the output of each
flip-flop connected to the C input of the next higher
order flip-flop.
The flip-flop holding the LSB receives the incoming
count pulses.
The T inputs of all the flip-flops are connected to
logic 1, making each f-f complement if the clock
input goes through a negative transition.
For D f-f, the complemented output connected to
the D input.
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BCD RIPPLE COUNTER (DECADE COUNTER)
A decimal counter follows a sequence of 10 states
and returns to 0 after the count of 9.
 The BCD counter is a decade counter, since it
counts from 0 to 9.
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0
0
0
0
25
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To count in decimal from 0 to 99, we need a twodecade counter.
 To count in decimal from 0 to 999, we need a
three-decade counter.
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SYNCHRONOUS COUNTERS
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They are different from ripple counters in that clock
pulses are applied to the input of all flip-flops.
The decision whether a flip-flop is to be
complemented is determined from the values of the
data inputs.
If T = 0 or J = K = 0, the flip-flop does not change
state.
If T = 1 or J = K = 1, the flip-flop complements.
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A3
A2
A1
A0
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FLIP-FLOPS
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T Flip-Flop
T
J
Q
K
Q
D = JQ’ + K’Q
D = TQ’ + T’Q = T  Q
D
T
Q
Q
T
Q
Q
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UP-DOWN BINARY COUNTER
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The LSB is complemented with each pulse.
A bit in any other position is complemented if all lower
significant bits are equal to 0.
Up i/p Down i/p
Operation
0
0
No change
0
1
Count down
1
0
Count up
1
1
Count up (up has higher
priorty over the down)
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BCD COUNTER
TQ1 = 1
TQ2 = Q’8Q1
TQ4 = Q2Q1
TQ8 = Q8Q1 + Q4Q2Q1
Y = Q8Q1
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BINARY COUNTER WITH PARALLEL LOAD
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Counters in digital systems require a parallelload capability for transferring an initial binary
number into the counter prior to the count
operation.
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Asynchronous
clear
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37
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Using this counter as BCD counter
Initially the counter
is cleared to 0 then
put clear = count =1
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 The
problems are :
6.2, 6.4, 6.8, 6.9
6.6, 6.7,
6.11, 6.12, 6.13
6.17, 6.22, 6.27, 6.28
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