TPS65270 peak current mode loop
compensation
Prepared by Tony Huang
Aug, 2012
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Agenda
• TPS65270 introduction in brief:
• Peak current mode introduction:
• Peak current control block diagram:
• Peak current mode small signal analysis:
• Design example:
• Conclusion:
• Q&A:
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TPS65270 introduction in brief
1. TPS65270 is a dual channel DCDC with peak current mode implementation with
integrated synchronous rectifier power FET.
2. TPS65270 has been designed with 5-16V wide input, and loading capability up to
3/2A output currents. Individual SS and EN pins, adj. frequency (300kHz ~ 1.4MHz),
Power on sequencer, automatic Power-Save-Mode for light load operations
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Peak current mode introduction
•
PCM employed a current sampling RAMP to compare
with output of the EA(Error amplifier), hereby generate the
regulated duty cycle as showed in above Figure.
• PCM benefited the fast response by input or loading
transient, with current and voltage loops to realize higher
crossover frequency.
.
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The overall control block diagram
implementation
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Buck converter small signal analysis
The average model and Small signal model.
The gain function from inductor current to output can be got as below:
Ro ( S ) 
VO ( S )
RLoad

I L ( S ) 1  SRLoad Co
The gain function from duty cycle to inductor current can be got as below:
H di ( S ) 
VI (1  SRLoad Co )
I L (S )

D(S ) RLoad  SL  S 2 Ro LCo
Considering the practical crossover frequency is much higher than the corner frequency
1
I ( S ) VI
H di ( S )  L

D( S ) SL
The average model
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The Small signal model
(2 LCo )
Gain functions derivation
•
The gain function from Vin to inductor current can be got as below:
I (S )
H vi ( S )  L

VI ( S )
( SC o 
1 S
1
R Load
L
R Load
)D
 S 2 LC o

D
SL
The gain from control to duty cycle can be got as below:
1
FM 
( S n  S e )Ts
Sn is the rising slope of the inductor current;
Se is the slope compensation rising slope element.
Ts is the switching cycle.
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Sampling Hold function analysis
•
^
The discrete equation can be derived to describe the sampling-hold behavior:
^
^
1
iL ( K  1)   iL (k )  R (1   ) vc (k  1)
i

“Sf” is the inductor current ramp down slope.
S f  Se
Sn  Se
. Then, the gain from inductor current to control voltage can be got as below:
I (Z ) 1   Z
H (Z )  L

Vc ( Z )
Ri Z  
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Sample hold function analysis
>Based on “Z” domain stability theory, the single pole should meet below condition:
 1
>As a result, the slope compensation element “Se” should meet adequately It’s the
S
criteria for slope compensation: S e  n
2
>With substituting “Z” with “ e Ts S ” and considering zero order sampling-hold
gain 1  e T S , Then:
1   e Ts S 1  e Ts S
1   (e Ts S  1)
H (S ) 

Ts S
Ts S
Ri e   Ts S
Ri Ts S (e Ts S   )
The below is the gain block description for H(S):
s
H di ( S ) 
I L ( S ) VI

D( S ) SL
Based on the above block and H(S) function, we can get the sampling hold
function He(S) as below:
Ts S
S
S2
H e (S )  T S
 1

2
e 1
( ) 2
s
Ts
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Ts
Simplify the sample-hold function
Ts S
S
S2
H e ( S )  Ts S
 1

2
e 1
( ) 2
Ts
Ts
The approximated gain from control to inductor current should be:
H (S ) 
1
Ri
1
2
Ts L( S n  S e ) Ts
2 Ts
1  S[
 ] S
VI Ri
2
2
The approximate gain from control to inductor current should be:
2L
2
Ts (
 1)
1
D L (1  D)Ts
Ts2
F

[ 
]
i
Ce  2
L
R
2
e
 L
Then the simplified schematic can be showed as below
Re 
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Verify the model based on TPS65270
PCM(I)
Condition: The frequency is 635kHz, input is 12V and output is 3.3V/2A & 7.7/1A.
For channel 2 with 3.3V output:
(V  Vo )
(12  3.3)
Sn  I
Ri 
 0.1  0.128V / us
L
6.8u
V
3.3
S f  o Ri 
 0.1  0.048V / us
L
6.8u
TPS65270 slope compensation: Se=0.18V/us; Then:
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
S f  Se
Sn  Se
 0.427
Verify the model based on TPS65270
model (II)
Re  3.47; Ce  37nF
The overall small signal modeling for TPS65270 with 3.3V/0.65A output.
C16 100p
L 6.8u
ISNS 1
Re 3.47
Ce 37n
Esr 300m
C1 10u
Rload 5.1
R4a 31.6k
C11 82p
C3 2.2n R1 30k
Co 470u
AcsRs 100m
R4b 10k
2
+
Rgm 7.69k
Vos
EA
+
+
6
7
3
4
V-
V(+)
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+
Vo
V
Verify the model based on TPS65270
model (III) Well Matched
80.00
60.00
AC simulation
results
Gain (dB)
40.00
20.00
0.00
-20.00
revealed a 58degree
phase margin and
80kHz
crossover frequency.
-40.00
-60.00
200.00
Phase [deg]
100.00
0.00
-100.00
-200.00
10
100
1k
10k
100k
1M
Frequency (Hz)
Lab test results:
The loop parameters can
be got as 86kHz
crossover
frequency and 60degree
phase margin.
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
Design example based on TPS65270:
Topic: Vin=12V; Vout=3.3V@2A; fs=600kHz; L=4.7uH
Vin(V)
Vout(V)
L(uH)
f(kHz)
Ri
Se(V/us)
12
3.3
4.7
600
0.1
0.18
Sn(V/us)
Sf(V/us)
Re
Ce(nF)
0.19
0.07
3.03
59.88
-0.30
The small signal modeling from control to output:
L 4.7u
ISNS 1
R4a 40.2k C11 82p
Re 3.03
Ce 59.88n
Co 22u
+
AcsRs 100m
Vc
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Rload 1.65
R4b 12.8k
+
Vo
V

Design example based on TPS65270:
--Type II compensation design
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Design Example based on TPS65270:
• Without compensation, the loop simulation is below:
Gco (50kHz)  6.87dB; Phaseco (50kHz)  77
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Design example based on TPS65270
1. Assuming a crossover frequency “fc”=50kHz.
A  Gco ( j 2f c )  10

6.9
20
K  tg (
 0.45
70  (78)  90
 45)  3.5
2
Let:
K
1
1
And: A  2f R C ; Rgm  130u  7.69k
c gm 16
2. Then: C16=52.9pF; Select C16=56pF
C 3  ( K 2  1)C16  590 pF
3. select C3=560pF;
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R1 
K
 18.8k
2C3 f c
Design example based on TPS65270:
Target compensation results:
Phase margin=70degree; Crossover frequency=50kHz
Employing type II compensation:
C16=56pF; C3=560pF; R1=18.8k
C16 56p
L 4.7u
ISNS 1
R4a 40.2k C11 82p
Re 3.03
C3 560p R1 18.8k
AcsRs 100m
3
Vos
4
EA
+
+
6
7
+
2
Co 22u
Rload 1.65
R4b 12.8k
+
Vo
VRgm 7.69k
Ce 59.88n
V(+)
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V
Design example based on TPS65270:
• Simulation results:
The final crossover frequency is 49kHz and phase margin is 69degree.
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Conclusion
• The simplified model is easy to use with highly
matched with practical results.
• TPS65270 has 0.18V/us slope compensation, so
that the inductor selection criteria is:
“L>(Vout/3.6) uH”
• Type II compensation network works well for the
compensation design:
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• Thanks very much for you time!
• Q&A?
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