II B.Tech I Semester
Academic Dairy
For
COMPUTER ORGANIZATION
Faculty: Mrs. B. Ujwala
1
DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING
II/IV CSE –I SEM (2013-2014)
COMPUTER ORGANIZATION
UNIT-I
Syllabus:
Digital Logical Circuits & Components: Decoders, Multiplexers, Registers, Memory Unit.
Data
Representation:
Data
types,
Compliments,
Fixed
point
and
floating
point
representation, Error Detection codes.
Computer
Arithmetic:
addition
and
subtraction,
multiplication
algorithms,
division
algorithms, floating point arithmetic operations.
Objectives:
1. To understand the basic components and digital logic circuits of computer.
2. To learn the data types, compliments, data representation and error detection codes in
computer.
3. To learn the addition, subtraction, multiplication and division algorithms of fixed and
floating point numbers.
Lecture plan:
S.No
Topic
Date
No. of
lectures
1
Decoders, Multiplexers
1
2
Registers, Memory Unit.
1
3
Data types, Compliments
1
4
Fixed point and floating point representation
1
5
Error Detection codes
1
6
Addition and subtraction
1
7
Multiplication algorithms
2
8
Division algorithms
2
9
Floating point arithmetic operations
2
Total
12
Assignment questions:
1. Convert the following numbers to the bases indicated.
i. (7562)10 to octal
ii. (175)8 to binary
iii. (1938)10 to hexadecimal.
2
Remarks
iv. (10101011)2 to decimal, octal and hexadecimal.
2. Explain error detection codes.
3. Draw flow chart for booth’s multiplication algorithm and multiply (-15) and (-13) using
Booth’s algorithm.
4. Draw the flow chart for floating point numbers multiplication and explain with an
example.
5. Explain the algorithm for addition and subtraction of signed binary numbers.
Case Study:
Construct even parity generator and parity checker circuit for 4 bits of data.
UNIT-II
Syllabus:
Register transfer and Micro operations: Register Transfer language, Register Transfer,
Bus and memory transfers, Arithmetic, logic and shift Micro operations, arithmetical and logic
shift unit.
Basic Computer organization and Design: Instruction codes, computer Registers,
computer Instructions, Timing and control, instruction cycle, memory reference instructions,
input–output and interrupt, complete computer description, design of basic computer, design
of accumulator logic.
Objectives:
1. To Understand Register Transfer Language, Bus and memory transfers.
2. To learn Arithmetic Micro operations, logic micro operations and shift micro
operations.
3. To learn about Arithmetic logic shift unit.
4. To learn about Instruction codes, computer Instructions, and computer registers.
5. To understand the Instruction cycle, Timing and Control, memory reference
instructions, input–output and interrupt.
6. To learn complete computer description, design of basic computer and design of
accumulator logic.
3
Lecture plan:
S.No
Date
Topic
No. of
lectures
1
Register Transfer Language , Bus and
memory transfers
1
2
Register Transfer
1
3
4
5
Arithmetic Micro operations, logic micro
operations
Shift micro operations, Arithmetic logic shift
unit
Instruction codes. Computer Registers ,
Computer instructions.
1
1
1
6
Timing and Control
7
Instruction cycle
8
Memory – Reference Instructions
1
9
Input – Output and Interrupt
1
10
Complete computer description.
1
11
Design of basic computer
1
12
Design of accumulator logic
1
Total
Remarks
11
Assignment questions:
1. Briefly explain about shift micro operations of computer system.
2. Explain Instruction cycle with flowchart and timing control.
3. List out all memory reference instructions.
4. Explain design of basic computer.
Case Study:
Study and analyze the shift operations and prepare a report when each and every shift
operation is useful and explain why?
UNIT –III
Syllabus:
Programming the basic computer: Machine language, assembly language, assembler,
example programs.
Central processing unit: General Register organization, stack organization, instruction
formats, addressing modes, Data transfer and manipulations, program control.
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Objectives:
1. To learn different types of languages and translation of AL to ML.
2. To understand the functionality of Control unit.
3.
To learn about Control memory and Address sequencing.
4. To learn design of Control unit (Hard wired control. Micro programmed control).
5. To understand General register and stack organization.
6. To learn different instruction formats, addressing modes, data transfer, data
manipulation and program control instructions.
Lecture Plan:
S.No
1
Topic
Date
No. of
lectures
1
2
Machine language, assembly language,
assembler
Example programs
3
General Register organization
1
4
Stack organization
1
5
Instruction formats
1
6
Addressing modes
1
7
Data transfer and manipulations
1
8
program control
1
Total
8
Assignment questions:
1. What is an Assembler and explain its working.
2. Explain in how many ways Stack is organized in a Computer.
3. Explain different addressing modes in detail with an example.
4. Explain Data transfer and manipulations instructions.
Case Study:
How the operation X = (A + B) * (C + D) / (E+F) is performed using:
a) Three address instruction b) Two address instruction
c) One address instruction
1
d) zero address instruction
5
Remarks
UNIT-IV
Syllabus:
Micro-programmed control:
Control memory, address sequencing, micro program
example, and design of control unit.
Pipeline and Vector processing:
Parallel processing, pipelining, arithmetic, instruction,
RISC pipeline, vector processing.
Objectives:
1. To understand the functionality of Control unit.
2. To learn about Control memory and Address sequencing.
3. To learn design of Control unit (Hard wired control. Micro programmed control)
4. To understand the concept of Parallel Processing and Pipelining.
5. To learn about Arithmetic Pipeline, Instruction Pipeline and RISC Pipeline.
6. To understand the Vector Processing.
Lecture Plan:
S.No
1
Topic
Date
No. of
Lectures
1
2
MICRO PROGRAMMED CONTROL:
Control memory
Address sequencing
3
micro program example
1
4
Design of control unit
1
5
Hard wired control. Micro programmed
control
1
6
Parallel Processing and pipelining
2
7
Arithmetic Pipeline, Instruction Pipeline
2
8
RISC Pipeline
1
9
Vector Processing
2
Remarks
1
Total
12
Assignment questions:
1. Define pipelining and explain Instruction pipeline.
2. Explain how microprogram sequencer generates control signals with neat diagram.
3. Differentiate between Hard wired control unit and Micro programmed control.
4. Explain vector processing in detail.
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Case Study:
Explain the advantages of pipelined processor over non-pipelined processor.
UNIT-V
Syllabus:
Input-output organization:
Peripheral devices, input-output interfaces, asynchronous
data transfer, modes of transfer, priority interrupts, direct memory access.
Memory organization:
Memory hierarchy, main memory, auxiliary memory, associative
memory, cache memory, virtual memory.
Objectives:
1. To learn about basic peripheral devices and input-output interface.
2. To understand different modes of data transfer, priorities interrupts.
3. To learn how direct memory access takes place in a computer.
1. To understand the memory hierarchy and main memory.
2. To understand the cache memory and associative memory.
3. To learn the Virtual memory concept and Secondary storage.
Lecture Plan:
S.No
Topic
Date
No. of
Lectures
1
1
Peripheral devices
2
Input-output interfaces
1
3
Asynchronous data transfer
1
4
modes of transfer
1
5
priority interrupts
1
6
direct memory access
1
7
1
8
Memory organization: Memory
hierarchy, Main memory
Auxiliary memory
9
Associative memory
1
10
Cache memory
1
11
Virtual memory
1
1
Total
11
7
Remarks
Assignment questions:
1. Explain working of Direct Memory Access Controller.
2. (a) What is a virtual memory technique? Explain different virtual memory techniques
(b) Explain Cache memory Mapping Techniques.
(c) Give the detailed picture of Memory Hierarchy.
3. What is meant by asynchronous data transfer? Explain Strobe control and
Handshaking methods.
4. Explain different modes of transfer.
5. (a) Explain Associative memory.
(b) Explain in how many ways the interrupts are handled by CPU.
Case Study:
Study and analyze different types of memories (RAM, ROM, CACHE, Virtual and Secondary)
and prepare a report on performance considerations (speed, access time).
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