McGILL UNIVERSITY
Department of Electrical and Computer Engineering
ECSE-323
Fall 2008
MIDTERM EXAM
Question
Maximum Points
1
10
2
10
3
15
4
15
5
15
6
10
Total
Points Attained
75 points
Please write down your name:
Please write your student ID: ______ANSWER KEY ___________
Instructions/Please read carefully!
This is a closed book exam. No books or notes are allowed. You may use a
standard calculator.
All work is to be done on the attached sheets and under no circumstance are
booklets or loose sheets to be used. Write your name at the top of every sheet.
Read the question carefully. If something appears ambiguous, write down your
assumption. The points have been assigned according to the formula that 1
point = 1 exam minute, so please pace yourself accordingly.
COURSE: ECSE – 323
MIDTERM EXAM
FALL 2008
2
YOUR NAME: ___________ANSWER KEY____________
________________________________________________________________________
Question 1: Booelan Logic Theory (10 points)
You are presented with a set of requirements under which an insurance policy will be
issued. The applicant must be:
1.
2.
3.
4.
5.
A married female 25 years old or over, or
A female under 25, or
A married male under 25 who has not been involved in a car accident, or
A married male who has been involved in a car accident, or
A married male 25 years old or over who has not been involved in a car
accident.
The variables w, x, y and z assume the truth value 1 in the following cases:
w=1
x =1
y =1
z =1
if applicant has been involved in a car accident
if applicant is married
if applicant is male
if applicant is under 25.
(4 points)
a)
(3 points)
(3 points)
b)
c)
You are asked to find an algebraic expression which assumes the
value 1 whenever the policy should be issued.
Simplify algebraically the above expression, and
Suggest a simpler set of requirements.
________________________________________________________________________
ANSWER
Expression: xyz +y z +w x y z + w x y +w x yz
Simplified expression:
x +y z
Simpler set of requirements: MARRIED OR A FEMALE UNDER 25.
COURSE: ECSE – 323
MIDTERM EXAM
FALL 2008
3
YOUR NAME: ___________ANSWER KEY____________
________________________________________________________________________
Question 2: CMOS Circuit Technology (10 points)
Draw a fully complementary CMOS circuit equivalent to the following logic circuit
C
D
B
A
F
B
C
(5 points)
a)
Give the algebraic expressions of F and F
(5 points)
b)
Draw clearly the pull-up-network and the pull-down-network.
ONLY TRUE VARIABLES ARE AVAILABLE AS INPUTS. USE THE FEWEST
NUMBER OF TRASISTORS.
_______________________________________________________________________
ANSWER
a)
F(A,B,C,D) = BC + A(CD +B) ,
F(A,B,C,D) = (B +C) (A + B(C +D))
b)
B
C
PUN
A
D
C
B
!F
A
PDN
B
B
C
D
C
F
COURSE: ECSE – 323
MIDTERM EXAM
FALL 2008
4
YOUR NAME: ___________ANSWER KEY____________
________________________________________________________________________
Question 3: Introduction to VHDL (15 points)
(7 points)
a)
Using a selected assignment statement write a complete VHDL
description of a 3:1 multiplexer circuit. Select inputs of “00”, “01”, “10” should select
one of the three inputs and pass it to the output. Set the output to “high impedance” (Z)
when the select inputs are “11”.
(8 points)
b)
Using the circuit described in part (a) as a component, write a
complete VHDL description of a 9:1 multiplexer circuit.
_______________________________________________________________________
a)
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
ENTITY q3a IS
PORT(x1,x2,x3 : IN STD_LOGIC,
sel
: IN STD_LOGIC_VECTOR(1 downto 0);
f
: OUT STD_LOGIC);
END q3a;
ARCHITECTURE a OF q3a IS
BEGIN
WITH sel SELECT
f <= x1 WHEN “00”,
x2 WHEN “01”,
x3 WHEN “10”,
‘Z’ WHEN “11”, -- these two statements
‘Z’ WHEN OTHERS; -- can be combined
END a;
COURSE: ECSE – 323
MIDTERM EXAM
FALL 2008
5
YOUR NAME: ___________ANSWER KEY____________
________________________________________________________________________
Question 3: Introduction to VHDL (continued…)
b)
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
entity Q3b is
port(sel : in std_logic_vector(3 downto 0);
x : in std_logic_vector(8 downto 0);
f
: out std_logic;
end Q3b;
architecture A3b of Q3b is
component q3a
PORT(in1,in2,in3 : IN STD_LOGIC,
sel
: IN STD_LOGIC_VECTOR(1 downto 0);
f
: OUT STD_LOGIC);
end component;
signal I1, I2, I3 : std_logic;
begin
M1 : q3a port map (in1=>x(0), in2=>x(1); in3=>x(2),
sel(0)=>sel(0),sel(1)=>sel(1),f=>I1);
M2 : q3a port map (in1=>x(3), in2=>x(4); in3=>x(5),
sel(0)=>sel(0),sel(1)=>sel(1),f=>I2);
M3 : q3a port map (in1=>x(6), in2=>x(7); in3=>x(8),
sel(0)=>sel(0),sel(1)=>sel(1),f=>I3);
M4 : q3a port map (in1=>I1, in2=>I2; in3=>I3,
sel(0)=>sel(2),sel(1)=>sel(3),f=>f);
end A3b;
COURSE: ECSE – 323
MIDTERM EXAM
FALL 2008
6
YOUR NAME: ___________ANSWER KEY____________
________________________________________________________________________
Question 4: Combinational Circuits Synthesis (15 points)
Design a single-bit Arithmetic/Logic unit having as inputs A, B,CI and as outputs F, CO
and that will perform according to the following table depending on the values of the
mode selection variables X, Y
Mode selection
Operation
Performed
X
Y
0
0
F =B; CO = 0
0
1
A > B
1
0
A plus B plus CI
1
1
A minus B minus CI
Hint: A Full Substructor is obtained by inverting the A input and the S (sum) output of
a Full Adder. Follow a modular design using 4x1 MUX’s, Full-adders and gates as
needed.
Marking: 5 points will be assigned for the two first modes. 5 points will be assigned
for the two other modes. Finally, 5 points will be assigned for the complete correct circuit
________________________________________________________________________
ANSWER
MUX
B
A
0
CO
1
B
2
3
FA
CI
CI
A
A
S
GND
X Y
MUX
B
B
CO
CI
A
A
B
B
F
1
FA
CI
0
S
2
3
CO
X Y
COURSE: ECSE – 323
MIDTERM EXAM
FALL 2008
7
YOUR NAME: ___________ANSWER KEY____________
________________________________________________________________________
Question 5: Implementation Strategies: PLD (15 points)
Using the NOR-NOR PAL structure shown below, implement the function F(A,B,C,D)
described by the following K-map
AB
CD
00
01
11
10
00
1
1
1
1
01
0
1
0
1
11
1
0
1
0
10
0
1
0
0
(8 points)
a)
Decompose the function such that it can be implemented
with the given NOR-NOR PAL structure. Give the algebraic expression of the
decomposed function.
(7 points)
b)
Make the proper connections in the drawing of the given NORNOR PAL structure below to produce the function F .
______________________________________________________________________
ANSWER
a)
By inspection of the map we can write F(A,B,C,D) = CD (A B +AB) + C D(A B
_____
+AB) + A B (C D + CD) = (AB)(CD) + A B(CD)
b)
A
B
!A
!B
C
D
!C
!D
A EX-OR B
C EX-OR D
A B
F
COURSE: ECSE – 323
MIDTERM EXAM
FALL 2008
8
YOUR NAME: ___________ANSWER KEY____________
________________________________________________________________________
Question 6: Sequential Circuits (10 points)
Consider the following latch circuit, where X and C are voltage levels and they do not
change simultaneously.
Q
X
C
(5 points)
a)
Produce the characteristic equation of the circuit and indicate for
which combination of the inputs X and C the circuit output: 1) retains its
previous value, 2) becomes 0 (reset), and 3) becomes 1 (set).
(5 points)
b)
Draw the circuit that transforms the given circuit into a T-type
latch.
________________________________________________________________________
ANSWER
The characteristic equation is
Q+ = X C + (C + X) Q
and the characteristic table is
C
0
0
1
1
X
0
1
0
1
Q+
Q
Q
0
1
For X = 0, 1 and C = 0 the latch output retains its previous value.
For X = 0 and C = 1 the latch output becomes 0 (reset)
For X = 1 and C = 1 the latch output becomes 1 (set)
b)
To transform the given circuit into a T-type latch we equate both characteristic equations,
namely, the one of the given circuit with the one corresponding to the T-type latch, which
is Q+ = T  Q. Thus we solve the equation
X C + (C + X) Q = T  Q
for X = f1 (T, Q) and C = f2 (T, Q).
COURSE: ECSE – 323
MIDTERM EXAM
FALL 2008
9
YOUR NAME: ___________ANSWER KEY____________
________________________________________________________________________
The equality map of the equation is
TQ
CX
00
01
11
10
00


01




11
10


where the symbol  indicates the values of the variables for which the equation holds
( LHS = RHS, 0=0 or 1=1)
From this map, we can derive the maps for X and C. There are 9 possible solutions.
This number of solutions is equal to the number of possible choices of dots (), choosing
one per column. One of the 9 solutions is the following
T
Q
0
1
0
*
*
T
1
1
0
Q
0
1
X = Q
0
0
0
1
1
1
C=T
We could have found this solution by inspecting the truth table resulting from equating
the behaviour of both latches, thus
Q
0
0
0
0
1
1
1
1
C
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
Q+
0
0
0
1
1
1
0
1
T
0
0
0
1
0
0
1
0
The circuit corresponding to the chosen solution is
X
T
Q
C
Q