Computer Architecture Discussion
Lecture # 2
MIPS Programming
CSE331 W02.1
Irwin Fall 2001 PSU
MIPS Arithmetic Instruction

MIPS assembly language arithmetic statement
add
$t0, $s1, $s2
sub
$t0, $s1, $s2

Each arithmetic instruction performs only one
operation

Each arithmetic instruction specifies exactly three
operands
destination  source1
op
source2

Those operands are contained in the datapath’s
register file ($t0, $s1,$s2)

Operand order is fixed (destination first)
CSE331 W02.3
Irwin Fall 2001 PSU
Compiling More Complex Statements

Assuming variable b is stored in register $s1, c is
stored in $s2, and d is stored in $s3 and the result is
to be left in $s0, what is the assembler equivalent to
the C statement
h = (b - c) + d
CSE331 W02.5
sub
$t0, $s1, $s2
add
$s0, $t0, $s3
Irwin Fall 2001 PSU
Accessing Memory

MIPS has two basic data transfer instructions for
accessing memory
28
lw
$t0, 4($s3) #load word from memory
sw

The data transfer instruction must specify



$t0, 8($s3) #store word to memory
32
(assume $s3 holds 2410)
where in memory to read from (load) or write to (store) – memory
address
where in the register file to write to (load) or read from (store) –
register destination (source)
The memory address is formed by summing the constant
portion of the instruction and the contents of the second
register
CSE331 W02.7
Irwin Fall 2001 PSU
Compiling with Loads and Stores

Assuming variable b is stored in $s2 and that the base
address of array A is in $s3, what is the MIPS
assembly code for the C statement
A[8] = A[2] - b
...
...
A[3]
$s3+12
A[2]
$s3+8
A[1]
$s3+4
A[0]
$s3
CSE331 W02.10
lw
$t0, 8($s3)
sub
$t0, $t0, $s2
sw
$t0, 32($s3)
Irwin Fall 2001 PSU
MIPS Instructions, so far
Category
Instr
Op Code
Example
Meaning
Arithmetic
add
0 and 32 add $s1, $s2, $s3
$s1 = $s2 + $s3
(R format)
subtract
0 and 34 sub $s1, $s2, $s3
$s1 = $s2 - $s3
Data
load word
35
lw
$s1, 100($s2)
$s1 = Memory($s2+100)
transfer
store word
43
sw $s1, 100($s2)
Memory($s2+100) = $s1
(I format)
CSE331 W02.11
Irwin Fall 2001 PSU
Review: Naming Conventions for Registers
0
$zero constant 0 (Hdware)
16 $s0 callee saves
1
$at reserved for assembler
...
2
$v0 expression evaluation &
23 $s7
3
$v1 function results
24 $t8 temporary (cont’d)
4
$a0 arguments
25 $t9
5
$a1
26 $k0 reserved for OS kernel
6
$a2
27 $k1
7
$a3
28 $gp pointer to global area
8
$t0 temporary: caller saves
29 $sp stack pointer
(callee can clobber)
30 $fp frame pointer
...
15 $t7
CSE331 W02.12
(caller can clobber)
31 $ra return address (Hdware)
Irwin Fall 2001 PSU
[R] format and [I] format
CSE331 W02.13
Irwin Fall 2001 PSU
Machine Language - Arithmetic Instruction

Instructions, like registers and words of data, are also
32 bits long



Example:
registers have numbers
add $t0, $s1, $s2
$t0=$8, $s1=$17, $s2=$18
Instruction Format:
op
rs
000000 10001
CSE331 W02.15
rt
rd
10010
01000
shamt
00000
funct
100000
Irwin Fall 2001 PSU
MIPS Instruction Fields
op
rs
rt
rd
shamt
6 bits
5 bits
5 bits
5 bits
5 bits
funct
6 bits
= 32 bits

op
opcode indicating operation to be performed

rs
address of the first register source operand

rt
address of the second register source operand

rd
the register destination address

shamt shift amount (for shift instructions)

funct function code that selects the specific variant of the
operation specified in the opcode field
CSE331 W02.17
Irwin Fall 2001 PSU
Machine Language - Load Instruction

Consider the load-word and store-word instructions,



Introduce a new type of instruction format



What would the regularity principle have us do?
New principle: Good design demands a compromise
I-type for data transfer instructions
previous format was R-type for register
Example: lw $t0, 24($s2)
op
CSE331 W02.19
rs
35
18
100011
10010
rt
16 bit number
8
01000
24
0000000000011000
Irwin Fall 2001 PSU
Machine Language - Store Instruction

Example: sw $t0, 24($s2)
op

rs
43
18
101011
10010
rt
16 bit number
8
01000
24
0000000000011000
A 16-bit address means access is limited to memory
locations within a region of 213 or 8,192 words (215 or
32,768 bytes) of the address in the base register $s2
CSE331 W02.21
Irwin Fall 2001 PSU
Assembling Code

Remember the assembler code we compiled last lecture
for the C statement
A[8] = A[2] - b
lw
sub
sw
$t0, 8($s3)
$t0, $t0, $s2
$t0, 32($s3)
#load A[2] into $t0
#subtract b from A[2]
#store result in A[8]
Assemble the MIPS code for these three instructions
lw
35
19
8
sub
0
8
18
sw
43
19
8
CSE331 W02.23
8
8
0
34
32
Irwin Fall 2001 PSU
Beyond Numbers

Most computers use 8-bit bytes to represent characters
with the American Std Code for Info Interchange (ASCII)
ASCII
Char
ASCII
Char
ASCII
Char
ASCII
Char
ASCII
Char
ASCII
Char
0
Null
32
space
48
0
64
@
96
`
112
p
1
33
!
49
1
65
A
97
a
113
q
2
34
“
50
2
66
B
98
b
114
r
3
35
#
51
3
67
C
99
c
115
s
36
$
52
4
68
D
100
d
116
t
37
%
53
5
69
E
101
e
117
u
38
&
54
6
70
F
102
f
118
v
39
‘
55
7
71
G
103
g
119
w
4
EOT
5
6
ACK
7
8
bksp
40
(
56
8
72
H
104
h
120
x
9
tab
41
)
57
9
73
I
105
i
121
y
10
LF
42
*
58
:
74
J
106
j
122
z
43
+
59
;
75
K
107
k
123
{
44
,
60
<
76
L
108
l
124
|
47
/
63
?
79
O
111
o
127
DEL
11
12
FF
15
CSE331 W02.24
Irwin Fall 2001 PSU
Book Exercises

Book exercises solved:
2,3,4,6,13,20

and some exercises for R & I format
CSE331 W02.25
Irwin Fall 2001 PSU