박
유
진
 2.4-GHz IEEE 802.15.4 Compliant RF Transceiver
 Excellent Receiver Sensitivity ( -97dBm) and
Robustness to Interference
 6-mm × 6-mm QFN40 Package
 Low Power Operation Mode
 Active-Mode RX (CPU Idle): 24 mA
 Active Mode TX at 1 dBm (CPU Idle): 29 mA
 Power Mode 1 (4 ms Wake-Up): 0.2 mA
 Power Mode 2 (Sleep Timer Running): 1 mA
 Power Mode 3 (External Interrupts): 0.4 mA
 High-Performance and Low-Power 8051
Microcontroller Core With Code Prefetch
 32-, 64-, 128-, or 256-KB In-System-Programmable
Flash
 8-KB RAM With Retention in All Power Modes
 Hardware Debug Support
 Powerful Five-Channel DMA
 IEEE 802.15.4 MAC Timer, General-Purpose Timers
(One 16-Bit, Two 8-Bit)
 32-kHz Sleep Timer With Capture
 12-Bit ADC With Eight Channels
 CSMA/CA Hardware Support
 Accurate Digital RSSI/LQI Support
 Two Powerful USARTs With Support for Several Serial
Protocols
 Battery Monitor and Temperature Sensor
 AES Security Coprocessor
 21 General-Purpose I/O Pins (19× 4 mA, 2× 20 mA)
 Watchdog Timer
Metric
CC2430
CC2530
MCU
8051 Compatible
8051 Compatible
Flash
Up to 128K
Up to 256K
RAM
8K(<4K During PM2/3)
8K(in All PMs)
Clock Loss Detection
No
Yes
Timer 1 Channels
3
5
MAC Timer Size
16-bit, 20-bit overflow
16-bit, 24-bit overflow
Core Freq
32 MHz
32MHz
Package
7 x 7 48pin
6 x 6 40pin
Operation Temperature
-40 to +85
-40 to +125
Metric
CC2430
CC2530
Max TX Power(dBm)
0
+4.5
Sensitivity(dBm)
-92
-97
Link Budget(dB)
92
101.5
EVM at max output power 11%
2%
Adjacent -5MHz
30
49
Adjacent +5MHz
41
49
Adjacent -10MHz
53
57
Adjacent +10MHz
53
57
Metric
CC2430
CC2530
Operation Voltage
2.0 – 3.6V
2.0 – 3.6V
Rx Current
27 mA
24 mA
Tx Current(0 dBm)
27 mA
29 mA
Tx Current(+4.5 dBm)
NA
34 mA
CPU active current(32 MHz)
10.5 mA
6.5 mA
PM1 current
190 uA
200 uA
PM2 current
0.5 uA
1 uA
PM3 current
0.3 uA
0.4 uA
PM1 -> Active
4 uA
4 uA
PM2/3 -> Active
0.1 mA
0.1 mA
Xtal startup time
0.5 ms
0.3 ms
 8KB SRAM
 32-, 64-, 128-, or 256-KB In-System-Programmable
Flash
 Flash Controler
 32-bit word programmable
 Page erase(2KB)
 Lock bits for write protection and code security
 Flash-page erase timing 20 ms
 Flash-chip erase timing 20 ms
 Flash-write timing (4 bytes) 20 ms
 DMA Controler
 Five independent DMA channels
 Three configurable levels of DMA channel priority
 32 configurable transfer trigger events
 Independent control of source and destination address
 Single, block and repeated transfer modes
 Supports length field in transfer data, setting variable transfer
length
 Can operate in either word-size or byte-size mode
 21 digital input/output pins
 General-purpose I/O or peripheral I/O Select
 Pullup or pulldown capability on inputs
 External interrupt capability(General-Purpose I/O
Interrupts)
 Peripheral I/O Pin Mapping
 Can select Peripheral I/O Pin 2 Alternative Locations
 Peripheral I/O Pin Mapping(con’t)
 Power Down Mux
 output the 32 kHz clock(Port 0)
 output the digital regulator status(Port 1)
 If set PDM, ignore all other Peripherals
 RF Core
 provides an interface between the MCU and the radio
 Modulator/Demodulator
 Transmit/Receive data in compliance with the IEEE 802.15.4
standard
 Use FSM(Finite State Machine)
 Frequency Synthesizer(FS)
 CSMA/CA Coprocessor
 Radio RAM(TXFIFO/RXFIFO)
 MAC Timer(Timer 2)
 DSSS(Direct Sequence spread spectrum)
 2MHz Chip Rate(250K Data Rate)
 4bit Symbol Code
 32bit Chip Code
 OQPSK
 CSMA/CA
 Use Command Strobe Processor