( Charge to Time Converter(QTC)LSI CLC101EF

Charge to Time Converter(QTC)LSI
(
CLC101EF
•Wide dynamic range: 0~2500pC full scale range •Self‐trigger: built‐in discriminator
•Number of Input Channels: 3
•Processing Speed: ~500nsec/cycle
•Number of Gains: 3 (Ratio 1:7:49)
•Charge Dynamic Range: 0.2~1250p.e.
•Charge Resolution: ~ 0.075p.e. (<25p.e.)
•(Non‐) Linearity (Q): <±1%
(
)
y (Q)
•Timing Resolution: 0.3ns (1p.e. = ‐3mV), 0.2ns (>5p.e.) •Power dissipation: 260mW
•0.35um CMOS process
•100pin CQFP package
•This product is a product in Japan designed for.
•Because besides there is the case that examination by all things in nature law is necessary domestically about export to a third nation please refer by all means to our company.
N I K I G L A S S
C O . , LT D
9‐7 Mita‐3chome Minato‐ku Tokyo 108‐0073 JAPAN
Introduction
IWTASU CLC101EF is
i a Multi‐channel
M lti h
l charge
h
t time
to
ti
converter
t LSI (QTC LSI).
LSI) CLC101EF will
ill be
b applied
li d for
f high
hi h
dynamic range photo‐multiplier tubes (PMT). When incident light is injected, PMT generates negative current
pulse. This pulse traveled long cable and terminated at matching impedance network. Input signal ranges from a
few mV up to 3V in 50ohm termination. Due to considerable distance between PMT and QTC LSI, rise and fall time
is relatively high, >10nS. CLC101EF receives the voltage signal from impedance network. The input signal will be
amplified and integrated by charging capacitor. After predetermined charging period (Charge Gate Time),
discharging will be performed with high precision current source. The LVDS output will drive the precise period for
the total summation of charging and discharging time. The discharging time should be proportional to input signal.
CLC101EF operates with single power supply of VDD=+3.3V to suppress power consumption.
I t
Internal bias circuit is supplied by Band gap reference of 1.2V output.
l bi
i it i
li d b B d
f
f 1 2V t t
This Band Gap Reference supplies built‐in 6bit and 8bit control DAC.
CLC101EF is targeted to meet stringent specifications. First, high dynamic range is required. As mentioned above,
nearly 4 decades of signal range needs to be achieved. To accommodate such high dynamic range, we designed
three low noise voltage amplifiers in parallel. Second, high linearity 1% is required to achieve for charge‐to‐time
conversion. Third, when QTC is combined with Time to Digital Converter of 500ps resolution, charge measurement
is possible with 10bit resolution. Ignore
PMT
signal
PMT Signal
Qtrg
Pedestal
Ramp1
ramp
I3
ramp
I3
Qtrg
Comp1
Charge gate
Ramp2
ramp
I3
ramp
I3
Discharge gate
Comp3
HIT
Comp2
Charge
Gate
QTC signal
Discharge
Gate
Measure
Gate
Ramp
Ioffset+I4
Ramp
I2
QTC OUT
Reset
DVeto
Reset
Timing chart of QTC LSI
Timing chart of Pedestal operation
PMT Signal
Qtrg
QTC Out
Charge gate
Charge Gate
Discharge gate
Ramp
Ioffset+I4
Comp2
Ramp
I2
Comp2
Comp2
QTC signal
QTC OUT
Reset
Timing chart of charge integration (Normal Mode)
Example of QTC signal and QTCOUT
CLC101EF
Typical performance characteristics
Charge responses of the three ranges
Timing resolution of the QTC
Charge linearity of 3 gain stage
Charge Resolution of the 3 gain stages
Efficiency curve of the discriminator
CLC101EF
Example of Qtc_Vsig signal
50ns/div
Example of PMTSUM signal
50ns/div
Package dimensions
“WWYY” means week and year. [0708 means the seventh week in 2008] “XXXX” is serial number, which starts from 0001. [A0000 means #10000. B0000 means #11000]
Chamfered corner corresponds to pin 1 corner in the package.
NIKIGLASS CO.,LTD
9‐7 Mita‐3chome Minato‐ku Tokyo 108‐0073 JAPAN
Phone +81‐3456‐4700 FAX +81‐3456‐3423
URL : http://www.nikiglass.co.jp
p
g
jp
E‐mail to [email protected]
Radiation Measurement Instruments Group