Question 1 - UniMAP Portal

TUTORIAL 2 : REGISTER TRANSFER LANGUAGE
Question 1
Gives 3 types of microoperation most often encounted in digital system. Briefly describe each
microoperation.
a)
b)
c)
d)
Transfer microoperations, which transfer binary data from one register to another.
Arithmetic microoperations, which perform arithmetic on data in registers.
Logic microoperations, which perform bit manipulation on data in registers.
Shift microoperations, which shift data in registers.
Question 2
A 16 bit Program Counter (PC) is given with the content of 00001111 00001010.
Below is a part of Memory with its content.
ADDRESS
9
10
11
12
13
14
15
16
What is the content of :
i)
M [ PC(H) ]
ii)
M [ PC(L) ]
=
=
CONTENT
00110010
01001011
11010010
11001010
00001101
11100001
11011010
10011100
11011010
01001011
Question 3
Write the Register Transfer Language (RTL) for the following instructions.
“If Z true, then stores R3 into R5, else if Y true, then stores R3 into R4, else store R3 into
R6.”
Z : R5  R3 , Z'Y : R4  R3 , Z'Y' : R6  R3
Question 4
Let
R1 = 01110011 11010101 and R2 = 11110000 11110000
Write down the content of R0 after the operation:
i)
R0  R1  R2 =
01110000 11010000
ii)
iii)
iv)
R0  R1  R2 =
R0  R1  R2 =
R0  sl R1
=
11110011 11110101
10000011 00100101
11100111 10101010
Question 5
Draw the hardware implementation for the given RTL.
a) K1:R0 R1, K1 K2:R0 R2
b) R0 R1+ R2 1
c) K1:R0 R1+ R2, KI K2:R0 R1+ R2 1
d) (K1 + K2) : R1 R2 + R3 + 1, K3 : R1  R2  R3
Question 6
Perform the bitwise logic AND, OR and XOR of the two 8-bit operands 01100110 and
00111100.
Question 7
Given the 16-bit operand 11110000 01010101, what operation must be performed and
what operand must be used to
a) Clear all even bit positions to 0? (Assume bit positions are 15 through 0 from left
to right).
b) Set the leftmost 4 bits to 1?
c) Complement the center 8 bits?
Question 8
The design of a combinational circuit starts from the specification of the problem and ends in a
logic diagram or netlist. State the design procedure or steps involved.
Question 9
A logic diagram of one typical stage for the Bidirectional Shift Register is given as below:
d) Draw a function table for the given Bidirectional Shift Register using mode selection
inputs S1 and S0 .
e) Write four equivalent Register Transfer Language (RTL) for the register function table
given above.
Question 10
Modify the register of figure shown below so that it will operate according to the
following function table using mode selection inputs S1 and S0 .
S1
S0
Register operation
0
0
1
1
0
1
0
1
No change
Load parallel data
Clear register to 0
Shift down
Answer
Question 11
Give an explanation of serial mode in digital system. With the help of suitable diagram, describe
how serial transfer between two 4-bit registers can be done by utilizing shift registers. (Hint :
Use flip-flop to sketch the diagram)
Answer
CLK
Question 12
Serial addition is one the example of serial micro-operations. It might be slower but it does
require only small numbers of hardware.
a) By using a one single-bit Full Adder (FA), two four-bit shift registers (Register X and
Register Y), one D flip-flop and few gates, draw a complete logic diagram of a serial
adder. Also include other control signals such as Reset, Shift and Clock. Note that the
result of the addition needs to be store in Register X.
Answer
Question 13
The serial adder in Figure 1.2 uses TWO (2) 4-bit registers. Register M holds 1010 and Register
N holds 0110. The carry flip-flop is initially reset to 0. Find the values in Register M, Register
N, the carry flip-flop and sum of the Full Adder for each of the FOUR (4) shifts (T0, T1, T2, T3
and T4).
Figure 1.2
Answer
M3
T0
T1
T2
T3
T4
1
0
0
0
0
M2
0
1
0
0
0
M1
1
0
1
0
0
M0
0
1
0
1
0
N3
0
0
0
0
0
N2
1
0
0
0
0
N1
1
1
0
0
0
N0
0
1
1
0
0
SUM
D
(Full (carry
Adder) out)
0
0
0
0
0
1
0
1
0
1
Q0
(carry
in)
0
0
0
1
1
Question 14
Your first task as a trainee engineer is to design a 60 second digital timer. The time will be
displayed on seven segment display. In order to help you in the design process, your senior
engineer has listed the following procedures. Assume the clock input is 1 Hz.
1) Design a synchronous modulo-6 counter using the above symbol.
Answer
2) Design a synchronous BCD counter using the above symbol.
Answer
3) Draw the block diagram for the digital timer.
Hint: use the counters in (i) and (ii) with other suitable circuits.
Answer