The control unit that is specified in the FSM and ASM charts by describing the
control outputs to be given at each state can be implemented using a PLA or
ROM device with the truth table .
Output and next-state truth table for the multi-cycle control unit
Simplest implementation of a controller unit using a ROM or PLA
The ROM-implementation of the truth table required 1024 ×21 bits of memory. We will
focus on the techniques of reducing the memory size since the access time of the
devices increase proportional to the number of the address lines.
Sequencer
We do not have the space here to show all 1024 entries in the truth table
9
9
The controller outputs in each row are independent to the instruction opcodes.
Depends only on the state code in execution.
A technique to reduce the number of memory address lines is
- Compress the next-state information to a code as far as possible,
- Decode it outside of the ROM.
•
The truth table contains only four possible cases that specifies the next state.
1. If a state is the last state of an instruction then the next state is t0.
2. The next-state after t1 depends on the instruction opcode. For this case
the next-state can be read using the first dispatch table, which requires a
ROM with 6 address lines for implementation.
3. The next-state after t2 depends only on the third bit of opcode (opc3).
Here we need another small table called dispatch-2
4. Other states those are neither the last state of execution nor dispatch
states continue to execution with the next-address in the ROM. The nextaddress can be obtained by incrementing the address (state-code) of the
present-state.
• So, the next state can be implemented with four possible cases by 2 bit
sequence code as follows:
00Æ to jump t0 (to the instruction fetch);
01Æ dispatch-1 at state t1;
10Æ dispatch-2 at state t2 ;
11Æ next in sequence to increment the address by one.
• Thus for each case the next-state is calculated individually, and it is selected by
a 4 input multiplexer using the sequence-code.
• Therefore, a faster ROM can be implemented with only 6 address lines for both
dispatch tables.
Sequencer circuit for the control unit
Truth table of output and sequence-code for the control with sequencer
Complete diagram of the control unit with a sequencer