Constrained ‘Modern’
Floorplanning
Yan Feng
Dinesh P. Mehta
Colorado School of Mines
Hannah Yang
Intel
1
Motivation/Assumption

Fixed die formulation with zero whitespace .
(A. B. Kahng, ISPD 2000)


Modules shapes need not be restricted to
rectangles, L-shapes, etc. (A. B. Kahng, ISPD 2000)
Approximate locations and sizes for modules
are already known from quadratic placement,
force-directed placement, or human design.
2
Proposed Design Flow
Input
Make suggestions
to make input
feasible
No
Bound-Feasible
Yes
Min Cost Max Flow
Based Floorplanner
Postprocessing Step
No
Connected?
Yes
3
The Constrained Modern Floorplanning
Problem(CMFP)
Module
Center
W
H
Required Area
A
(30,30)
60
60
2500
B
(75,50)
50
100
4000
C
(50,75)
100
50
3500
(0,0)
(0,0)
A
A
B
B
C
C
(100,100)
•The CMFP problem is NP-hard.
(100,100)
4
Feasibility Analysis
A
Area(BC) = 8000
B
Required(BC) = 8500
C
Module
Center
W
H
Required Area
A
(30,30)
60
60
2500
B
(75,50)
50
100
4000
C
(50,75)
100
50
4500
5
Feasibility Analysis
(0,0)
A
D
C
B
E
Center
Area
W
H
A
(50,50)
8000
100 100
B
(135,55)
12000 130 110
C
(235,45)
10000 130 90
D
(75,145)
12000 150 110
E
(220,125)
18000 160 150
(300,200)
6
Region Identification
1
A
2
3
B
4
10
6
D
7
9
13
14
11
5
C
12
15 E
7
Flow-based Feasibility Analysis
If the maximum network flow of graph is equal to the
total required area of modules then the input is feasible.
8
Experiment result (ami 33)
9
Floorplanning

The result of Max Flow algorithm does not guarantee
connectivity.
B
A
AB
A
B



Min Cost Max Flow Problem: each edge also has a cost
a(u,v). So if f(u,v) units flow over edge (u,v), we incur a
cost of a(u,v)f(u,v).
Computes a maximum flow as before, but finds one of
min cost.
Post Processing Step
 greedy algorithm
10
Cost Assignment Schemes

The cost is assigned based on
BFS on each region of module.
1
2

Compromise BFS: involves adding
vertices & edges to the flow graph.
Details in paper.

Improved BFS: combination of
BFS & CBFS.
1
2
0
1
1
2
11
Comparison of Cost Schemes



The initial input (center position) is obtained from previous
SA result (ami33 & ami49).
Size of constraining rectangle ranges from 1.96 to 3.24
times of modules’ required area.
Using C++ & LEDA and the running time is about 5 secs.
Comparision
9
8
7
6
5
4
3
2
1
0
BFS
average number of disconnected regions
IBFS
CBFS
max number of modules that share one region
12
Sample output: ami49
13
Future Work

A more systematic post processing step to
obtain a practical result.
 How to convert a infeasible input into a
feasible one.
14