Computer Engineering Department
Computer Performance
What is Performance?
Performance can be judged from several
perspectives and with several metrics!
Purchasing perspective - given a collection of
machines, which has the
 best performance?
 lowest cost?
 best performance/cost ratio?
What is Performance?
 Design perspective - faced with design
options, which has the
 best performance improvement?
 least cost?
 best performance improvement/cost of
improvement?
 Our goal is to understand cost & performance
implications of computer architectural choices
Two notions of Performance
Which has higher performance –
a Boeing 747 or a Airbus 380?
Plane
DC to Paris
Speed
Passengers
Throughput
(p x mph)
Boeing 747
6.5 hours
610 mph
470
286,700
Airbus 380
7.08 hours
560 mph
555
310,800
 Time of A380 vs. Boeing 747?
A380 is 560 mph / 610 mph = .91 times slower
 Throughput of A380 vs. Boeing 747 ?
A380 is 310,800 pmph / 286,700 pmph = 1.08 “times faster”
 A380 is 8% faster in terms of throughput
 Boeing is 9%” faster in terms of flying time
Definitions
 Server Performance is units of things-per-second (throughput)
 bigger number is better
 If we say “X is n times faster than Y it means
Performance(X)/Performance(Y) = n
 Embedded systems: hard real-time constraint and soft real time
constraint
 Desktop systems we focus on the execution time for a single job
 We are primarily concerned with response time
Execution time (X) = ______1_________
Performance (X)
- smaller number is better
Comparing Performance
 Relative performance compares one computer vs. another.
 Performance A = Execution time B = n
Performance B Execution time A
 If we look at response time to execute an application and
Computer A finishes faster we can say
 “Computer A is 3 times faster than Computer B” which means
Execution time B = 3 or Performance A = 3
Execution time A
Performance B
 Or Performance A = 3 (Performance B)
 However, one application does not run exclusevly on the CPU…
Average Cycles Per Instruction
 Programs have different kinds of instructions.
 Some (like those involving memory access lw, sw)
take more cycles to execute.
 Others, like add are faster, and take less cycles to
execute.
 We look at the Instruction Frequency
Fi= Number of instruction of type i
Program Instruction Count
Note – Fi is program dependent! (will influence
MIPS)
n
Then CPI = Σ CPI i x F i
i=1
CPU Performance
CPU time
= Seconds
Program
= Instructions x Cycles
Program
instr. count CPI
Program
Compiler
Instr. Set
Arch.
Organization
Technology
x Seconds
Instruction
clock rate
Cycle
CPU Performance
CPU time
= Seconds
Program
Program
= Instructions x Cycles
Program
instr. count CPI
X
X
Compiler
X
X
Instr. Set
Arch.
Organization
X
X
Technology
X
x Seconds
Instruction
clock rate
X
X
Cycle
Million Instructions Per Second (MIPS)
 Another way to measure performance
 It is defining speed of execution – faster machines
have higher MIPS
 We define it as
MIPS= Instruction Count x 10-6
Execution time (sec)
Example Two 5 GHz computers with the same
architecture use different compilers. They have
Instruction Class
A
B
C
CPIi
2
1
4
Million Instructions Per Second (MIPS)
The compilers affect the Instruction Count for each class
Code from
Instruction Count Ci for each Class (109)
Compiler 1
Compiler 2
A
5
10
B
1
1
C
2
2
The # CPU cycles= Σ CPI i x C i (how many in instruction of class i
are in the program)
So # CPU cycles for Machine 1 = (5x2+1x1+2x4) 109 = 19 x109
and # CPU cycles for Machine 2 = (10x2+1x1+2x4) 109 = 29 x 109
The Execution time for Machine 1 = #CPU cycles/clock frequency
= (19 x 109 )/5 x109 = 3.8 sec
The Execution time for Machine 2 = (29 x 109 )/5x109 = 5.8 sec
Million Instructions Per Second (MIPS)
So Machine 1 has better performance (it takes less time to
execute the program).
MIPS as measure of performance= Instruction Count x10-6
Execution time
MIPS for Machine “1” = (5+1+2) 109 = 2,100 MIPS
3.8 x106
MIPS for Machine “2 “= (10+1+2) 109 = 2,241 MIPS
5.8 x106
So Machine 2 has higher MIPS! – MIPS depends on the Instruction
Count (which depends on the compiler) – there will be different MIPS
on a single machine – less used these days.
The End