EGR 2131 Unit 3
Gate-Level Minimization
 Read
Mano & Ciletti, Chapter
3.
 Homework #3 and Lab #3 due
next week.
 Quiz next week.
Review: Minimization Techniques


Minimization techniques let us take a
digital circuit and reduce it to a simpler
but equivalent circuit.
Example: The two circuits show below are
equivalent to each other. (In other words,
whenever you give them both the same
inputs, they’ll produce the same output.)
Review: Two Primary Methods

The two primary manual minimization
methods use:
Boolean algebra: a set of rules that let
us transform Boolean expressions into
equivalent Boolean expressions.
2. Karnaugh maps (also called K-maps):
similar to truth tables.
The Karnaugh-map method provides a stepby-step procedure. If you follow the steps
correctly, you’ll get the right answer. The
Boolean-algebra method requires more
ingenuity on your part, but may be quicker.
1.

Karnaugh Maps



A Karnaugh map (or K-map) contains
the same information as a truth table,
but laid out in a way that reveals
patterns that let us read off a simplified
Boolean expression.
K-maps can be used for problems with
anywhere from 2 to 6 input variables.
But it’s most often used for 3-input and
4-input problems.
SOP Or POS?


K-maps can be used to read off either
the simplest sum-of-products (SOP)
expression for a function or the
simplest product-of-sums (POS)
expression for that same function.
Recall some examples:



SOP form: F1 = x′y + xyz + y′z′
POS form: F2 = (x+y)(x′+z)(y′+z′+w)
Reading off the simplest SOP
expression is slightly easier and
requires fewer steps.
Two-Variable K-Map



A two-variable K-map has two rows and
two columns.
Here’s the initial setup of a two-variable
map, assuming our inputs are named x
and y.
As we’ll see, for a
particular problem
you’ll insert additional
information into some
of the map’s squares.
Two-Variable K-Map (Cont’d.)


Each square in the map corresponds to
one row of a truth table, hence to one
minterm.
This map shows which
minterm corresponds
to each square. But
you don’t normally write
this information.
x
y
0
0
0
1
1
0
F
Two-Variable K-Map (Cont’d.)



Here’s another look, with some more
information that you don’t need to write
yourself.
This marking simply
says that y is true in
this column (and false
in all other columns).
This marking says
that x is true in this
row (and false in all
other rows).
Three-Variable K-Map



A three-variable K-map has two rows
and four columns.
Here’s the initial setup of a threevariable map, assuming our inputs are
named x, y, and z.
Note that the columns
are numbered “out of
order.” This is
intentional, and you
must do it this way.
Three-Variable K-Map (Cont’d.)


Each square in the map corresponds to
one row of a truth table, hence to one
minterm.
This map shows which
minterm corresponds
to each square. But
you don’t normally write
this yourself.
x
y
z
0
0
0
0
0
1
0
1
0
F
Three-Variable K-Map (Cont’d.)



Here’s another look, with some more
information that you don’t need to write
yourself.
This marking says
that y is true in these
columns (and false in
in all other columns).
This marking says
that z is true in these
columns (and false
in all other columns).
Adjacent Squares

The K-map method relies on our ability
to group squares that are adjacent to
each other. By “adjacent” we mean
side-by-side (such as
squares m1 and m3),
or above-and-below
(such as squares m3
and m7), but not
diagonally (such as
squares m1 and m7).
Why the Funny Numbering?


The “out-of-order” numbering of the
columns guarantees that the minterms
in adjacent squares differ from each
other in exactly one variable.
Examples:


Squares m1 and m3
differ in y but not in
x or z.
Squares m3 and m7
differ in x but not in
y or z.
Wraparound

We regard the right and left edges of
the map as wrapping around to touch
each other such that:


Squares m0 and m2
are adjacent,
differing in y but
not in x or z.
Squares m4 and m6
are adjacent,
differing in y but
not in x or z.
K-Map Procedure For Reading Off
Simplified SOP Expression
1.
2.
3.
Set up the K-map, labeling its rows and columns.
From either a truth table or a Boolean expression
(preferably in SOP form), place 1s in the appropriate
squares.
Circle adjacent 1s in groups of 8, 4, 2, or 1. You want
to maximize the size of the circles and minimize
the number of circle. Follow this order:
a.
b.
c.
d.
4.
5.
Circle any octet.
Circle any quad that contains one or more 1s that
haven’t already been circled, using the minimum number
of circles.
Circle any pair that contains one or more 1s that haven’t
already been circled, using the minimum number of
circles.
Circle any isolated 1s that haven’t already been circled.
Read off the term for each circle by including only
those complemented or uncomplemented variables
that do not change throughout the circle.
Form the OR sum of the terms generated in Step 4.
Three-Variable K-Map: Example #1

Using a K-map, find the simplest SOP
expression for this truth table.
x
y
z
F
0
0
0
0
0
0
1
0
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
0
1
1
1
0
So F = xy′ + x′y
Three-Variable K-Map: Example #2

Using a K-map, simplify
F = A′C + A′B + AB′C + BC
So F = A′B + C
Four-Variable K-Map



A four-variable K-map has four rows and
four columns.
Here’s the initial setup
of a four-variable map,
assuming our inputs are
named w, x, y, and z.
Note that columns
and rows are numbered
“out of order.” You
must do it this way.
Four-Variable K-Map (Cont’d.)


Each square in the map corresponds to
one row of a truth table, hence to one
minterm.
This map shows which
minterm corresponds
to each square. You
don’t normally write
this yourself.
w
x
y
z
0
0
0
0
0
0
0
1
0
0
1
0
F
Four-Variable K-Map (Cont’d.)



Here’s another look, with some more
information that you don’t need to write
yourself.
This marking says
that y is true in these
columns (and false in
in all other columns).
This marking says
that w is true in these
rows (and false
in all other rows).
Why the Funny Numbering?


As with three-variable maps, the “out-oforder” numbering of columns and rows
guarantees that the minterms in adjacent
squares differ in exactly
one variable.
Examples:


Squares m5 and m13
differ in w but not in
x, y, or z.
Squares m12 and m13
differ in z but not in
w, x, or y.
Wraparound

As with three-variable maps, the right
and left edges of the map wrap around
to touch each other. And so do the top
and bottom edges.
Examples:


Squares m0 and m8
are adjacent,
differing in w but
not in x, y, or z.
Squares m4 and m6
are adjacent,
differing in y but
Four-Variable K-Map: Example #1
w
x
y
z
F
0
0
0
0
1
0
0
0
1
1
0
0
1
0
1
0
0
1
1
0
0
1
0
0
1
0
1
0
1
1
0
1
1
0
1
0
1
1
1
0
1
0
0
0
1
1
0
0
1
1
1
0
1
0
0
1
0
1
1
0
1
1
0
0
1
1
1
0
1
1
1
1
1
0
1
1
1
1
1
0

Using a K-map, find the simplest
SOP expression for this truth table.
So F = y′ + w′z′ + xz′
Four-Variable K-Map: Example #2

Using a K-map, simplify
F = A′B′C′ + B′CD′ + A′BCD′ + AB′C′
So F = A′CD′ + B′C′ + B′D′
K-Map Procedure For Reading Off
Simplified POS Expression

The procedure we’ve been practicing yields
a simplified SOP expression. What if you
want a simplified POS expression instead?
1.
2.
3.
Instead of writing and circling the 1s from the
function’s truth table, write and circle the 0s.
Use the procedure above to read off an
expression, which will be the simplified SOP
expression for your function’s complement.
Apply generalized DeMorgan’s theorem to the
result of Step 2. This will yield an expression
for your function, and it will be in POS form.
K-Map Procedure For Simplified
POS Expression: Example

Find simplified POS expression for
F(A, B, C, D) = ∑(0, 1, 2, 5, 8, 9, 10)
So F′ = AB + CD + BD′
So F = (A′+B′)(C′+D′)(B′+D)
Don’t-Care Conditions

In some problems we don’t care
whether the output of a function is
0 or 1 for some particular
combinations of inputs.


This might happen, for instance, if we
know that that combination of inputs is
physically impossible.
In such cases we’ll put an X rather
than a 0 or a 1 in the output column
of the truth table.
Don’t-Care Conditions: Example



Suppose we’re designing a circuit that
controls whether to pump coolant to a
machine tool (call this variable P), based on
the values of three binary sensors whose
signals we’ll call A, B, and C.
Suppose also that it’s physically impossible,
based on the machine’s design, for sensors
A and C to be on at the same time.
Then we don’t need to worry about the
rows in our truth table where A and C are
both equal to 1. So we’ll put Xs in those
rows of the truth table. See next slide….
Don’t-Care Conditions: Example
(Cont’d.)

A
B
C
F
0
0
0
0
0
0
1
0
0
1
0
1
0
1
1
0
1
0
0
1
1
0
1
X
1
1
0
1
1
1
1
X


Put 1 in the output column
for each combination of
sensor readings that should
turn the pump on.
Put 0 in the output column
for each combination of
sensor readings that should
turn the pump off.
Put X in the output column
for each combination of
sensor readings that can
never happen.
Another Example


Suppose our circuit’s inputs
come from a thumbwheel
whose value can only be set to
numbers between 0 (00002)
and 9 (10012) .
Then we don’t have to worry
about input values of 10102
through 11112, because the
thumbwheel will never produce
such values. So we’ll put Xs in
those rows of the truth table.
See next slide….
Another Example (Cont’d.)
w
x
y
z
F
0
0
0
0
0
0
0
0
1
1
0
0
1
0
1
0
0
1
1
0
0
1
0
0
1
0
1
0
1
0
0
1
1
0
1
0
1
1
1
0
1
0
0
0
1
1
0
0
1
1
1
0
1
0
X
1
0
1
1
X
1
1
0
0
X
1
1
0
1
X
1
1
1
0
X
1
1
1
1
X



Put 1 in the output column
for each input value that
should turn your circuit on.
Put 0 in the output column
for each input value that
should turn your circuit off.
Put X in the output column
for each input value that can
never happen.
Don’t-Care Conditions and K-Maps

When you build a K-map, place an
X for each don’t care condition.
Then, when you are circling 1s in
your map, you can choose to treat
each X as either a 0 or a 1—make
whichever choice leads to fewer,
bigger circles.
Don’t-Care Conditions and KMaps: Example

When you build a K-map, place an
X for each don’t care condition.
Then, when you are circling 1s in
your map, you can choose to treat
each X as either a 0 or a 1—make
whichever choice leads to fewer,
bigger circles.
Don’t-Care Conditions and K-Maps:
Example
w
x
y
z
F
0
0
0
0
X
0
0
0
1
1
0
0
1
0
X
0
0
1
1
1
0
1
0
0
0
0
1
0
1
0
0
1
1
0
0
0
1
1
1
1
1
0
0
0
0
1
0
0
1
0
1
0
1
0
X
1
0
1
1
1
1
1
0
0
X
1
1
0
1
0
1
1
1
0
0
1
1
1
1
1

Using a K-map, find the simplest
SOP expression for this truth table.
So F = w′x′ + yz
Universal Gates
NAND gates are sometimes called universal gates
because they can be used to produce the other basic
Boolean functions.
A
B
A′
A
Inverter
AB
AND gate
A
A
(A + B)′
A+B
B
B
OR gate
NOR gate
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
NAND-Only Logic


Because NAND gates are universal
gates, and because in most
technologies NAND gates are faster and
take up less space than AND or OR
gates, it’s very common for chips to be
manufactured using just NAND gates.
Unfortunately, thinking in terms of
NAND is less natural for humans than
thinking in terms of AND and OR.
Following slides show some tricks to
make it easier.
Two Ways to Draw a NAND Gate:
“AND-invert” or “Invert-OR”


DeMorgan’s theorem tells us that the
following are equivalent:
Mentally “push” the bubble through
from input to output (or vice versa),
Two-Level NAND Implementation

It’s easy to draw a two-level NAND
implementation for any SOP
expression. Recall that an SOP
expression translates directly into a
two-level AND-OR circuit such as:
1. Insert extra
inverter pairs.
2. Then “absorb” the
inverters into the gates.
NOR Is Also a Universal Gate


What we’ve seen for NAND gates also
applies to NOR gates.
First, NOR gates are universal gates
and can form all of the basic gates:
A
A
B
A′
Inverter
A+ B
OR gate
A
A
(AB)′
AB
B
B
AND gate
NAND gate
Two Ways to Draw a NOR Gate:
“OR-invert” or “Invert-AND”


DeMorgan’s theorem also tells us that
the following are equivalent:
Again, mentally “push” the bubble
through, changing the shape as you do
NOR-Only Logic


Using the same sort of techniques we
saw above for NAND gates, the book
shows how to implement Boolean
expressions using only NOR gates.
I won’t hold you responsible for this.
Summary: Alternative Symbols for
Inverter, NAND, and NOR
Other Two-Level Implementations


In addition to AND-OR, OR-AND,
NAND-NAND, and NOR-NOR
implementations, any Boolean
expression can also be implemented
in several other two-level forms, as
discussed in Section 3.7.
While this is interesting from a
theoretical standpoint, it’s not that
useful in practice, so I won’t hold
you responsible for it.
Inclusive-OR versus Exclusive-OR in
the English Language


Suppose you invite me to a party at your house
and I ask you if you have any cake or ice
cream in your fridge. Assuming you tell the
truth, how would you answer in each of the
following cases?
Cake
Ice Cream
No
No
No
Yes
Yes
No
Yes
Yes
Your Answer
Here we’re using OR in the inclusive sense.
Inclusive-OR versus Exclusive-OR in
the English Language (Cont’d)


Suppose you’ve taken your child to a birthday
party and it’s time for dessert. You say to the
kid, “You can have cake or ice cream. Which
one do you want?” Which of the following
cases are you allowing?
Cake
Ice Cream
No
Yes
Yes
No
Yes
Yes
Allowed?
Here you’re using OR in the exclusive sense.
The XOR Gate
A
B
X
A
B
=1
X
The XOR gate produces a HIGH output only when the
inputs are at opposite logic levels. The truth table is
Inputs
Output
A
B
X
0
0
1
1
0
1
0
1
0
1
1
0
The XOR operation is written as X = A′B + AB′.
Alternatively, it can be written with a circled plus sign
between the variables as X = A + B.
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Applying Boolean-Algebra Rules to
Expressions with XOR


The “circle-OR” symbol doesn’t appear in any
of our Boolean-algebra rules, so if you’re doing
a Boolean simplifcation, write out the longer
form shown above for XORs.
We’ll do an example later.
The XOR Gate
A
B
X
A
B
=1
X
Example waveforms:
A
B
X
Notice that the XOR gate will produce a HIGH only when exactly one
input is HIGH.
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Fixed Function Logic
Some common gate configurations are shown.
VCC
VCC
14 13 12 11 10 9
1
2
3
4
5
6
8
7
GND
VCC
14 13 12 11 10 9
1
2
3
'00
6
7
GND
2
3
4
5
6
8
7
GND
1
2
3
4
5
6
8
7
GND
'27
5
6
8
7
GND
5
6
7
GND
2
3
4
'30
1
2
3
5
6
8
7
GND
2
3
4
5
6
6
7
GND
8
7
GND
14 13 12 11 10 9
1
2
3
4
5
6
8
7
GND
'21
VCC
14 13 12 11 10 9
1
5
VCC
14 13 12 11 10 9
1
4
8
'08
VCC
14 13 12 11 10 9
1
4
14 13 12 11 10 9
'20
VCC
14 13 12 11 10 9
4
3
'11
VCC
3
2
VCC
14 13 12 11 10 9
'10
2
1
8
'04
VCC
14 13 12 11 10 9
1
5
VCC
14 13 12 11 10 9
' 02
VCC
1
4
8
2
3
4
'32
5
6
8
7
GND
14 13 12 11 10 9
1
2
3
4
5
6
8
7
GND
'86
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
The XNOR Gate
A
B
X
A
B
=1
X
The XNOR gate produces a HIGH output only when the
inputs are at the same logic level. The truth table is
Inputs
Output
A
B
X
0
0
1
1
0
1
0
1
1
0
0
1
The XNOR operation can be written as X = A′B′ + AB or as
X = A + B.
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
The XNOR Gate
A
B
X
A
B
=1
X
Example waveforms:
A
B
X
Notice that the XNOR gate will produce a HIGH when both inputs are the
same. This makes it useful for comparison functions.
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
More Than Two Inputs?


Some textbooks (including ours) say that XOR
and XNOR gates can only have two inputs.
Other textbooks say they can have more than
two inputs, but there’s some ambiguity in how
exactly to define this.


The most common way is to say that XOR output is
HIGH if and only if an odd number of inputs are
HIGH.
You won’t find XOR or XNOR chips that have
more than two inputs, but Multisim has XOR
and XNOR gates with more than two inputs.
Applications of XOR and XNOR
Gates

Three common applications:
1.
2.
3.
Comparators
Controlled inverters
Parity generation and checking
Convention for Multi-Bit Strings



When dealing with multi-bit binary
strings, we use subscripts to refer to
the individual bits in the string.
The least significant bit (LSB) always
gets the smallest subscript, which may
be either 1 or 0.
Example: In a four-bit string A, the
bits may be labeled either
A4A3A2A1
or
A3A2A1A0
Application #1: Comparator

A comparator compares two strings of bits
to see whether they are equal to each
other:


Example: if string A = 0101 and string B = 0100,
then A≠ B.
Next slide shows how to build a 4-bit
comparator from XNOR gates.
Comparator Circuit
Application #2: Controlled Inverter

A controlled inverter takes an input string
and, depending on the logic level on a
control line, either



Leaves the string unchanged or
Inverts each bit in the string
Next slide shows how to build an 8-bit
controlled inverter from XOR gates.
Controlled Inverter
Making Connections to the Altera
Board



In Lab 6 you’ll use the o’scope
to display a signal being
generated on the Altera board.
To do this you must assign the
correct pin number in Quartus
to send the signal out to a pin
on the Altera board’s 14-pin
general-purpose I/O connector.
Then you must plug in our
home-made connector block
and use an oscilloscope probe
to measure the pin to which
you sent your signal.
See next slide for pin numbers.
Making Connections to the Altera
Board (Cont’d.)

Here are the pin numbers to use when you assign
pin numbers in Quartus:
PIN_D9
PIN_E10
PIN_F14
PIN_H14
PIN_H13
PIN_J14
PIN_J10
This one is GROUND.
Printing from Our Oscilloscopes




You can print the oscilloscope screen by
pressing the PRINT button.
There’s a delay of about 40 seconds before
the page will print, so be patient.
Only one oscilloscope can print at a
time, or else the printer gets confused
and prints hundreds of pages.
Please shout “Printing!” before you press the
PRINT button, and make sure that you don’t
print while someone else is waiting for their
page to print.
Application #3: Parity Checking
Parity checking is a method of error detection for
simple transmission errors involving one bit. A parity bit
is an “extra” bit attached to a group of bits to force the
total number of 1’s to be either even (even parity) or
odd (odd parity).
The ASCII character for “a” is 1100001 and for “A” is
1000001. What is the correct bit to append to make both of
these have odd parity?
The ASCII “a” has an odd number of bits that are equal to 1;
therefore the parity bit is 0. The ASCII “A” has an even
number of bits that are equal to 1; therefore the parity bit is 1.
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Parity Generators


To implement parity checking, we need
circuitry on the sending end that
generates the parity bit for each group
of bits being sent. This circuitry is
called a parity generator.
Next slide shows how to build 4-bit
even or odd parity generators.
Parity Generators
Parity Checkers


On the receiving end, we need circuitry
that checks the data bits and parity bit
as they’re received to decide whether an
error has occurred during transmission.
This circuitry is called a parity checker.
Next slide shows how to build a 4bit-plus-parity even parity checker.
Five-Bit Even Parity Checker
A Parity Generator/Checker Chip



74280 Nine-bit Parity Generator/Checker
Most chips we’ve studied have been SSI
(small-scale integration) chips containing
fewer than 10 gates that are not connected
to each other.
The 74280 is an MSI (medium-scale
integration) chip. Instead of containing a
few disconnected gates, it contains about 45
gates connected internally on the chip to
perform a specific function.
Parity Error Detection System
Parity Generator/Checker Chip
The 74280 can be used to generate a parity bit or to check
an incoming data stream for even or odd parity.
Checker: The 74280 can test codes with up to
9 bits. The even output will be HIGH if the
data lines have even parity; otherwise it will
be LOW. Likewise, the odd output will be
HIGH if the data lines have odd parity;
Data
otherwise it will be LOW.
inputs
Generator: To generate even parity, the parity
bit is taken from the odd parity output. To
generate odd parity, the output is taken from
the even parity output.
(8)
(9)
(10)
(11)
(12)
(13)
(1)
(2)
(4)
A
B
C
D
E
F
G
H
I
(5)
(6)
S Even
S Odd
74280
© 2009 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved
Applying Boolean-Algebra Rules to
Expressions with XOR or XNOR

Recall that the “circle-OR” symbol doesn’t
appear in any of our Boolean-algebra rules, so
if you’re doing a Boolean simplifcation, write
out the longer forms shown earlier for XOR and
XNOR:



Rewrite X = A + B as X = A′B + AB′.
Rewrite X = A + B as X = A′B′ + AB.
Example: Use Boolean algebra to simplify:
Another Example

Example: Use Boolean algebra to simplify:

Add new HDL slides here on
Sections 3.9, 3.10