•- 1 - ©2009 Jasper Design Automation JasperGold for Targeted ROI • JasperGold solutions portfolio delivers competitive advantage across the spectrum of SoC design applications: – Architectural analysis – RTL design and debug – Verification, including regression test and low power analysis – Chip integration and software programmers’ model – Silicon debug • JasperGold is for: – Architects – RTL designers – Verification engineers and formal experts – Silicon teams •- 2 - ©2009 Jasper Design Automation JasperGold Targeted ROI and Applications Summary Jasper Application Area Resource Impact Architectural verification Risk Impact TTM Impact ROI High High High High High High High RTL design and debug High Proofs of critical functionality •Verification •Regression test •Low-power modes High SoC Integration High High High Post-silicon debug High High Varies •- 3 - ©2009 Jasper Design Automation High Architectural and RTL Design and Debug Jasper Application Area Examples Architectural verification •Communications and bus architecture •Cache coherency •Multi processor protocol •Deadlocks, livelocks •Reference modeling / executable spec RTL design and debug •RTL development and designer sandbox •X-propagation detection •Initialization connections •Logic optimization •Register verification ROI High High "JasperGold's user interactive Design Tunneling enable the tool to solve previously intractable block-level proofs by directing the engines to consider only the logic which is relevant to the problem." Prosenjit Chatterjee, NVIDIA Corporation •- 4 - ©2009 Jasper Design Automation Proofs of Critical Functionality / Verification Jasper Application Area Proofs of critical functionality Examples •Packet integrity •Multi-processor coherence •Flow control •Error correction •Protocol certification •Token leakage •Regression test •Mixed signal and asynchronous design support •DFT ROI High "Jasper has significantly improved the scalability of formal model checking. JasperGold Verification System's interactive use-model allows formal model checking to run on larger, more complex designs." Shrenik Mehta, Sun Microsystems •- 5 - ©2009 Jasper Design Automation Low Power Verification Jasper Application Area Verification of low-power modes Examples •Power architecture •Clock gating •Power shutoff isolation cells ROI Varies “On the wireless side, the big focus is low power. That introduces the complexity of having to deal with low-power techniques. There are many power domains and many voltage domains…All of that needs to be not only designed, but verified. Making sure that none of the power modes are incompatible with each other is one of the big challenges.” Philippe Magarshack , ST Microelectronics •- 6 - ©2009 Jasper Design Automation SoC Integration Jasper Application Area SoC Integration Examples •Chip-level connectivity , automated programming •Automated pad ring verification •Automated clock verification •Connectivity debug automation, connectivity matrix •Chip-level verification •Automation of problem formulation, analysis, debugging •Multi-cycle path verification •Firmware development •Programming sequence generation and automation ROI High "After using several competing products, Qualcomm selected Jasper as our formal verification provider of choice because of their superior technology and solutions-oriented applications support. We are now deploying JasperGold across design and verification teams worldwide to deliver higher quality in the industry’s most highly integrated wireless devices.“ J. Scott Runner, Qualcomm •- 7 - ©2009 Jasper Design Automation Silicon Debug Jasper Application Area Post-silicon debug Examples •Root cause bugs •Validate fixes ROI Varies “In post-silicon debug, a set of observed events or conditions describes a failure scenario... Modern formal verification methods are especially adept at finding counterexamples to properties, and can often do so efficiently in large state spaces. “ C. Richard Ho, D. E. Shaw Research •- 8 - ©2009 Jasper Design Automation JasperGold Leads Industry Deployment JasperGold Technology Deployment • Methodology • Capacity • Visibility Methodology Formal Technology • Supported by Jasper Services • Patented formal technology – 12 patents, more pending •- 9 - ©2009 Jasper Design Automation Capacity Visibility Jasper Portfolio of Solutions •- 10 - ©2009 Jasper Design Automation
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