MAS6180 and MAS6181 COB board description and bonding
2.12.2009/HaS
Figure 1.
All layers illustrated
Routing layers
Mask layers
Silk screen layers
PCB length
PCB height
Drilling holes
2 pcs
2 pcs
2 pcs
1190 mil (30.2 mm)
710 mil (18.0 mm)
22 pcs, diameter 35 mil (0.89 mm)
1 (8)
MAS6180B1 1-band internal crystal compensation configuration
DEC
OUT
AON
AGC
PDN
QI
QOM
QOP
VDD
6180B1
RFIP
RFIM
VSS
Figure 2.
MAS6180B1 internal crystal compensation for crystal X2 (X1 not used)
2 (8)
MAS6180B5 1-band external crystal compensation configuration
DEC
OUT
AON
AGC
PDN
QI
QOM
QOP
VDD
6180B5
RFIP
RFIM
VSS
Figure 3.
MAS6180B5 external crystal compensation for crystal X1 (X2 not used)
Note: In this layout the crystal compensation capacitor is connected to
QOP and QOM to crystal which is only due to simpler layout reasons.
3 (8)
MAS6181A 2-band internal crystal compensation configuration
DEC
OUT
AON
PDN2
PDN1
AGC
NC
QI
RFIP
NC
QO1
MAS6181A
RFIM
RFI2
QO2
VSS
VDD
Figure 4.
MAS6181A1 internal crystal compensation for crystals X1 and X2
4 (8)
PCB layers
Figure 5.
Top routing layer
Figure 6.
Bottom routing layer (viewed through board from top side)
5 (8)
Figure 7.
Top mask layer
Figure 8.
Bottom mask layer (viewed through board from top side)
6 (8)
Figure 9.
Top silk screen layer
Figure 10.
Bottom silk screen layer (viewed through board from top side)
7 (8)
Figure 11.
Drilling hole locations
VSS pad
bonded first!
1000 m
VDD
VSS
MAS6180Bx
QOM
RFIP
QI
PDN
AGC
AON
OUT
DEC
MAS6180Bx IC pad layout
VDD
VSS
QO2
RFI2
QO1
RFIM
NC
RFIP
MAS6181A
QI
NC
AGC
PDN1
PDN2
AON
OUT
1800 µm
Figure 12.
1250 m
RFIM
QOP
DEC
1420 µm
Figure 13. MAS6181A IC pad layout
8 (8)