makefile
M.A Doman
Compiling multiple objects
Card.cpp
Deck.cpp
main.cpp
-> Card.o
-> Deck.o
-> main.o
main.o Deck.o Card.o ->
Dealer.exe
Include Guards:
Preprocessing Directives
#ifndef
#define _includename.type
#endif
Include Guards:
Preprocessing Directives
When file is included, the
preprocessor checks if a unique
value is defined.
If not, it includes the file.
If it already is defined, it skips the
inclusion
What is the make utility?
• make is a standard linux command to automatically
determine when parts of a large project require recompilation
• Governed by a set of rules built in a makefile
• Syntax:
# indicates comment line
target: prerequisite list
[TAB] construction command
•
make
clean target
• Used to clean up the directory
• In makefile:
Clean:
rm list the object files you want removed. \
continue on next line.
make:
# final rule
final: main.o Deck.o Card.o
c++ –o Dealer main.o Deck.o Card.o
#compile main
main.o: main.cpp Deck.cpp CCrd.cpp
#compile Deck Class
Deck.o: Deck.cpp Card.cpp
c++ -c Deck.cpp
#compile card class
Card.o: Card.cpp
c++ -c Card.cpp
make: using variables and
comments
You can also use variables when writing makefiles.
# Comment that will say I’m creating a variable for compiler
CC = g++
# Comment for a set of option flags used for compilation
CFLAGS = -c
# Link final program
final: main.o Deck.o Card.o
$(CC) –o Deale main.o Deck.o Card.o
#compile main
main.o: main.cpp
$(CC) $(CFLAGS) main.cpp
make: using variables and
comments
You can also use variables when writing makefiles.
# Comments that help me remember what I’m doing
#clean directory
# -f ignores nonexistent files without prompt
# -r removes directories and contents recursively
clean:
rm –fr *.o Dealer
Makefile lab
• Continue now with makefile lab
UNIX Tutorial
The following comes from the site:
UNIX Tutorial for Beginners
By the University of Surrey