Switched Capacitor:
Sampled Data Systems
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Basic switched capacitor theory
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How has Anadigm utilised this.
Theory-Basic SC and Anadigm-1
Resistor & Charge Relationship
I
+
V
-
∆Q
I=
∆t
V∆t
V
R=
=
I
∆Q
Theory-Basic SC and Anadigm-2
I
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Resistance is defined
in terms of current (I)
and voltage (V).
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Current is the rate of
change of charge.
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R = V/I
Switching Charge to a Capacitor
Theory-Basic SC and Anadigm-3
Switched Capacitor as a Resistor
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Equivalent resistance
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Ratios
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Theory-Basic SC and Anadigm-4
Contains no “R”
Goes UP↑ as C goes
down↓
Function only of “C” and
clock period (T)
Independent of clocks
Depends on capacitor
matching
Why Switched Capacitor?
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z
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RC constants with only C’s
Area savings - much smaller for large “R”
Better “resistor” values
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Better tolerance; typically ± 1.0%
Better matching - typically ± 0.1%
Better Linearity
Wider range
The “extras”
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Phase swapping
Frequency dependent RC’s
Theory-Basic SC and Anadigm-5
Phase Swapping
Theory-Basic SC and Anadigm-6
The Clock as a System Reference
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Corner frequency can be changed by
changing the clock frequency
Theory-Basic SC and Anadigm-7
Switched Capacitor Circuits are
Sampled Data Systems
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Inputs and outputs may
be valid only on certain
phases
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Subject to sampled data
system constraints
φ1
Theory-Basic SC and Anadigm-8
φ2 φ1
φ2 φ1
φ2
Expression of Sampled Data Function
Vt
Q−1 = CV−1
Qt
Q0 = −CV−1
Vt
Qt
φ1
φ2 φ1
φ2 φ1
t=-2 t=-1 t=0
(=“now”)
Theory-Basic SC and Anadigm-9
φ2
Sampled Data Example…
Φ2
C2
Φ1
Qfb
Vin
Φ1
Φ2
C1
Φ2
Qi
Φ2
Φ1
Qfb0 = C 2 ⋅ Vout0
Qi0 = Ci ⋅ (Vout0 − Vout −1 )
Ci
Qin
Φ1
Vout
Qin0 = −C1 ⋅Vin−1
− C1 ⋅ Vin−1 + C 2 ⋅ Vout0 + Ci ⋅ (Vout0 − Vout −1 ) = 0
Theory-Basic SC and Anadigm-10
…And we get : AnadigmDesigner
Simulator Equation!
Φ2
C2
Φ1
Φ2
Φ1
Ci
Vin
Φ1
Φ2
C1
Φ2
Φ1
Vout
All SC functions are about
ratios of capacitors.
Normalise all caps
connected to an integrator
stage to the integrator cap
(=C2 here). So:
nCi = 1
Theory-Basic SC and Anadigm-11
C
nC1 = 1
Ci
C2
nC2 =
Ci
On φ2 :
1
Vout0 =
⋅ (Vout −1 + nC1Vin−1 )
(1 + nC2 )
On φ1 :
Vout 0 = Vout −1
Performance: Programming Boundaries
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Op-amp dynamics
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Gain-bandwidth product
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Op-amp slew rate
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Loading limits
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Input offset
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Limit on filter order
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Capacitance spread
Theory-Basic SC and Anadigm-12
Opamp Gain Bandwidth Product
80dB
40dB
0dB
120kHz
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There is a natural trade-off between bandwidth and gain
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This knowledge is built into the IPmodules
Theory-Basic SC and Anadigm-13
Op-amp Slew Rate
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Defines speed at which large transitions in output voltage
are made.
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The op-amp is no longer operating in small-signal mode
(the ‘virtual ground’ is destroyed temporarily)
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This is separate to GB product
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It arises from internal features of the op-amp, and is not a
feature of capacitive loading
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Note: excess capacitive load causes op-amp instability (ringing)
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Anadigm op-amp’s are designed to drive 100pF load at unity gain
About 6 or 7 full-size input caps
Theory-Basic SC and Anadigm-14
Input Offset
Φ2
C3
Φ1
Φ2
Φ1
C2
Vin = 0
Φ2
Φ1
Vout
•
C1
Φ2
Vos
Φ1
Vout
(C1 + C3 )
= Vos ⋅
C3
Anadigm 3.3volt products have an internal offset “nulling” circuit
this reduces the effective offset from a few mil-volts to less than 250 microvolts.
•
5 volt products do not have this feature
Theory-Basic SC and Anadigm-15
Filter Order
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In theory, very large filters can be constructed with
Anadigm’s dpASP and FPAA products, 8 poles with each
device and multiple devices can be used.
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All the previous effects are cumulative and will put a
practical limit on filters that can be built.
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A rule of thumb, a maximum order of about 10-12 can be
realised without special consideration of the second order
effects mentioned previously (e.g. C-message telecoms
filter)
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Higher order filters with poles in their transfer function (IIR
filters) are not often called for anyway.
Theory-Basic SC and Anadigm-16
Capacitance Spread
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The ratio of Cmax to Cmin in a given Switched
Capacitor stage
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Limits CAM parameter ranges
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Lowest filter cut-off frequency
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Minimum and maximum gain settings
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Maximum length of integrator time-constant
Theory-Basic SC and Anadigm-17
Extending Capacitance Spread
Φ2
Φ1
C3
Φ2
Φ1
C2a
C2b
Vin
Φ2
Φ1
C1
Φ2
Φ1
Vout
Uses parallel combinations of available capacitors
Many of Anadigm’s CAM use this technique.
Theory-Basic SC and Anadigm-18